Patents Assigned to RENESAS
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Publication number: 20230105364Abstract: A method and a system may include a light detection and ranging (LiDAR) system having one or more redundant channels, as well as software executed by a microcontroller, or controller, to use the redundant channels in response to and instead of detected, failed channels. For example, inputs to a failed channel from photodiodes may be replaced from the failed channel to a redundant channel. The substitution of the redundant channel for the failed channel may occur seamlessly, allowing for uninterrupted operation of the LiDAR system.Type: ApplicationFiled: October 6, 2021Publication date: April 6, 2023Applicant: Renesas Electronics America Inc.Inventor: Alberto Troia
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Patent number: 11621576Abstract: Example implementations include a method of reducing current overshoot in a power regulator device, by detecting a change in an input current of an inductive charger device in response to a change in load on the inductive charger device, modifying an operating state of the inductive charger device in accordance with a first input current limit parameter based on a total input current limit parameter and a current division parameter, in response to the detecting the change in the input current, operating the inductive charger device in accordance with the first input current limit during a current limit period subsequent to the detecting the change in the input current, modifying the operating state of the inductive charger device in accordance with a second input current limit parameter based on the total input current limit parameter and the current division parameter, subsequent to the current limit period, and operating the inductive charger device in accordance with the second input current limit subsequeType: GrantFiled: December 22, 2020Date of Patent: April 4, 2023Assignee: Renesas Electronics America Inc.Inventors: Han Chong, Sungkeun Lim
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Patent number: 11621635Abstract: Methods and apparatuses for regulating a power converter are described. A device comprising a control circuit and a logic circuit can be integrated in a controller coupled to the power converter. The control circuit can generate a constant off-time signal based on a ramp signal and an error signal. The logic circuit can generate a control signal based on the constant off-time signal and a constant on-time signal. The logic circuit can output the control signal to the power converter. In response to an on-time period of the constant off-time signal being less than an on-time period of the constant on-time signal, the control signal can vary according to the constant on-time signal. In response to the on-time period of the constant off-time signal being greater than the on-time period of the constant on-time signal, the control signal can vary according to the constant off-time signal.Type: GrantFiled: July 9, 2021Date of Patent: April 4, 2023Assignee: Renesas Electronics America, Inc.Inventors: Long Yu, Jin Yang, Jianhua Yang, Pengcheng Tang, Xiaodong Zhan
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Publication number: 20230095018Abstract: Detection transistor MNd flows a detection current IdN to a current path CP1n when an output voltage Vo generated in a load terminal PN1 is than a ground voltage GND. A current mirror circuit CMp1 transfers the detection current IdN flowing in the current path CP1n to a current path CP2a. Detecting resistor element Rd1 converts a mirror current I2a flowing in the current path CP2a to a detection voltage Vd1. A control transistor MNc1 is turned on when the converted detection voltage Vd1 is higher than a predetermined value. Then, the output transistor QO is controlled to be off while the control transistor MNc1 is on.Type: ApplicationFiled: September 12, 2022Publication date: March 30, 2023Applicant: Renesas Electronics CorporationInventors: Naohiro YOSHIMURA, Makoto TANAKA
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Publication number: 20230098567Abstract: Battery charger systems and apparatuses are described. In an example, an apparatus may include a first controller, a first port connected to the first controller, a first charger module connected to the first controller, a second controller, a second port connected to the second controller, and a second charger module connected to the second controller. The first controller may be configured to form a first connection path between the first charger module and the second port via the second controller. The first controller may be further configured to form a second connection path between the second charger module and the first port via the first controller.Type: ApplicationFiled: September 20, 2021Publication date: March 30, 2023Applicant: Renesas Electronics America Inc.Inventors: Sungkeun Lim, Yen-Mo Chen, Keeho Shin
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Publication number: 20230098843Abstract: A light detection and ranging system having a reference receiver channel and at least one comparator for comparing the output of the reference receiver channel and the output of each of the separate receiver channels to a second emitted light signal, the reference receiver channel having a reference optical sensor and a reference amplifier, wherein the at least one comparator can adjust the gain of the amplifiers of each separate receiver channels based on the result of the comparison of the output of the reference receiver channel and the output of the corresponding separate receiver channel. An optical receiver system and a method for operating a light detection and ranging system are also provided.Type: ApplicationFiled: September 26, 2022Publication date: March 30, 2023Applicant: Renesas Electronics America Inc.Inventors: Fulvio SCHIAPPELLI, Giuseppe TAVANO
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Patent number: 11616493Abstract: Various exemplary embodiments are directed to methods including obtaining an input sample magnitude, filtering the obtained input sample magnitude, generating a sample-to-sample difference based on the filtered input sample magnitude, and engaging an actuator in accordance with a determination that the sample-to-sample difference satisfies a rate threshold.Type: GrantFiled: June 23, 2020Date of Patent: March 28, 2023Assignee: Renesas Electronics America Inc.Inventors: Christopher Semanson, James Page, Onkar Raut
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Patent number: 11617265Abstract: A width of each of a first signal terminal and a reference potential terminal formed in a first connection region of a core insulating layer constituting a flexible substrate is larger than a width of each of a first backside signal terminal and a backside reference potential terminal formed in a second connection region of the core insulating layer. In addition, a first separation distance between the first signal terminal and the reference potential terminal arranged adjacent to the first signal terminal is smaller than a second separation distance between the first backside signal terminal and the backside reference potential terminal arranged adjacent to the first backside signal terminal. An insulating film formed on a first surface of the core insulating layer at a position overlapping each of the first connection region and the second connection region covers the first connection region such that the second connection region is exposed.Type: GrantFiled: November 5, 2021Date of Patent: March 28, 2023Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Kazuaki Tsuchiyama, Tatsuaki Tsukuda
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Patent number: 11616383Abstract: Example implementations include a method of obtaining an input voltage of a power converter circuit and a system voltage of the power converter circuit, obtaining a voltage rate gain based on an aggregate inductance of the power converter circuit, and in accordance with a determination that the input voltage and the system voltage are not equal, generating a rate offset voltage based on the voltage rate gain and the system voltage difference.Type: GrantFiled: December 3, 2020Date of Patent: March 28, 2023Assignee: Renesas Electronics America Inc.Inventors: Yang Li, Sungkeun Lim, Zhigang Liang
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Publication number: 20230092555Abstract: A semiconductor device includes a protection element configured by a MOSFET, and the protection element has a multilayer metal wiring structure. The multilayer metal wiring structure includes drain connection wirings connected to drain regions of the MOSFET and source connection wirings connected to source regions of the MOSFET. In a part of a layer of the multilayer metal wiring structure where both the drain connection wirings and the source connection wirings are present, only either the drain connection wirings or the source connection wirings are laid out in a grained pattern.Type: ApplicationFiled: September 15, 2022Publication date: March 23, 2023Applicant: Renesas Electronics Corporation.Inventor: Yasuyuki MORISHITA
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Publication number: 20230081996Abstract: A semiconductor device and a method for controlling body bias thereof capable of properly controlling body bias of a transistor even in a case where process variation occurs are provided. Operation speeds of ring oscillators ROSCn and ROSCp respectively change due to an influence of process variation at an NMOS transistor MN side and a PMOS transistor MP side. Speed/bias data represent a correspondence relationship between the operation speeds of the ring oscillators ROSCn and ROSCp and set values V1n and V1p of body biases VBN and VBP. A body bias controller receives speed values Sn and Sp measured for the ring oscillators ROSCn and ROSCp to which the body biases VBN and VBP based on default values are respectively applied, and obtains the set values V1n and V1p on the basis of the speed/bias data.Type: ApplicationFiled: September 8, 2022Publication date: March 16, 2023Applicant: Renesas Electronics Corporation.Inventors: Hiroyuki WATANABE, Hideshi SHIMO
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Publication number: 20230079818Abstract: According to certain general aspects, the present embodiments relate generally to securing communication between ECUs. Example implementations can include a method of securely transmitting Controller Area Network (CAN) protocol frames via a CAN controller.Type: ApplicationFiled: November 22, 2022Publication date: March 16, 2023Applicant: Renesas Electronics America Inc.Inventors: Ahmad NASSER, Tobias BELITZ
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Publication number: 20230084847Abstract: Systems and apparatuses for wireless power transfer system are described. A receiver may send an amplitude shift key (ASK) signal to a transmitter. The transmitter may receive the ASK signal from the receiver. The transmitter may perform a demodulation on the ASK signal. The transmitter may, in response to a failure to demodulate the ASK signal, encode a notification of failure in a frequency shift key (FSK) signal. The transmitter may transmit the FSK signal to the receiver. The receiver may receive the FSK signal. The receiver may perform a function to resolve the failure to demodulate the ASK signal.Type: ApplicationFiled: September 15, 2021Publication date: March 16, 2023Applicant: Renesas Electronics America Inc.Inventors: Jiangjian Huang, Hulong Zeng, Gopinath Akkinepally, Amit Dharmendra Bavisi
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Video encoding device, operating methods thereof, and vehicles equipped with a video encoding device
Patent number: 11606552Abstract: A video encoding device includes a local decode generation unit for generating a reference image based on a result of encoding of a divided image, a compression unit for compressing the reference image to generate a compressed data, a reference image storage determination unit for determining whether to store the compressed data in a memory, and an inter-prediction unit for performing motion vector search for inter-coding based on a reference image stored in the memory. The reference image storage determination unit sets an allowable data amount used for storing the reference image for each determined area of the moving image data, and determines whether or not to store the compressed data obtained by compressing the reference image in the memory based on the allowable data amount. Inter-prediction unit sets the reference image corresponding to the compressed data stored in the memory as the search range of motion vector search.Type: GrantFiled: July 20, 2021Date of Patent: March 14, 2023Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Maiki Hosokawa, Toshiyuki Kaya, Tetsuya Shibayama, Seiji Mochizuki, Tomohiro Une, Kazushi Akie -
Patent number: 11605581Abstract: A semiconductor device comprising a wiring member with which a semiconductor chip is electrically connected including: a first wiring layer having a plurality of first conductive patterns; a second wiring layer arranged next to the first wiring layer in a thickness direction of the wiring member, and having a second conductive pattern; and a third wiring layer arranged next to the second wiring layer in the thickness direction of the wiring member, and having a third conductive pattern. Here, in plan view, a first opening portion of each of two, which are arranged next to each other, of a plurality of first opening portions each penetrating through the second conductive pattern is overlapped with a pair of differential signal wirings contained in plurality of first conductive patterns, and is overlapped with two or more of a plurality of second opening portions each penetrating through the third conductive pattern.Type: GrantFiled: January 8, 2021Date of Patent: March 14, 2023Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Wataru Shiroi, Shuuichi Kariyazaki
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Patent number: 11604484Abstract: An electronic system device comprises a power generation device generating a power supply voltage, a substrate bias generation circuit connected to the power generation device, a memory circuit, a monitor circuit, and a capacitor connected to the substrate bias generation circuit via a switch. The substrate bias generation circuit generates a substrate bias voltage from the power supply voltage and supplies charges based on the substrate bias voltage to the capacitor while the switch is ON-state. While the switch is OFF-state, the capacitor stores the accumulated charges based on the substrate bias voltage. While the switch is ON-state, the substrate bias generation circuit adds based on the substrate bias voltage to charge that was held, and states the back bias voltage. The substrate bias generation circuit supplies the back bias voltage to memory circuit.Type: GrantFiled: October 12, 2020Date of Patent: March 14, 2023Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Akira Tanabe, Kazuya Uejima
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Patent number: 11606276Abstract: Techniques for detecting a loss of a received frame are provided. The communication apparatus 101 includes a receiving unit 813 for receiving a frame including a plurality of data, a first memory 806 for temporarily storing a plurality of data, a second memory 811 for storing a transfer rule of each data, a plurality of third memories 809 to which each data is allocated, a processor 810 associated with each third memory 809, and a memory control unit 805 for controlling transfer of each data. The memory control unit 805 outputs an error when the first data is not the last data of the frame or the size of the first data is larger than the size defined by the second data in the case where the second data includes the last data flag.Type: GrantFiled: March 24, 2020Date of Patent: March 14, 2023Assignee: RENESAS ELECTRONICS CORPORATIONInventor: Yuichi Takitsune
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Patent number: 11606097Abstract: A PLL circuit includes a phase comparator, an integrator path, a proportional path, a current controlled oscillator, a divider, and a double integrator path. The double integrator path includes an intermittent operation gm amplifier, a filter circuit, and a voltage-current conversion circuit. The intermittent operation gm amplifier receives an output voltage of a filter circuit. When a pulse CLK for an intermittent operation is ON, the intermittent operation gm amplifier outputs its voltage to the filter circuit. When the pulse CLK for the intermittent operation is OFF, the intermittent operation gm amplifier does not output the output voltage of the filter circuit to the filter circuit. Even when the pulse CLK for the intermittent operation is OFF, an input potential of the voltage-current conversion circuit is held by the filter circuit, and a current to the current controlled oscillator flows. This makes it possible to oscillate at a high frequency without increasing an area of the filter circuit.Type: GrantFiled: October 14, 2021Date of Patent: March 14, 2023Assignee: RENESAS ELECTRONICS CORPORATIONInventor: Atsushi Motozawa
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Patent number: 11604102Abstract: According to one embodiment, a semiconductor device 1 includes a temperature sensor module 10 that outputs a non-linear digital value with respect to temperature and a substantially linear sensor voltage value with respect to the temperature, a storage unit 30 that stores the temperature, the digital value, and the sensor voltage value, and a controller 40 that calculates a characteristic formula using the temperature, the digital value, and the sensor voltage value stored in the storage unit 30, in which the temperature, the digital value, and the sensor voltage value stored in the storage unit 30 include absolute temperature under measurement of absolute temperature, the digital value at the absolute temperature, and the sensor voltage value at the absolute temperature.Type: GrantFiled: April 16, 2021Date of Patent: March 14, 2023Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Masanori Ikeda, Tadashi Kameyama
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Patent number: 11599631Abstract: A semiconductor device and the like for maintaining a required function while suppressing unauthorized accesses are provided. The semiconductor device 100 includes a main control device 110 and a sub-control device 120. The main control device 110 includes a main memory 112 for storing main programs for receiving external signals, and a trigger signal output circuit 115 for outputting a trigger signal when an abnormal signal process differs from preset signal processing is performed. The sub-control device 120 is coupled to the main control device 110, and includes a trigger signal obtaining circuit 121 for obtaining a trigger signal, and a sub-program outputting circuit 123 for outputting a sub-program to the main control device 110 based on the obtained trigger signal.Type: GrantFiled: September 20, 2019Date of Patent: March 7, 2023Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Kazuki Onda, Masamitsu Muratani, Hiroshi Yagi