Patents Assigned to RENESAS
  • Patent number: 11435525
    Abstract: A semiconductor device includes a first insulating film, a first optical waveguide and a second optical waveguide. The first insulating film has a first surface and a second surface opposite to the first surface. The first optical waveguide is formed on the first surface of the first insulating film. The second optical waveguide is formed on the second surface of the first insulating film. The second optical waveguide, in plan view, overlaps with an end portion of the first optical waveguide without overlapping with another end portion of the first optical waveguide.
    Type: Grant
    Filed: May 14, 2020
    Date of Patent: September 6, 2022
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Tetsuya Iida, Yasutaka Nakashiba
  • Patent number: 11435645
    Abstract: A semiconductor device has a first semiconducting layer including an optical waveguide, a dielectric layer formed on the optical waveguide, and a conductive layer formed on the dielectric layer. A refractive index of a material of the conductive layer is smaller than a refractive index of a material of the first semiconductor layer.
    Type: Grant
    Filed: May 12, 2020
    Date of Patent: September 6, 2022
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Tetsuya Iida, Yasutaka Nakashiba
  • Patent number: 11437862
    Abstract: A wireless transmitter with Q-factor measurement is presented. In some embodiments, a method of performing a measurement test in a wireless power transmitter includes adjusting an input voltage to a bridge circuit; setting up transistors in the wireless power transmitter to form an LC oscillating circuit that includes a transmit coil and a capacitor circuit; measuring a VDET sinusoidal voltage from the LC oscillating circuit; and determining a result from the VDET sinusoidal voltage. The result can be calculation of a Q-factor and/or determination of presence of a foreign object.
    Type: Grant
    Filed: September 2, 2020
    Date of Patent: September 6, 2022
    Assignee: RENESAS ELECTRONICS AMERICA INC.
    Inventor: Chenggang Deng
  • Patent number: 11437341
    Abstract: A semiconductor device comprises two memory chips, one control chip controlling each memory chip, a signal transmission path through which a signal transmission between the control chip and each memory chip is performed, and a capacitance coupled onto the signal transmission path. Also, the capacitance (capacitor element) is larger than each parasitic capacitance parasitic on each chip. Accordingly, it is possible to perform the signal transmission of the semiconductor device at high speed.
    Type: Grant
    Filed: December 1, 2020
    Date of Patent: September 6, 2022
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Ryuichi Oikawa
  • Publication number: 20220276646
    Abstract: Example implementations include a method of pre-bootup fault monitor of a LASER diode driver output, by applying a first power to a pre-bootup fault monitor device, setting a fault condition at the pre-bootup fault monitor device to a no-fault state, initiating the pre-bootup fault monitor device, determining whether a first impedance of driver output satisfies an impedance threshold, and in response to a determination that the first impedance satisfies the impedance threshold, applying a second power to the output device.
    Type: Application
    Filed: March 1, 2021
    Publication date: September 1, 2022
    Applicant: Renesas Electronics America Inc.
    Inventors: Lokesh KUMATH, Muthukumaran CHANDRASEKARAN, Berry CONCKLIN, Bin LIU, Ha Chu VU, Matthew COLE
  • Publication number: 20220278819
    Abstract: A slave device for IO-Link communication with a master device, wherein the master device and the slave device operate on a common basic timing, the slave device including at least one Universal Asynchronous Receiver Transmitter (UART) module configured to detect an INIT request sent from the master device during communication setup, calculate an actual timing of the master device from the INIT request and correct an initial timing of the slave device to an actual timing of the slave device based on the actual timing of the master device.
    Type: Application
    Filed: February 25, 2022
    Publication date: September 1, 2022
    Applicant: Renesas Electronics Germany GmbH.
    Inventors: Lars GOEPFERT, Thomas REICHEL, Tilo SCHUBERT, Miru Richard GEORGE
  • Patent number: 11431378
    Abstract: The present invention provides a semiconductor device realizing suppression of increase in consumption power. A semiconductor device has a signal line, a reception buffer circuit which is coupled to an end of the signal line and to which a signal is supplied from the signal line, and a delay element which is wired-OR coupled to an end of the signal line and shapes a waveform of a signal at the end of the signal line.
    Type: Grant
    Filed: December 6, 2019
    Date of Patent: August 30, 2022
    Assignee: Renesas Electronics Corporation
    Inventor: Ryuichi Oikawa
  • Patent number: 11425542
    Abstract: A semiconductor device includes a communication unit which receives a frame at a first transmission period, demodulates control information from a received frame, modulates transmission data, and broadcasts a modulated transmission data at a second transmission period as a radio frequency packet signal, a period determination unit which determines the second transmission period based on vehicle information, and a transmission and reception control unit which generates a transmission timing trigger signal for determining a transmission timing of the transmission data based on the control information and the second transmission period, and outputs the transmission data to the communication unit in synchronization with the transmission timing trigger signal. The second transmission period is equal to or longer than the first transmission period.
    Type: Grant
    Filed: November 1, 2019
    Date of Patent: August 23, 2022
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Hiroshi Chano, Suguru Fujita
  • Patent number: 11422960
    Abstract: A semiconductor device includes an interrupt control circuit that receives a plurality of interrupt signals from the circuit blocks and outputs an interrupt request to the processor, and an interrupt monitoring circuit that corresponds to one of the interrupt signals and includes a setting circuit for setting a monitoring type and first and second monitoring periods. If the monitoring type indicates an asserted state of the interrupt signal, the interrupt monitoring circuit monitors the asserted state. If a first duration of the continuous asserted state exceeds the first monitoring period, the interrupt monitoring circuit detects the state as a failure. If the monitoring type indicates a negated state of the interrupt signal, the interrupt monitoring circuit monitors the negated state. If a second duration of the continuous negated state exceeds the second monitoring period, the interrupt monitoring circuit detects the state as a failure.
    Type: Grant
    Filed: May 13, 2021
    Date of Patent: August 23, 2022
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Kyohei Yamaguchi, Daisuke Kawakami, Hiroyuki Hamasaki
  • Patent number: 11418048
    Abstract: The present embodiments are directed to methods and apparatuses for operating a battery charger in computing systems having certain system load requirements, battery configurations and external device power supply support. According to some aspects, the present embodiments provide methods and apparatuses for providing a reverse boost mode of operation when the battery charger is providing system power from a battery, such as when an adapter is not connected. The reverse boost mode of operation according to embodiments provides a regulated output voltage, thereby allowing a load such as a CPU to operate at maximum performance, even when the battery has discharged below a threshold discharge level.
    Type: Grant
    Filed: June 25, 2019
    Date of Patent: August 16, 2022
    Assignee: RENESAS ELECTRONICS AMERICA INC.
    Inventors: Sungkeun Lim, Mehul Shah, Jia Wei, Lei Zhao
  • Patent number: 11418118
    Abstract: One or more embodiments relate to a regulation loop control circuit for regulation of a parameter such as an input voltage or output voltage for a buck-boost converter. In these and other embodiments, the regulation loop control circuit is configured to select between an input voltage loop for regulation of the input voltage or an output voltage loop for regulation of the output voltage in response to an input voltage error, an output voltage error, and a threshold detector to protect the converter without sacrificing output voltage regulation and transient response.
    Type: Grant
    Filed: February 7, 2020
    Date of Patent: August 16, 2022
    Assignee: RENESAS ELECTRONICS AMERICA INC.
    Inventors: Michael Jason Houston, Allan Warrington
  • Patent number: 11419118
    Abstract: A roadside radio device includes a first radio unit which receives a radio data packet from an in-vehicle radio device, and a first application unit which receives application data included in the radio data packet. A first application unit includes a vehicle class information comparison unit which compares vehicle identification information with communication type information. When the vehicle class information comparison unit determines that the vehicle identification information and the communication type information match, the first application unit processes the application data received from the first radio unit. When the vehicle class information comparison unit determines that the vehicle identification information and the communication type information do not match, the first application unit treats, as invalid data, the application data received from the first radio unit.
    Type: Grant
    Filed: September 29, 2020
    Date of Patent: August 16, 2022
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Suguru Fujita, Takashi Tono
  • Patent number: 11415666
    Abstract: A MASH type sigma delta AD converter includes a modulator, an analog filter filtering an extraction signal obtained by extracting a probe signal and an quantization error generated in a quantizer within a sigma delta modulator, a low speed AD converter performing an AD conversion of an output signal of the analog filter, a first adaptive filter searching for a transfer function of the sigma delta modulator, a second adaptive filter searching for a transfer function from an output of the modulator to the low speed AD converter via the analog filter, and a noise cancellation circuit cancelling the probe signal and the quantization error included in an output signal of the quantizer using the search results by the first and second adaptive filters.
    Type: Grant
    Filed: September 27, 2019
    Date of Patent: August 16, 2022
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Takashi Oshima, Tetsuo Matsui, Mitsuya Fukazawa, Katsuki Tateyama, Masaki Fujiwara
  • Publication number: 20220255537
    Abstract: Systems, apparatuses, and methods for charging a bootstrap capacitor of a device during low power states are described. In an example, an apparatus can include a controller configured to enable a low power state of the device. The device can include a high side switching element and a low side switching element. The controller can, in response to the low power state of the device being enabled, operate the low side switching element of the device to charge the bootstrap capacitor of the device. The controller can, in response to the low power state of the device being enabled and a level of a control signal being a first level, activate the low side switching element to charge the bootstrap capacitor of the device.
    Type: Application
    Filed: June 11, 2021
    Publication date: August 11, 2022
    Applicant: Renesas Electronics America Inc.
    Inventors: Aaron Shreeve, Chun Cheung, Michael Jason Houston, Mehul Shah
  • Patent number: 11409930
    Abstract: A computer-implemented method of generating functional safety data for a design of an electronic component includes receiving attribute data for elements in an electronic component. The attribute data include element data for the elements, wherein element data for a given element include an identity of the given element and a failure rate characteristic for the given element. The attribute data include functionality data for element functionalities, wherein functionality data for a given element functionality include an identity of a use case, an identity of an element, an identity of a fault characterization for providing information about one or more fault models and a configurable data for controlling selection and use of the given functionality data when generating the functional safety data. The method also includes generating the functional safety data using the attribute data and storing a report including the functional safety data.
    Type: Grant
    Filed: January 8, 2018
    Date of Patent: August 9, 2022
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Agostino Cefalo, Ricardo Vincelli
  • Patent number: 11409312
    Abstract: One or more embodiments relate to a multi-phase voltage regulator with AVP or droop configured to implement a non-linear load line. According to certain aspects, the non-linear load line can have a non-linear or zero slope in a first current/voltage region and a constant non-zero slope in second current/voltage region. In embodiments, the non-linear or zero slope region can specify that for any value of output current in that region, the output voltage will be the same predetermined value. The non-zero slope region can specify that for any value of the output current in that region, output current will be multiplied by a constant non-zero droop resistance value.
    Type: Grant
    Filed: April 23, 2020
    Date of Patent: August 9, 2022
    Assignee: RENESAS ELECTRONICS AMERICA INC.
    Inventors: Travis Guthrie, Jim Toker, Shea Petricek
  • Patent number: 11397527
    Abstract: It is an object of the present invention to provide a technique capable of performing user estimation without making the user aware of it. The appliance has a first sensor input unit that inputs a plurality of control commands for controlling an operation, and estimates the user based on the control command input to the first sensor input unit and an operation feature amount at the time of inputting the control command. The first sensor input unit includes a touch panel. The operation feature amount includes an operation position of the touch panel, an electrostatic capacitance value corresponding to a pressing of the touch panel, and a time-dependent change pattern thereof.
    Type: Grant
    Filed: October 8, 2019
    Date of Patent: July 26, 2022
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Wataru Kurihara, Takehiro Mikami
  • Patent number: 11398272
    Abstract: Along with the miniaturization of the semiconductor memory device, the resistor and parasitic capacitance of the wires become large, which prevents the semiconductor memory device from being speeded up. In a semiconductor memory device having a semiconductor substrate having a main surface, a first memory cell row having a plurality of first memory cells arranged in parallel to a first direction in plan view on the main surface, a first word line connected to the plurality of first memory cells, a first word line driver for changing a potential of the first word line, and a control circuit for outputting a first predecode signal to the first word line driver via the first predecode line in response to a clock signal and an address signal, a repeater is inserted between the control circuit and the first word line driver.
    Type: Grant
    Filed: November 11, 2020
    Date of Patent: July 26, 2022
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Makoto Yabuuchi
  • Patent number: 11391389
    Abstract: The semiconductor device controls the first circuit for supplying/stopping the current supplied by a DC power supply to the latching solenoid consisting of a coil and a movable iron core and a permanent magnet, the current is measured based on the input from the current detection circuit. The semiconductor device includes a control circuit having a low power dissipation mode in which the leakage current is reduced, and a normal operation mode. The control circuit maintains the low power consumption mode when no current is flowing through the coil, when a current is flowing through the coil maintains the normal operation mode, further, the movable iron core It comprises a control circuit configured to detect the inflection point of the current detected by the current detection circuit when leaving the permanent magnet.
    Type: Grant
    Filed: March 16, 2020
    Date of Patent: July 19, 2022
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Shiro Kamohara, Kazuya Uejima
  • Patent number: 11393838
    Abstract: When a memory cell is formed over a first fin and a low breakdown voltage transistor is formed over a second fin, the depth of a first trench for dividing the first fins in a memory cell region is made larger than that of a second trench for dividing the second fins in a logic region. Thereby, in the direction perpendicular to the upper surface of a semiconductor substrate, the distance between the upper surface of the first fin and the bottom surface of an element isolation region in the memory cell region becomes larger than that between the upper surface of the second fin and the bottom surface of the element isolation region in the logic region.
    Type: Grant
    Filed: February 10, 2020
    Date of Patent: July 19, 2022
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Shibun Tsuda, Tomohiro Yamashita