Abstract: Exemplary implementations include a device with a first battery manager circuit operatively coupled to a system voltage node and a battery node, a second battery manager circuit operatively coupled to the system voltage node and the battery node, a first charger circuit operatively coupled to the first battery manager circuit to receive a first current sensing input and transmit a first battery control signal, and a second charger circuit operatively coupled to the second battery manager circuit to receive a second current sensing input and transmit a second battery control signal.

Abstract: Access control is achieved in consideration of write training. Masters issue access requests including a read request and a write request. A memory controller accesses memory in response to the access requests issued by the maters. A central bus-control system controls the output of the access requests issued by the masters to the memory controller. A training circuit conducts training on the memory while the access to the memory is stopped. The central bus-control system further controls the execution of the training on the memory. During the training, the central bus-control system suppresses the output of the read request to the memory controller from among the access requests issued by the masters.

Abstract: A data receiving device includes: a receiving unit that receives data, a list of individual identifiers, and a MAC generated by the repeater device; a pseudo-random function processing unit that derives a secret key by performing arithmetic by a predetermined pseudo-random function; a MAC generating function processing unit that generates MAC by performing arithmetic by a predetermined MAC generating function; a pseudo-random function processing controller that performs control to generate recursively a secret key corresponding to the individual identifier of each communication device from the first hierarchy to the N-th hierarchy; a MAC generating function processing controller that performs control to generate recursively a MAC corresponding to each communication device from the N-th hierarchy to the first hierarchy; and a comparator that compares the received MAC with the generated MAC corresponding to the communication device of the first hierarchy.

Abstract: Performance of a semiconductor device is improved. An active cell region has a first gate electrode that extends in a Y direction and receives a gate potential, and a second gate electrode that extends in the Y direction and receives an emitter potential. A hybrid cell region including a p-type base region and an n-type emitter region is disposed in the active cell region. An n-type isolation region adjacent to the hybrid cell region in the Y direction is formed in the active cell region excluding the hybrid cell region. Hence, even if the p-type base region or a p-type floating region is formed in the active cell region excluding the hybrid cell region, such a p-type region is isolated from the base region in the hybrid cell region by the isolation region.

Abstract: A small area oscillator circuit is provided. The oscillator circuit includes first and second constant current sources, a comparator, first and second capacitive elements, and a resistive element. In a first state, the first capacitive element is connected to the first constant current source and the fixed voltage node, the second capacitive element is connected to the second constant current source and the first current source, and resistive element is connected to the second constant current source. In a second state, the first capacitive element is connected to the second constant current source and first constant current source, the second capacitive element is connected to the second constant current source and the fixed voltage node, and the resistive element is connected to the first constant current source.

Abstract: An operation part calculates a shake amount of an imaging apparatus in accordance with a first operation system or a second operation system on the basis of an output signal of a sensor detecting an acceleration or angular velocity to determine a camera-shake correction amount correcting the shake amount. The operation part calculates the output signal of the sensor or a value obtained by integrating an integrated signal of the output signal of the sensor as a shake amount. The operation part includes an imperfect integrator. An operation system setting part sets an operation system of the operation part on the basis of the shake amount calculated by the operation part. In the second operation system, the operation system setting part increases a cut-off frequency of the imperfect integrator more than in the first operation system.

Abstract: The semiconductor device SD1a includes a first wiring M2 and a second wiring M3. The semiconductor device includes a first conductor pattern DM, a first via V2 in contact with the first wiring M2 and the second wiring M3, and a second via DV1,DV2,DV3,DV4 in contact with the first conductor pattern DM and the second wiring M3. In plan view, the distance between the second via DV1 closest to the corner portion CI of the second wire M3 and the corner portion CI is shorter than the distance between the first via V2 and the corner portion CI, and the distance between the second vias adjacent to each other is shorter than the distance between the second via DV3 closest to the first via V2 and the first via V2.

Abstract: A semiconductor device includes a master circuit which outputs a first write request signal for requesting to write data, a bus which receives the data and the first write request signal, a bus control unit which is arranged on the bus, generates an error detection code for the data and generates a second write request signal which includes second address information corresponding to first address information included in the first write request signal and memory controllers which each write the data into a storage area of an address designated by the first write request signal and writes the error detection code into a storage area of an address designated by the second write request signal in the storage areas of memories.

Abstract: The semiconductor device includes an optical waveguide WG1 formed in a planar manner, and a three-dimensional optical waveguide WG2 optically connected with the optical waveguide WG1 and including a curved shape.

Abstract: A semiconductor device with improved reliability is provided. The semiconductor device is characterized by its embodiments in that sloped portions are formed on connection parts between a pad and a lead-out wiring portion, respectively. This feature suppresses crack formation in a coating area where a part of the pad is covered with a surface protective film.

Abstract: A sensor monitors a treatment status of a predetermined manufacturing device, and an abnormality detection device detects an abnormality of a sensor signal that is a monitoring result of the sensor. The sensor signal is a digital data group obtained by sampling an analog waveform at a predetermined sampling period. A management apparatus learns characteristics of a plurality of digital data groups accumulated in past times through use of artificial intelligence to generate a learned model. An abnormality detection device holds the learned model and determines whether an abnormality is present in the digital data group of a current processing target by using the learned model.

Abstract: A semiconductor device includes a substrate having a first surface and a second surface that have top and back relation, an insulating layer formed on the first surface of the substrate, and an optical waveguide formed on the insulating layer and formed of a semiconducting layer. A first opening is formed on the second surface of the substrate. The first opening overlaps the optical waveguide in plan view.

Abstract: A semiconductor device is provided which includes an interlayer dielectric formed on a semiconductor substrate, a first insulating layer, having a trench, formed on the interlayer dielectric, a barrier film formed on side and bottom surfaces of the first trench, an electric fuse formed on the barrier film, a second insulating layer formed to directly contact the electric fuse, and a third insulating layer formed on the second insulating layer. A linear expansion coefficient of the electric fuse is greater than a linear expansion coefficient of the first insulating layer and the second insulating layer, and a melting point of the barrier film is greater than a melting point of the electric fuse.

Abstract: A provided impedance measuring semiconductor circuit can suppress the influence of sensors on the measurements of other sensors in the measurements of the sensors. According to an embodiment, an impedance measuring semiconductor circuit includes a first resistance element, an operational amplifier having a positive input terminal and an output terminal, the positive input terminal receiving a predetermined set voltage, the output terminal being coupled to one end of the first resistance element, a first output-side switch that electrically couples or decouples a first sensor and the other end of the first resistance element, a second output-side switch that electrically couples or decouples a second sensor and the other end of the first resistance element, a first input-side switch that electrically couples or decouples the first sensor and a negative input terminal, and a second input-side switch that electrically couples or decouples the second sensor and the negative input terminal.

Abstract: Methods of controlling semiconductor device and semiconductor device are provided in which a semiconductor device can define a normally operational ambient temperature at a low level. The Microcontroller includes a logical block, a temperature sensor for measuring junction temperature, a power consumption circuit for consuming predetermined power, and a Controller for controlling the consumption of power by the power consumption circuit such that the temperature measured at the temperature sensor is not less than a predetermined operational lower limit temperature of the logical block 110.

Abstract: To provide a microcontroller that suppresses increase of power consumption during debugging, a microcontroller according to the present invention includes a first signal processing circuit, a second signal processing circuit that performs signal processing in the same manner as the first signal processing circuit, a comparing circuit that compares a processing result of the first signal processing circuit and a processing result of the second signal processing circuit with each other, and outputs an error signal when an error is detected, a suppressing signal input unit that receives a suppressing signal for suppressing an operation of the second signal processing circuit and an operation of the comparing circuit, a suppressing circuit that receives the suppressing signal from the suppressing signal input unit and suppresses the operation of the second signal processing circuit and the operation of the comparing circuit, and a pseudo error signal output circuit that outputs a pseudo error signal in place of t

Abstract: The reliability of an electronic device is improved. An electronic device has a wiring substrate and a housing made of a metal for supporting the wiring substrate. A semiconductor device having a switching power transistor is mounted at the wiring substrate. A ground pattern of a conductive film and a heat radiation pattern of a conductive film are formed at the wiring substrate. The heat radiation pattern is not electrically coupled with any electronic component mounted at the wiring substrate, and is also not electrically coupled with the ground pattern. The ground pattern overlaps the semiconductor device in the thickness direction of the wiring substrate. The heat radiation pattern overlaps the ground pattern in the thickness direction of the wiring substrate, and overlaps a region where the housing and the wiring substrate are in contact with each other.

Abstract: A semiconductor device capable of turning a discharge control transistor off faster while maintaining safety is provided. A control unit, in discharge stopping processing, turns a switching element on and executes a first discharge-stopping mode in which the gate voltage of the discharge control transistor is withdrawn via a load and, at a predetermined discharge-stopping mode switching timing, switches to a second discharge-stopping mode in which the gate voltage of the discharge control transistor is withdrawn directly to a low-voltage power source.

Abstract: Reliability of a semiconductor device is improved. The semiconductor device includes a silicon pattern for a fuse element, a metal silicide layer formed on an upper surface and a side surface of the silicon pattern, a gate electrode for MISFET, and a metal silicide layer formed on an upper surface of the gate electrode. The height from the lower surface of the silicon pattern to the lower end of the metal silicide layer is lower than the height from the lower surface of the gate electrode to the lower end of the metal silicide layer.

Abstract: A semiconductor device which eliminates the need for high fillability through a simple process and a method for manufacturing the same. A high breakdown voltage lateral MOS transistor including a source region and a drain region is completed on a surface of a semiconductor substrate. A trench which surrounds the transistor when seen in a plan view is made in the surface of the semiconductor substrate. An insulating film is formed over the transistor and in the trench so as to cover the transistor and form an air-gap space in the trench. Contact holes which reach the source region and drain region of the transistor respectively are made in an interlayer insulating film.