Abstract: A semiconductor device with improved reliability is provided. The semiconductor device is characterized by its embodiments in that sloped portions are formed on connection parts between a pad and a lead-out wiring portion, respectively. This feature suppresses crack formation in a coating area where a part of the pad is covered with a surface protective film.

Abstract: The present embodiments relate generally to DC-DC converters, and more particularly to methods and apparatuses for preservation of phase-interleaving in a hysteretic multiphase buck controller. In one or more embodiments, a notch filter is placed in the compensation loop. The notch frequency can be adjusted to match the switching frequency of the controller, and automatically tuned to account for changes to the switching frequency introduced by controller RC components. According to additional aspects, phase interleaving is preserved even during large duty cycles.

Abstract: The performance of a semiconductor device is improved. An emitter electrode is coupled to a P-type body region and an N+-type emitter region of a linear active cell region via a contact groove formed on an interlayer insulating film and is coupled to a P-type body region of a linear hole connector cell region via a contact groove. The contact grooves arranged in the linear hole connector cell region are shorter than the contact groove in plan view.

Abstract: A method for calibrating a driving amount of an actuator configured to correct blurring of an image taken by a camera attached to a device includes: taking an image of a mark by a camera to generate a first image, the mark reflecting a predetermined posture of the device; detecting a tilt of the mark in the first image; and based on the tilt of the mark, correcting the driving amount of the actuator that is predetermined according to a sensing result of a sensor for sensing a change in a posture of the device.

Abstract: An object of the present invention is to provide a semiconductor device and a control method thereof that can suppress a circuit scale from being increased while maintaining a high interruption response performance.

Abstract: As a barrier metal film, a titanium film is formed by a sputtering process, and a titanium nitride film is formed to cover the titanium film by a CVD process. Next, the back surface of a semiconductor substrate is cleaned by spraying a cleaning chemical liquid toward the back surface thereof, and a portion of the barrier metal film located in the outer peripheral portion is removed by causing the cleaning chemical liquid to wrap around toward the surface side of the outer peripheral portion from the back surface side. Next, a tungsten film is formed to cover the barrier metal film by a CVD process.

Abstract: A data processing device includes a data selector circuit that divides a plurality of types of data into another plurality of types of data in accordance with a classification of the data, a plurality of compression circuits that respectively compress the plurality of types of data in parallel with each other in accordance with each of the plurality of types of data, and a data transmission circuit that transmits the plurality of types of compressed data to a terminal.

Abstract: A semiconductor device including an IGBT element having features of a low on-state voltage and a low turn-off loss is provided. The semiconductor device is comprised of a trench gate type IGBT element. The IGBT element includes: a plurality of gate trench electrodes to which gate potential is given; and a plurality of emitter trench electrodes to which emitter potential is given. Between adjacent trench electrodes, a contact to an emitter electrode layer is formed. In this regard, there is formed, in the semiconductor substrate, a P type floating region which is in contact with bottom portions of at least some of the emitter trench electrodes via an interlayer insulation layer.

Abstract: There is a need for high-order frequency measurement without greatly increasing consumption currents and chip die sizes. A semiconductor device includes: an electric power measuring portion that performs electric power measurement; a high-order frequency measuring portion that performs high-order frequency measurement; and a clock controller that supplies an electric power measuring portion with a first clock signal at a first sampling frequency and supplies a high-order frequency measuring portion with a second clock signal at a second sampling frequency. The second sampling frequency is higher than the first sampling frequency.

Abstract: First, half etching is performed to a semiconductor layer formed on an insulating layer to form trenches at positions of slab-portion regions in which slab portions are to be formed. After filling the trenches with an insulating film, a resist mask which covers the semiconductor layer at a projecting-portion region in which a projecting portion is to be formed and whose pattern ends are located on upper surfaces of the insulating films is formed on upper surfaces of the semiconductor layer and the insulating film, and full etching is performed to the semiconductor layer with using the resist mask and the insulating film as an etching mask, thereby forming an optical waveguide constituted of the projecting portion and the slab portions. Thereafter, a first interlayer insulating film is formed to cover the optical waveguide.

Abstract: An object of the present invention is to increase speed of retransmission. A communication device has a transmission unit, a reception unit, a comparison unit, and a retransmission control unit. The transmission unit transmits first data toward a communication party. The reception unit receives second data as the first data received and returned by the communication party. The comparison unit is a process unit in a data link layer and compares the transmitted first data with the received second data. The retransmission control unit is a process unit in the data link layer and, when the transmission first data and the received second data do not match as a result of the comparison by the comparison unit, controls retransmission of the first data.

Abstract: It is possible to achieve monitoring of a processor element while suppressing the cost. A multiprocessor system 1 includes a bus mechanism including a storage unit 6 configured to store bus access information when a first processor element 2 has executed a process to be monitored, a requesting unit 7 configured to request a second processor element 3 to execute a monitoring process after the first processor element 2 has completed the execution of the process to be monitored, and a comparing unit 8 configured to compare bus access information regarding access of the first processor element 2 stored in the storage unit 6 with bus access information input from the second processor element 3 when the second processor element 3 has executed the monitoring process. The second processor element 3 executes the monitoring process in an idle time.

Abstract: A semiconductor device having an active mode and a standby mode as operation modes, includes a first power supply line supplied with a first internal power supply voltage from a first external power supply and an internal power supply circuit generating a second internal power supply voltage based on an external power supply voltage from a second external power supply circuit. A second power supply line supplied with said second internal power supply voltage from said internal power supply circuit.

Abstract: A semiconductor integrated circuit includes a transformer that includes a first winding and a second winding, a low-noise amplifier circuit that includes an input terminal in which at least one end of the second winding of the transformer is connected to the input terminal; and a switch that is provided between the one end and another end of the second winding of the transformer. The switch is opened and the transformer functions as an input impedance matching circuit for the low-noise amplifier circuit in a period in which a reception signal is supplied to the first winding of the transformer. On the other hand, the switch is closed and the transformer is caused to become an element including a predetermined capacitance in a period in which another circuit connected to the predetermined node operates.

Abstract: Occurrence of short-channel characteristics and parasitic capacitance of a MOSFET on a SOI substrate is prevented. A sidewall having a stacked structure obtained by sequentially stacking a silicon oxide film and a nitride film is formed on a side wall of a gate electrode on the SOI substrate. Subsequently, after an epitaxial layer is formed beside the gate electrode, and then, the nitride film is removed. Then, an impurity is implanted into an upper surface of the semiconductor substrate with using the gate electrode and the epitaxial layer as a mask, so that a halo region is formed in only a region of the upper surface of the semiconductor substrate which is right below a vicinity of both ends of the gate electrode.

Abstract: In a semiconductor memory device, static memory cells are arranged in rows and columns, word lines correspond to respective memory cell rows, and word line drivers drive correspond to word lines. Cell power supply lines correspond to respective memory cell columns and are coupled to cell power supply nodes of a memory cell in a corresponding column. Down power supply lines are arranged corresponding to respective memory cell columns, maintained at ground voltage in data reading and rendered electrically floating in data writing. Write assist elements are arranged corresponding to the cell power supply lines, and according to a write column instruction signal for stopping supply of a cell power supply voltage to the cell power supply line in a selected column, and for coupling the cell power supply line arranged corresponding to the selected column at least to the down power supply line on the corresponding column.

Abstract: The present invention is directed to a semiconductor integrated circuit device that basically has a non-memory array area, a memory array area, and memory capacitors formed across lower embedded metal interconnection layers including a low-dielectric constant interlayer insulating film in the memory array area. In addition, a memory-periphery metal seal ring is provided in the lower embedded metal interconnection layers having at least the low-dielectric constant interlayer insulating film so as to surround the memory array area.

Abstract: A control gate electrode and a memory gate electrode of a memory cell of a non-volatile memory are formed in a memory cell region of a semiconductor substrate, and a dummy gate electrode is formed in a peripheral circuit region. Then, n+-type semiconductor regions for a source or a drain of the memory cell are formed in the memory cell region and n+-type semiconductor regions for a source or a drain of MISFET are formed in the peripheral circuit region. Then, a metal silicide layer is formed over the n+-type semiconductor regions but the metal silicide layer is not formed over the control gate electrode, the memory gate electrode, and the gate electrode. Subsequently, the gate electrode is removed and replaced with the gate electrode for MISFET. Then, after removing the gate electrode and replacing it with a gate electrode for MISFET, a metal silicide layer is formed over the memory gate electrode and the control gate electrode.

Abstract: A method for manufacturing a semiconductor device includes the steps of: determining a first design dimension of a gate electrode of a selection MISFET, a second design dimension of a sidewall insulating film, and initial setting conditions for ion implantation for a high-concentration semiconductor region; forming the gate electrode; measuring a first processed dimension of the gate electrode; implanting ions to form a low-concentration semiconductor region at each end of the gate electrode; forming the sidewall insulating film over a sidewall of the gate electrode; measuring a second processed dimension of the sidewall insulating film; and implanting ions to form a high-concentration semiconductor region. In the former implantation step, execution conditions to the initial setting conditions are reset according to a deviation of the first processed dimension from the first design dimension and a deviation of the second processed dimension from the second design dimension, and the step is executed.

Abstract: In a radio transmitting apparatus 10, a radio transmitting unit (radio transmitter) 13 repeatedly transmits a plurality of divided data units generated by a control unit (controller) 11 while cyclically shifting, among a plurality of transmission channels, a transmission channel to be used for transmitting each of the divided data units over a plurality of transmission interval periods.