Abstract: A device includes digital signature generation circuitry. The digital signature generation circuitry, in operation, generates a digital signature of a digital message by computing a first public curve point as a scalar product of a first secret integer key and a base point of an elliptic curve and applying a transform to data of the received digital message.

Abstract: A laserbeam light source is controlled to avoid light sensitive regions around the laserbeam light source. One or more laserlight-sensitive regions are identified based on images of an area around the laserbeam light source, and indications of positions corresponding to the laserlight-sensitive regions are generated. The laserbeam light source is controlled based on the indications of the positions. The laserbeam light source may be controlled to deflect a laserlight beam away from laserlight-sensitive regions, to reduce an intensity of a laserlight beam directed towards a laserlight-sensitive region, etc. Motion estimation may be used to generate the indications of positions corresponding to the laserlight-sensitive regions.

Abstract: A packaged MEMS device, wherein at least two support structures are stacked on each other and are formed both by a support layer and a wall layer coupled to each other and delimiting a respective chamber. The chamber of the first support structure is upwardly delimited by the support layer of the second support structure. A first and a second dice are accommodated in a respective chamber, carried by the respective support layer of the first support structure. The support layer of the second support structure has a through hole allowing wire connections to directly couple the first and the second dice. A lid substrate, coupled to the second support structure, closes the chamber of the second support structure.

Abstract: A vertical transistor includes two portions of a gate conductor that extend within a layer of insulator. An opening extending through the later of insulator includes source, channel and drain regions form by epitaxy operations. A thickness of the portions of the gate conductor decreases in the vicinity of the channel region.

Abstract: An electronic device includes a rectifier bridge that includes an input configured to be coupled to power over Ethernet (PoE) power sourcing equipment (PSE), and an output. A transistor is configured to selectively couple the output with a load. The electronic device includes a maintain power signature (MPS) device, and a control circuit. The control circuit is to maintain the transistor on when a load current is above a threshold, source current from the rectifier bridge to the MPS device when the load current is below the threshold, and switch the transistor to a diode configuration when the load current is below the threshold.

Abstract: A sensor chip is mounted on a PCB and electrically connected to a SOC mounted on the PCB via at least one conductive trace. The sensor chip includes configuration registers storing and outputting configuration data, and a PLD receiving digital data. The PLD performs an extraction of features of the digital data in accordance with the configuration data, and the configuration data includes changeable parameters of the extraction. A classification unit processes the extracted features of the digital data so as to generate a context of an electronic device into which the sensor chip is incorporated relative to its surroundings, the processing being performed in using a processing technique operating in accordance with the configuration data. The configuration data also includes changeable parameters of the processing technique. The classification unit outputs the context to data registers for storage.

Abstract: A circuit includes a random oscillation number generator (RONG) configured to generate first and second pulse signals at first and second RONG outputs. A first counter is coupled to the first RONG output and generates a first count at a first counter output. A second counter is coupled to the second RONG output and generates a second count at a second counter output. A selection circuit is coupled to the first and second counter outputs and to the first and second RONG outputs. A first pulse shaper is connected between the first RONG output and the first counter, and a second pulse shaper is connected between the second RONG output and the second counter.

Abstract: Data words are received in parallel in response to an edge of a master clock signal and selected for serial output in response to a select signal. For a detected temporal offset of the serially output data words, the generation of the select signal and the master clock signal are controlled to correct for the temporal offset by shifting timing of the edge of the master clock signal and adjusting a sequence of values for the select signal that are generated within one cycle of the master clock signal. For a backward temporal offset, at least one count value in the sequence of values is skipped and the edge of the master clock signal occurs earlier in time. For a forward temporal offset, at least one count value in the sequence of values is held and the edge of the master clock signal occurs later in time.

Abstract: The power supply device comprises a supply transistor commanded by a command signal and providing electric power to a lighting module, and a driving means configured to selectively generate, depending on an instruction signal representative of the structure of said at least one lighting module, a first command signal able to command the supply transistor into an ohmic regime, a second command signal able to command the supply transistor into a pulse width modulation regime involving an alternation of ohmic regimes and blocked regimes, and a third command signal able to command the supply transistor into a saturated regime.

Abstract: A semiconductor substrate has a back side surface and a front side surface. Metallization levels are provide at the front side surface. Capacitive deep trench isolation structures extend completely through the semiconductor substrate from the front side surface to the back side surface. Each capacitive deep trench isolation structure includes a conductive region insulated from the semiconductor substrate by an insulating liner. The conductive regions at first ends of the plurality of capacitive deep trench isolation structures are electrically connected to a first metallization level by electrical contacts. A bonding pad structure is located at the back side surface of the semiconductor substrate in direct physical and electrical connection to the conductive regions at second ends of the capacitive deep trench isolation structures.

Abstract: Electrostatic discharge (ESD) protection is provided in using a supply clamp circuit including a trigger actuated MOSFET device. Triggering of the MOSFET device is made in response to detection of either a positive ESD event or a negative ESD event.

Abstract: The amount of power being output to the load is sensed by sampling the frequency of the pulse width modulation signal that is controlling the switch that is providing the power to the load. If the pulse width modulation signal has a high frequency, then it will be providing higher power to the load. As the power drawn by the load decreases, the frequency of the pulse width modulation power supply signal will decrease. By sensing and periodically sampling the frequency of the pulse width modulation signal that is providing power, the demand of the load can be quickly and accurately determined. As the power demand of the load decreases, the peak current that the power supply switch can provide also decreases. The permitted peak current dynamically changes to adapt to the power drawn by the load.

Abstract: A method for manufacturing a cover for an electronic package includes placing an insert having opposite faces between opposite faces of a cavity of a mold. A coating material is injected in the mold cavity around the insert. The coating material is then set to form a substrate that is overmolded around the insert and produce the cover.

Abstract: A proximity detector device may include a first interconnect layer including a first dielectric layer, and first electrically conductive traces carried thereby, an IC layer above the first interconnect layer and having an image sensor IC, and a light source IC laterally spaced from the image sensor IC. The proximity detector device may include a second interconnect layer above the IC layer and having a second dielectric layer, and second electrically conductive traces carried thereby. The second interconnect layer may have first and second openings therein respectively aligned with the image sensor IC and the light source IC. Each of the image sensor IC and the light source IC may be coupled to the first and second electrically conductive traces. The proximity detector device may include a lens assembly above the second interconnect layer and having first and second lenses respectively aligned with the first and second openings.

Abstract: A circuit includes an input transistor pair with first and second input transistors, the first input transistor having a control terminal configured to receive an input signal and a cascode transistor pair including a first and second cascode transistors having a common control node. A bias circuit has a bias input configured to receive the input signal and a first bias output coupled to the common node of the first and second cascode transistors. The bias circuit includes a signal tracking circuit operating to generate the first bias output to track the input signal. A pair of load transistors are coupled to the input transistor pair and biased by a second bias output of the bias circuit.

Abstract: An assembly of batteries includes a first battery and a second battery electrically connected in parallel. The first battery is configured to deliver a battery capacity in a first power supply voltage range. The second battery is configured to deliver a battery capacity in a second voltage range. An upper limit of the second voltage range is set between upper and lower limits of the first voltage range. In an operating system, if supplied battery power falls below a threshold, the parallel connected first and second batteries are disconnected from the load.

Abstract: An active noise cancelling device including a sensor configured to convert acoustic signals into first audio signals and a speaker acoustically coupled to the sensor A control stage is configured to control the speaker based on the first audio signals to cause the speaker to produce cancelling acoustic waves that tend to suppress acoustic noise components in the acoustic signals. The control stage includes sigma-delta modulator digital filters.

Abstract: A transmission chain receives an incident signal to be transmitted having a first power and a first bandwidth. A first modulator frequency shifts a first signal derived from the incident signal to generate a first shifted signal at a modulation output. A power amplifier coupled to the modulation output amplifies an intermediate signal to generate an amplified output signal. A predistortion-signal-generating circuit generates, from the incident signal and from the amplified output signal in a second bandwidth that is larger than the first bandwidth, a predistortion signal having a second power lower than the first power. A second modulator frequency shifts a second signal derived from the predistortion signal to generate a second shifted signal for combination with the first shifted signal at said modulation output to produce the intermediate signal.

Abstract: An electronic component includes a processor and a memory. The electronic component has a secure platform capable of storing at least one dual key pair and a corresponding digital signature. There is also a system including a host machine and an electronic component capable of being operated by the host machine. The electronic component has a processor, a memory, and a secure platform capable of storing at least one dual key pair and a corresponding digital signature. Another aspect describes a method, which includes reading a public key from an electronic component by a host machine, verifying the public key against a stored key in the host machine, digitally signing data using a private key from the electronic component, verifying the signed data against the stored key, and using the electronic component by the host machine only if the signed data and the public key are verified.

Abstract: In some embodiments, a contactless communication device includes an antenna, and a driving stage having a power supply terminal configured to receive a power supply voltage, where the driving stage is configured to deliver a current to the antenna. The device further includes a monitoring circuit configured to monitor the power transmitted by the antenna. The monitoring circuit is configured, in the presence of a request for a reduction in a current level of transmitted power, to reduce the power supply voltage of the driving stage down to a target value corresponding to a new level of the transmitted power less than the current level.