Abstract: A MEMS device includes a fixed structure and suspended structure including an internal structure and a first arm and a second arm. Each arm has a first end fixed to the fixed structure and a second end fixed to the internal structure. The ends are angularly arranged at a distance apart. Piezoelectric actuators mounted to the arms are driven so as to cause deformation of the arm and produce a rotation of the internal structure. In a resting condition, each of the first and second arms has a respective elongated portion with a respective concavity. The internal structure extends in part within the concavities of the elongated portions of the first and second arms.

Abstract: A method is provided for encoding an initial digital signal as an encoded signal. The initial digital signal includes a sequence of samples representing a multidimensional space. Each sample is assigned at least one physical quantity. The method includes, for some of the current samples, localized encoding of the signal as encoded local digital signals. The encoded signal includes the encoded local digital signals. The method also includes an on-the-fly analysis of a characteristic associated with the encoded signal, and a direct or indirect adjustment at the sample level, of at least one encoding parameter involved in the localized encodings so as to stabilize the value of the characteristic on a target value to within a tolerance.

Abstract: A method detects current-limit events indicating a maximum current threshold of a switching converter has been reached, A compensation voltage is adjusted in response to the detected current-limit events, where the compensation voltage defines a duty cycle of the switching converter. A time for which no current-limit events have been detected is sensed, and the value of the compensation voltage adjusted in response to the detected time reaching a time step threshold.

Abstract: The present disclosure relates to a device for generating a clock signal including a first photoresistor coupling a capacitive output node to a node receiving a first potential. A second photoresistor couples the capacitive node to a node receiving a second potential. The first and second photoresistors receive the same optical pulses of a mode-locked laser at instants in time offset by a first delay.

Abstract: A microelectronic component is capable of being used as a memory cell. The component includes a semiconductor layer resting on an insulating layer and including a doped source region of a first conductivity type, a doped drain region of a second conductivity type, and an intermediate region, non-doped or more lightly doped, with the second conductivity type, than the drain region, the intermediate region including first and second portions respectively extending from the drain region and from the source region. An insulated front gate electrode rests on the first portion. A first back gate electrode and a second back gate electrode are arranged under the insulating layer, respectively opposite the first portion and the second portion.

Abstract: A method of manufacturing bistable strips having different curvatures, each strip including a plurality of portion of layers of materials, wherein at least one specific layer portion is deposited by a plasma spraying method in conditions different for each of the strips.

Abstract: A transistor includes an active region supported by a substrate and having a source region, a channel region and a drain region. A gate stack extends over the channel region and a first sidewall surrounds the gate stack. A raised source region and a raised drain region are provided over the source and drain regions, respectively, of the active region adjacent the first sidewall. A second sidewall peripherally surrounds each of the raised source region and raised drain region. The second sidewall extends above a top surface of the raised source region and raised drain region to define regions laterally delimited by the first and second sidewalls. A conductive material fills the regions to form a source contact and a drain contact to the raised source region and raised drain region, respectively.

Abstract: A memory array includes memory cells of Z2-FET type arranged in rows and columns, wherein each memory cell includes a MOS-type selection transistor and a first region of a first conductivity type that is shared in common with a drain region of the first conductivity type of the selection transistors. The selection transistors of a same column of the memory array have a common drain region, a common source region, and a common channel region.

Abstract: An integrated circuit includes a substrate and at least one component unfavorably sensitive to compressive stress which is arranged at least partially within an active region of the substrate limited by an insulating region. To address compressive stress in the active region, the circuit further includes at least one electrically inactive trench located at least in the insulating region and containing an internal area configured to reduce compressive stress in the active region. The internal area is filled with polysilicon. The polysilicon filled trench may further extend through the insulating region and into the substrate.

Abstract: An elementary photonic interconnect switch is integrated into an optoelectronic chip and includes four simple photonic interconnect switches. Each simple photonic interconnect switch has two optical waveguides that cross and are linked by a ring resonator having one ring. A basic photonic interconnect switch, a complex photonic interconnect switch and/or a photonic interconnect network are integrated into an optoelectronic chip and including at least two elementary photonic interconnect switches.

Abstract: Electrostatic discharge (ESD) protection is provided in using a supply clamp circuit formed by an ESD event actuated transistor device. A bias current is generated in response to operation of a voltage independent current generator circuit. The bias current is sourced to ensure that the transistor device is deactuated after the ESD event is dissipated.

Abstract: A micro-electro-mechanical actuator device includes a fixed structure and a mobile structure. The mobile structure includes a first deformable band, a second deformable band, and a third deformable band, both of which extend on opposite sides of the first deformable band, each of which carries a piezoelectric actuator. In a working condition, in which the second and third piezoelectrics are biased, the second and third deformable bands are subjected to a negative bending, while the first deformable band is subjected to a positive bending. There are thus generated two translations that add together, causing a displacement of the first deformable band greater than the one that may be obtained by a single membrane of an equal base area.

Abstract: A connecting bar electrically connects separate circuit zones of an integrated circuit. The connecting bar is formed by a main portion that is a conductive strip extending above separate circuit zones to be interconnected. The conductive strip is separated from the integrated circuit by a dielectric except at the circuit zones to be interconnected. The connecting bar further includes secondary portions that are conductive pads passing through the dielectric in a vertical direction from the circuit zone to the conductive strip.

Abstract: An electronic device includes a laser source configured to direct laser radiation toward a user's hand. A laser detector is configured to receive reflected laser radiation from the user's hand. A controller is coupled to the laser source and laser detector and configured to determine a plurality of distance values to the user's hand based upon a time-of-flight of the laser radiation, calculate a mean absolute deviation (MAD) value based upon the plurality of distance values, and identify whether the user's hand is moving in a first or second gesture based upon the MAD value.

Abstract: A low dropout voltage regulator unit includes an error amplifier and a power stage having an output terminal that is looped back onto the error amplifier and is capable of delivering an output current to a load. The unit includes multiple main supply inputs that are intended to potentially receive, respectively, multiple different supply voltages. The power stage includes multiple power paths that are connected, respectively, between the main supply inputs and the output terminal, are individually selectable and each comprise an output transistor. The unit also includes a selector circuit connected to the main supply inputs and configured to select one of the power paths according to a selection criterion. The error amplifier includes an output stage configured to selectively control the output transistor of the selected power path.

Abstract: A universal electrochemical micro-sensor can be used either as a biosensor or an environmental sensor. Because of its small size and flexibility, the micro-sensor is suitable for continuous use to monitor fluids within a live subject, or as an environmental monitor. The micro-sensor can be formed on a reusable glass carrier substrate. A flexible polymer backing, together with a set of electrodes, forms a reservoir that contains an electrolytic fluid chemical reagent. During fabrication, the glass carrier substrate protects the fluid chemical reagent from degradation. A conductive micromesh further contains the reagent while allowing partial exposure to the ambient biological or atmospheric environment. The micromesh density can be altered to accommodate fluid reagents having different viscosities. Flexibility is achieved by attaching a thick polymer tape and peeling away the micro-sensor from the glass carrier substrate.

Abstract: The present disclosure relates to a device for converting an optical pulse to an electronic pulse includes a photoresistor having first and second terminals and being capable of receiving a pulsed laser signal arising from a mode-locked laser source The first terminal is linked to a node for applying a reference potential via a resistive element and a capacitive element connected in parallel. The second terminal is connected to a node for applying a supply potential.

Abstract: Various embodiments provide a parallel checker to determine whether a device under test (DUT) is functioning properly or outputting erroneous bits. A test pattern or test data is injected into the DUT, and the parallel checker compares output data of the DUT to expected data stored in the parallel checker. The parallel checker determines an error in the event that a bit in the output data does not match in the expected data. The parallel checker is independent of test pattern length and data width at the parallel input of the parallel checker. Accordingly, the parallel checker may be used for multiple different test patterns, such as a PRBS 7, a CJTPAT, CRPAT, etc. Further, the parallel checker provides high-speed synchronization between data received from the DUT and expected test data stored in the parallel checker. In addition, the parallel checker consumes relatively low power and chip area in, for example, a SoC environment.

Abstract: A semiconductor structure includes first and second source/drain region disposed in a semiconductor body and spaced from each other by a channel region. A gate electrode overlies the channel region and a capacitor electrode is disposed between the gate electrode and the channel region. A first gate dielectric is disposed between the gate electrode and the capacitor electrode and a second gate dielectric disposed between the capacitor electrode and the channel region. A first electrically conductive contact region is in electrical contact with the gate electrode and a second electrically conductive contact region in electrical contact with the capacitor electrode. The first and second contact regions are electrically isolated from one another.

Abstract: A circuit may include an array of single photon avalanche diode (SPAD) cells, each SPAD cell configured to be selectively enabled by an activation signal. The circuit may include a control circuit configured to selectively enable a subset of the array of SPAD cells based on a measured count rate of the array of SPAD cells.