Abstract: A switching device including: a body of semiconductor material, which has a first conductivity type and is delimited by a front surface; a contact layer of a first conductive material, which extends in contact with the front surface; and a plurality of buried regions, which have a second conductivity type and are arranged within the semiconductor body, at a distance from the contact layer.

Abstract: The present disclosure provides supports for microfluidic die that allow for nozzles of the microfluidic die to be on a different plane or face a different direction from electrical contacts on the same support. This includes a rigid support having electrical contacts on a different side of the rigid support with respect to a direction of ejection of the nozzles, and a semi-flexible support or semi-rigid support that allow the electrical contacts to be moved with respect to a direction of ejection of the nozzles. The semi-flexible and semi-rigid supports allow the die to be up to and beyond a 90 degree angle with respect to a plane of the electrical contacts. The different supports allow for a variety of positions of the microfluidic die with respect to a position of the electrical contacts.

Abstract: A triangular-voltage generator has an input terminal that receives a power supply voltage and an output terminal that supplies a triangular-wave voltage having a repetition period. An operational amplifier in an integrator configuration has a first input, a second input and an output coupled to the output terminal. The second input receives a reference voltage as a function of the power supply voltage. The first input is selectively and alternately connected to the input terminal during a first half-period of the repetition period and to a reference terminal during a second half-period of the repetition period.

Abstract: The present disclosure is directed to a master-slave flip-flop memory circuit having a partial pass gate transistor at the input of the master latch. The partial pass gate transistor includes a pull-up clock enabled transistor for selectively coupling a high output of a test switch to the input of the master latch. The input of the master latch is also directly coupled to a low output of the test switch around the partial pass gate. In addition, a revised circuit layout is provided in which the master latch has three inverters. A first inverter is coupled to the input of the master latch. Second and third inverters are coupled to an output of the first inverter, with the second inverter having an output coupled to the input of the first inverter, and the third inverter having an output coupled to an output of the master latch. The first and second inverters are clock enabled, and the third inverter is reset enabled.

Abstract: A circuit for controlling a capacitor having a capacitance adjustable by biasing, including an amplifier for delivering a D.C. bias voltage, having a feedback slowed down by a resistive and capacitive cell.

Abstract: A power supply voltage is monitored by a monitoring circuit including a band gap voltage generator core including a first node and a second node. A control circuit connected to the first and second nodes is configured to deliver a control signal on a first output node having a first state when an increasing power supply voltage is below a first threshold and having a second state when increasing power supply voltage exceeds the first threshold. The first threshold is at least equal to the band gap voltage. An equalization circuit also connected to the first and second nodes with feedback to the band gap voltage generator core generates the bandgap voltage at a second output node. The control signal operates to control actuation of the equalization circuit.

Abstract: A touch screen controller identifies an island in a matrix of acquired touch data values. A first sharpness of the island is calculated and a second sharpness of the island is calculated if the calculated first sharpness is greater than a sharpness threshold. A dynamic strength threshold is then determined as a function of the second sharpness if a variance of the island is greater than a dynamic variance threshold. A determination is then made that the identified island is a valid stylus island if a peak strength of the island is greater than the dynamic strength threshold.

Abstract: A MEMS device includes a fixed supporting body forming a cavity, a mobile element suspended over the cavity, and an elastic element arranged between the fixed supporting body and the mobile element. First, second, third, and fourth piezoelectric elements are mechanically coupled to the elastic element, which has a shape symmetrical with respect to a direction. The first and second piezoelectric elements are arranged symmetrically with respect to the third and fourth piezoelectric elements, respectively. The first and fourth piezoelectric elements are configured to receive a first control signal, whereas the second and third piezoelectric elements are configured to receive a second control signal, which is in phase opposition with respect to the first control signal so that the first, second, third, and fourth piezoelectric elements deform the elastic element, with consequent rotation of the mobile element about the direction.

Abstract: A micro-electro-mechanical (MEMS) device is formed in a first wafer overlying and bonded to a second wafer. The first wafer includes a fixed part, a movable part, and elastic elements that elastically couple the movable part and the fixed part. The movable part further carries actuation elements configured to control a relative movement, such as a rotation, of the movable part with respect to the fixed part. The second wafer is bonded to the first wafer through projections extending from the first wafer. The projections may, for example, be formed by selectively removing part of a semiconductor layer. A composite wafer formed by the first and second wafers is cut to form many MEMS devices.

Abstract: A voltage doubler circuit supports operation in both a positive voltage boosting mode to positively boost voltage from a first node to a second node and a negative voltage boosting mode to negatively boost voltage from the second node to the first node. The voltage doubler circuit is formed by transistors of a same conductivity type that share a common bulk that is not tied to a source of any of the voltage doubler circuit transistors. A bias generator circuit is coupled to receive a first voltage from the first node and second voltage from the second node. The bias generator circuit operates to apply a lower one of the first and second voltages to the common bulk.

Abstract: A class D amplifier receives and amplifies a differential analog signal which is then differentially integrated. Two pulse width modulators generate pulse signals corresponding to the differentially integrated analog signal and two power units generate output pulse signals. The outputs the power units are coupled to input terminals of integrators via a resistor feedback network. An analog output unit converts the pulse signals to an output analog signal. The differential integration circuitry implements a soft transition between mute/un-mute. In mute, the integrator output is fixed. During the soft transition, the PWM outputs change slowly from a fixed 50% duty cycle to a final value to ensure that no pop noise is present in the output as a result of mode change.

Abstract: A power supply voltage is monitored by a monitoring circuit including a variable current generator and a band gap voltage generator core receiving the variable current and including a first node and a second node. A control circuit connected to the first and second nodes is configured to deliver a control signal on a first output node having a first state when an increasing power supply voltage is below a first threshold and having a second state when increasing power supply voltage exceeds the first threshold. The first threshold is at least equal to the band gap voltage. An equalization circuit also connected to the first and second nodes with feedback to the variable current generator generates the bandgap voltage at a second output node. The control signal operates to control actuation of the equalization circuit.

Abstract: A device such as a laser diode is provided with a monitoring arrangement. The monitoring arrangement has voltage to current converters arranged to provide respectively currents which are proportional to the respective voltages on an anode and on a cathode of the laser diode. The monitoring arrangement provides a first output signal when the laser diode is on too long. That output signal is used to cause the laser diode to be switched off.

Abstract: A method generates a binary descriptor associated with a given point in a current frame of a succession of video frames obtained by an apparatus such as an image sensor. The method includes determining a pattern of points pairs around said given point in the current frame, and performing intensity comparison processing between the two points of each pair. The apparatus is likely to move in a rotation between the previous frame and the current frame. The method includes processing the pattern of points of the current frame with tridimensional rotation information representative of the apparatus rotation between the previous frame and the current frame and obtained from inertial measurements provided by at least one inertial sensor.

Abstract: A device, including a main element (ME) and a set of at least two auxiliary elements (SEi), said main element including a master SWP interface (MINT), each auxiliary element including a slave SWP interface (SLINTi) connected to said master SWP interface of said NFC element through a controllably switchable SWP link (LK) and management means (PRM, CTLM, AMGi) configured to control said SWP link switching for selectively activating at once only one slave SWP interface on said SWP link.

Abstract: A ranging device includes an array of photon detection devices adapted to receive an optical signal reflected by an object in an image scene. First and second logic devices are adapted to respectively combine the outputs of first and second pluralities of the photon detection devices. A first range detection circuit is coupled to outputs of the first and second logic devices and a first counter is coupled to the output of the first logic device and adapted to generate a first pixel value by counting events generated by the first plurality of photon detection devices. A second counter is coupled to the output of the second logic device and is adapted to generate a second pixel value by counting events generated by the second plurality of photon detection devices. The first and second pixel values may be used in estimating a range to the object in the image scene.

Abstract: The embodiments of the present disclosure relate to a semiconductor device and a manufacturing method therefor. The semiconductor device comprises: a die attachment pad; a stud bump located on the die attachment pad and in direct contact with the die attachment pad; a first die located on the stud bump and electrically coupled to the stud bump; and a conductive attachment material located between the die attachment pad and the first die.

Abstract: A MEMS triaxial magnetic sensor device includes a sensing structure having: a substrate; an outer frame, which internally defines a window and is elastically coupled to first anchorages fixed with respect to the substrate by first elastic elements; a mobile structure arranged in the window, suspended above the substrate, which is elastically coupled to the outer frame by second elastic elements and carries a conductive path for flow of an electric current; and an elastic arrangement operatively coupled to the mobile structure. The mobile structure performs, due to the first and second elastic elements and the arrangement of elastic elements, first, second, and third sensing movements in response to Lorentz forces from first, second, and third magnetic-field components, respectively. The first, second, and third sensing movements are distinct and decoupled from one another.

Abstract: A sensing structure is presented for use in testing integrated circuits on a substrate. The sensing structure includes a probe region corresponding to a conductive region for connecting to the integrated circuit. A first sensing region at least partially surrounds the probe region. A plurality of sensing elements connects in series such that a first of the plurality of sensing elements has two terminals respectively connected to the first sensing region and the probe region. And a second of the plurality of sensing elements has two terminals respectively connected to the probe region and a first reference potential.

Abstract: A first current proportional to absolute temperature flows in a first current line through a first p-n junction and a second p-n junction arranged in series. A cascaded arrangement of p-n junctions is coupled to the second p-n junction and includes a further p-n junction with a current flowing therethrough that has a third order proportionality on absolute temperature. A differential circuit has a first input coupled to the further p-n junction and a second input coupled to a current mirror from the first p-n junction, with the differential circuit configured to generate a bandgap voltage with a low temperature drift from a sum of first voltage (that is PTAT) derived from the first current and a second voltage (that is PTAT3) derived from the third current.