Patents Assigned to STMicroelectronics AS
  • Patent number: 10260877
    Abstract: An electronic device includes a printed circuit board (PCB) having at least one conductive trace thereon. A system on chip (SoC) is mounted on the PCB and electrically coupled to the conductive trace. A sensor chip is mounted on the PCB in a spaced apart relation with the SoC and electrically coupled to the conductive trace such that the sensor chip and SoC are electrically coupled. The sensor chip includes an accelerometer and/or a gyroscope, and a control circuit. The control circuit is configured to receive configuration data as input, acquire data from the accelerometer and/or the gyroscope. The control circuit is also configured to process the data so as to generate a context of the electronic device relative to its surroundings, the processing being performed in using a processing technique operating in accordance with the configuration data, and output the context.
    Type: Grant
    Filed: June 24, 2015
    Date of Patent: April 16, 2019
    Assignee: STMicroelectronics, Inc.
    Inventors: Mahesh Chowdhary, Sankalp Dayal
  • Patent number: 10262984
    Abstract: An optical integrated circuit device includes an electrically insulating substrate, an optical connection disposed at a boundary of the optical integrated circuit, and a first electrostatic discharge (ESD) protection structure in direct contact with and electrically coupled to the first waveguide. The optical connection includes a first waveguide. The first waveguide is disposed on the electrically insulating substrate and configured to transmit an optical signal. The first ESD protection structure is both electrically non-insulating and substantially optically transparent to the optical signal. An ESD diode including an anode and a cathode is electrically coupled to the first ESD protection structure. A ground connection is electrically coupled to the anode of the ESD diode.
    Type: Grant
    Filed: July 5, 2018
    Date of Patent: April 16, 2019
    Assignee: STMicroelectronics S.r.l.
    Inventors: Luca Maggi, Piero Orlandi
  • Patent number: 10261312
    Abstract: An electronic device disclosed herein includes a mirror controller configured to generate a drive control signal, with a drive circuit configured to generate a drive signal for a movable mirror based upon the drive control signal. A sensing circuit is configured to sense the drive signal. The mirror controller is further configured to adjust the drive control signal as a function of the sensed drive signal.
    Type: Grant
    Filed: May 8, 2017
    Date of Patent: April 16, 2019
    Assignee: STMicroelectronics Ltd
    Inventor: Elik Haran
  • Publication number: 20190107584
    Abstract: A Hall sensor compensation circuit includes an input node configured for receiving a bias signal for a Hall sensor. A bias node provides to the Hall sensor a compensated bias signal. A compensation network coupled between the input node and the bias node has a gain inversely proportional to Hall mobility, ?n?, wherein the Hall sensing signal is temperature-compensated.
    Type: Application
    Filed: October 2, 2018
    Publication date: April 11, 2019
    Applicant: STMicroelectronics S.r.l.
    Inventors: Roberto Pio BAORDA, Paolo ANGELINI
  • Publication number: 20190109100
    Abstract: An integrated circuit includes a semiconductor substrate having a rear face. A first semiconductor well within the substrate includes circuit components. A second semiconductor well within the substrate is insulated from the first semiconductor well and the rest of the substrate. The second semiconductor well provides a detection device that is configurable and designed, in a first configuration, to detect a thinning of the substrate via its rear face, and in a second configuration, to detect a DFA attack by fault injection into the integrated circuit.
    Type: Application
    Filed: October 8, 2018
    Publication date: April 11, 2019
    Applicant: STMicroelectronics (Rousset) SAS
    Inventors: Alexandre SARAFIANOS, Abderrezak MARZAKI
  • Publication number: 20190107575
    Abstract: A testing architecture for integrated circuits on a wafer includes at least one first circuit of a structure TEG realized in a scribe line providing separation between first and second integrated circuits. At least one pad is shared by a second circuit inside at least one of the first and second integrated circuits and the first circuit. Switching circuitry is coupled to the at least one pad and to the first and second circuits.
    Type: Application
    Filed: December 6, 2018
    Publication date: April 11, 2019
    Applicant: STMicroelectronics S.r.l.
    Inventor: Alberto PAGANI
  • Patent number: 10254355
    Abstract: A magnetic field sensor includes a die and a current generator in the die. The current generator generates a driving current. A Lorentz force transducer is also formed in the die and coupled to the current generator to obtain measurements of a magnetic field based upon the Lorentz force. The magnetic field has a resonance frequency and the current generator drives the Lorentz force sensor with the driving current having a non-zero frequency different from the resonance frequency.
    Type: Grant
    Filed: May 2, 2017
    Date of Patent: April 9, 2019
    Assignee: STMicroelectronics S.r.l.
    Inventors: Giacomo Langfelder, Alessandro Tocchio, Dario Paci
  • Patent number: 10256351
    Abstract: A semi-floating gate transistor is implemented as a vertical FET built on a silicon substrate, wherein the source, drain, and channel are vertically aligned, on top of one another. Current flow between the source and the drain is influenced by a control gate and a semi-floating gate. Front side contacts can be made to each one of the source, drain, and control gate terminals of the vertical semi-floating gate transistor. The vertical semi-floating gate FET further includes a vertical tunneling FET and a vertical diode. Fabrication of the vertical semi-floating gate FET is compatible with conventional CMOS manufacturing processes, including a replacement metal gate process. Low-power operation allows the vertical semi-floating gate FET to provide a high current density compared with conventional planar devices.
    Type: Grant
    Filed: October 2, 2017
    Date of Patent: April 9, 2019
    Assignee: STMICROELECTRONICS, INC.
    Inventors: Qing Liu, John H. Zhang
  • Patent number: 10254332
    Abstract: A for positioning a miniaturized piece includes a positioning structure that forms a first cavity designed to receive with play the miniaturized piece and a second cavity communicating with the first cavity. At least one electrical-contact terminal is provided facing the second cavity and is electrically coupleable to an electronic testing device designed to carry out an electrical test on the miniaturized piece. An actuator device causes a vibration of the positioning structure such that the vibration translates the miniaturized piece towards the second cavity until it penetrates at least in part into the second cavity.
    Type: Grant
    Filed: January 9, 2017
    Date of Patent: April 9, 2019
    Assignee: STMicroelectronics S.r.l.
    Inventors: Fabiano Frigoli, Giuseppe Ballotta, Massimo Greppi, Luca Giuseppe Falorni, Paolo Aranzulla
  • Patent number: 10257943
    Abstract: An electronic device includes a substrate having an external surface, and an integrated circuit over the external surface of the substrate. The substrate is provided with an electrical connection network including electrical links for linking the integrated circuit to another electrical device. Some of the electrical links include an impedance-compensating inductor on an external surface of the substrate.
    Type: Grant
    Filed: March 20, 2018
    Date of Patent: April 9, 2019
    Assignee: STMICROELECTRONICS (GRENOVLE 2) SAS
    Inventors: David Auchere, Laurent Marechal
  • Patent number: 10254781
    Abstract: A voltage source wherein at least one first switch couples a first node of the voltage source to a node of application of at least one potential of a power supply voltage, and at least one first capacitive element couples the first node or a second node of the voltage source to a control node of the first switch.
    Type: Grant
    Filed: October 2, 2017
    Date of Patent: April 9, 2019
    Assignee: STMicroelectronics (Alps) SAS
    Inventor: Kuno Lenz
  • Patent number: 10256356
    Abstract: Solar thin film modules are provided with reduced lateral dimensions of isolation trenches and contact trenches, which provide for a series connection of the individual solar cells. To this end lithography and etch techniques are applied to pattern the individual material layers, thereby reducing parasitic shunt leakages compared to conventional laser scribing techniques. In particular, there may be series connected solar cells formed on a flexible substrate material that are highly efficient in indoor applications.
    Type: Grant
    Filed: November 23, 2015
    Date of Patent: April 9, 2019
    Assignee: STMicroelectronics S.r.l.
    Inventors: Marina Foti, Noemi Graziana Sparta′, Salvatore Lombardo, Silvestra DiMarco, Sebastiano Ravesi, Cosimo Gerardi
  • Patent number: 10254623
    Abstract: A Mach-Zehnder ring modulator includes a first optical path having a first diode and a optical path having a second diode. Each of the first and second diodes operates responsive to a voltage signal by modifying a phase of a light signal. A first optical coupler provides first and second light signals to the first and second optical paths, respectively. A second optical coupler couples outputs from the first and second optical paths. A feedback path is coupled between an output of the second optical coupler and an input of the first optical coupler.
    Type: Grant
    Filed: August 17, 2017
    Date of Patent: April 9, 2019
    Assignee: STMicroelectronics SA
    Inventors: Valerie Danelon, Denis Pache, Christophe Arricastres
  • Patent number: 10256751
    Abstract: A drive circuit having asymmetrical drivers. In an embodiment, a brushless DC motor may be driven by a drive circuit having three high-side MOSFETs and three low-side MOSFETs. A driver controller turns the MOSFETs on and off according to a drive algorithm such that phase currents are injected into motor coils to be driven. The high-side MOSFETs may be sized differently than the low-side MOSFETs. As such, when a MacDonald waveform (or similar drive algorithm) is used to drive the phases of the motor, less power may be required during disk spin-up because the MOSFETs that are on more (e.g., the low-side MOSFETs with a MacDonald waveform) may be sized larger than the MOSFETs that are on less (e.g., the high-side MOSFETs). In this manner, less power is dissipated in the larger size MOSFETs that are on more than the others.
    Type: Grant
    Filed: March 9, 2016
    Date of Patent: April 9, 2019
    Assignee: STMicroelectronics, Inc.
    Inventor: Frederic Bonvin
  • Patent number: 10257617
    Abstract: Provided is an acoustic transducer including: a semiconductor substrate; a vibrating membrane provided above the semiconductor substrate, including a vibrating electrode; and a fixed membrane provided above the semiconductor substrate, including a fixed electrode, the acoustic transducer detecting a sound wave according to changes in capacitances between the vibrating electrode and the fixed electrode, converting the sound wave into electrical signals, and outputting the electrical signals. At least one of the vibrating electrode and the fixed electrode is divided into a plurality of divided electrodes, and the plurality of divided electrodes outputting the electrical signals.
    Type: Grant
    Filed: November 15, 2017
    Date of Patent: April 9, 2019
    Assignees: STMicroelectronics S.R.L., Omron Corporation
    Inventors: Takashi Kasai, Shobu Sato, Yuki Uchida, Igino Padovani, Filippo David, Sebastiano Conti
  • Patent number: 10255973
    Abstract: An embodiment memory device includes a memory array having a plurality of bit lines, a low-voltage connection path configured to connect, in an operational phase of the device, an access terminal to a selected local bit line of the plurality of bit lines, and a high-voltage connection path configured to connect, in the operational phase of the device, the access terminal to the selected local bit line, in parallel with the low-voltage connection path.
    Type: Grant
    Filed: October 30, 2017
    Date of Patent: April 9, 2019
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Davide Manfre, Cesare Torti, Fabio Enrico Carlo Disegni
  • Patent number: 10256341
    Abstract: A self-aligned SiGe FinFET device features a relaxed channel region having a high germanium concentration. Instead of first introducing germanium into the channel and then attempting to relax the resulting strained film, a relaxed channel is formed initially to accept the germanium. In this way, a presence of germanium can be established without straining or damaging the lattice. Gate structures are patterned relative to intrinsic silicon fins, to ensure that the gates are properly aligned, prior to introducing germanium into the fin lattice structure. After aligning the gate structures, the silicon fins are segmented to elastically relax the silicon lattice. Then, germanium is introduced into the relaxed silicon lattice, to produce a SiGe channel that is substantially stress-free and also defect-free. Using the method described, concentration of germanium achieved in a structurally stable film can be increased to a level greater than 85%.
    Type: Grant
    Filed: January 31, 2018
    Date of Patent: April 9, 2019
    Assignee: STMicroelectronics, Inc.
    Inventors: Pierre Morin, Nicolas Loubet
  • Patent number: 10254338
    Abstract: A semiconductor device, for example an integrated circuit such as a microcontroller (MCU) or a digital signal processor (DSP), includes a semiconductor die coupled with a power supply line, a debug module coupled with the semiconductor die to exchange semiconductor die debug command and data signals with the semiconductor die, and a modem coupled with the power supply line. The debug module is arranged to convey the semiconductor die debug command and data signals over the power supply line.
    Type: Grant
    Filed: July 27, 2016
    Date of Patent: April 9, 2019
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Nicolas Bernard Grossier, Lorenzo Guerrieri, Giuseppe Livio Gobbato, Daniele Zerbini, Martina Cordoni, Pasqualina Fragneto
  • Patent number: 10255207
    Abstract: A system is configured to capture a set of interrupts and output the interrupts serially onto an interconnect. The interrupts, which are routed to a destination, may first be packetized such that additional information is associated with the interrupt within the packet.
    Type: Grant
    Filed: November 7, 2014
    Date of Patent: April 9, 2019
    Assignees: STMicroelectronics (Research & Development) Limited, STMicroelectronics (Grenoble 2) SAS
    Inventors: Davide Sarta, Ignazio Antonino Urzi
  • Patent number: 10254261
    Abstract: A microelectronic device capable of detecting multiple gas constituents in ambient air can be used to monitor air quality. The microelectronic air quality monitor includes a plurality of temperature-sensitive gas sensors tuned to detect different gas species. Each gas sensor is tuned by programming an adjacent heater. An insulating air pocket formed below the sensor helps to maintain the sensor at a desired temperature. A temperature sensor may also be integrated with each gas sensor to provide additional feedback control. The heater, temperature sensor, and gas sensors are in the form of patternable thin films integrated on a single microchip. The device can be incorporated into computer workstations, smart phones, clothing, or other wearable accessories to function as a personal air quality monitor that is smaller, more accurate, and less expensive than existing air quality sensors.
    Type: Grant
    Filed: July 18, 2016
    Date of Patent: April 9, 2019
    Assignee: STMicroelectronics PTE Ltd
    Inventors: Olivier Le Neel, Tien Choy Loh, Shian Yeu Kam, Ravi Shankar