Abstract: A method and circuit are disclosed for replacing defective columns of flash memory cells in a flash memory device. The circuit includes a plurality of sets of storage elements, each set of storage elements being capable of identifying at least one column of memory cells in any block of memory cells as being defective. The circuit further includes control circuitry for replacing an addressed column of memory cells with a redundant column of memory cells upon an affirmative determination that a set of storage elements identifies the addressed column of memory cells as being defective.

Abstract: A fingerprint detector having a smooth sensor surface for contact with a fingerprint includes capacitive sensor plates defining an array of sensor cells below the sensor surface and tungsten ESD protection grid lines surrounding each sensor cell. The sensor surface is defined by silicon carbide and includes silicon oxide filling cavities in the silicon carbide. The cavities inherently result from processing steps, including removal of the tungsten atop the silicon carbide that is used to define the grid lines. Filling the cavities with oxide and smoothing the surface using chemical mechanical polishing provides a scratch-resistant surface and improves the sensitivity of the capacitive sensor cells.

Abstract: An integrated circuit memory fabrication process and structure, in which salicidation is performed on the periphery (and optionally on the ground lines) of a memory chip, but not on the transistors of the memory cells.

Abstract: A method is disclosed for controlling the write head of a magnetic disk storage device. The method includes sinking current from the first terminal of the write head and sourcing current to the second terminal of the write head substantially simultaneously with sinking current from the first terminal so that a first steady state voltage level appears on the first terminal of the write head and a second steady state voltage level appears on the second terminal thereof that are approximately at a midpoint between a high reference voltage level and a low reference voltage level. The common mode voltage of the write head is substantially constant over time.

Abstract: A method and circuit are disclosed for controlling the write head of a magnetic disk storage device. The circuit includes a pull-up device coupled to a terminal of the write head, a current sink circuit which is coupled to the write head terminal and a bootstrap circuit coupled to the current sink circuit. When reversing the direction of current flow through the write head so that current is drawn from the write head from the write head terminal, the bootstrap circuit and the current sink circuit are activated. When the current in the write head nears and/or slightly surpasses the desired destination current level, the bootstrap circuit is deactivated and the pull-up device is thereafter immediately activated for a predetermined period of time.

Abstract: An enhanced fingerprint sensing circuit in which a voltage change is applied to the body during sensing. When the person's fingerprint is being sensed, the person's body is in contact with an electrical terminal. When the sensing occurs, the voltage on the electrical terminal changes, which changes the voltage on the person's body. The pattern of the fingerprint performs two functions in the sensing circuit. In addition to being a plate of a capacitor whose distance is being sensed, it is now a source of input charge as well. The electrical effect on the cell of a voltage change on a person's finger is different at a ridge than at a valley in the fingerprint sensing circuit. Thus, the input capacitance to the sensing circuit is variable, depending upon whether a ridge or a valley is present. The sensing circuit also detects a change in its own capacitance based on the presence of a ridge or a valley.

Abstract: A new technique incorporates a 1/4-rate Hard Disk Drive (HDD) servo-data encoding into a Partial Response Maximum Likelihood (PRML) read channel. The limitation of the HDD servo-track writer is the maximum frequency associated with writing the servo data while maintaining a level of data alignment between the data in the adjacent tracks (coherency). The 1/4 code allows the servo data to be written at the maximum coherency bandwidth. Specifically, the data is read back (or sampled) at twice the write frequency. This increases the data redundancy while also increasing the data density and the disk storage capacity. The 1/4 coding can also be applied to conventional HDD dibit coding. Specifically, the 1/4-coding scheme reads each dibit-coded servo-data transition 01 as 0011, and reads each non-transition 00 (or 0) as 0000. The 1/4 coding and its matched Viterbi detector can also increase the data detection in comparison to conventional peak-detection schemes.

Abstract: There is disclosed a cache memory for use in a data processor. The cache memory comprises a first static random access memory (SRAM) that receives up to N incoming bytes of data on an input bus and that stores the up to N incoming bytes of data in an N-byte addressable location. M incoming bytes of data may be written in each of the N-byte addressable locations during a write operation (where M may be less than N) and the M written bytes of data and N−M unwritten bytes of data are output from each N-byte addressable location on an output bus of the first SRAM during each write operation. The cache memory also comprises a parity generator coupled to the first SRAM that receives the M written bytes of data and the N−M unwritten bytes of data and generates at least one write parity bit associated with the M written bytes of data and the N−M unwritten bytes of data.

Abstract: A method and circuit are disclosed for controlling the write head of a magnetic disk storage device. The circuit includes a pull-up device and a current sink circuits coupled to each terminal of the write head, for selectively sourcing current to and sinking current from the write head, respectively. A clamp device is coupled to each write head terminal to selectively clamp the write head terminals to steady state intermediate voltage levels. The circuit further includes a control circuit for individually activating the pull-up devices, the current sink circuits and the clamp devices. In particular, when reversing the direction of current flow through the write head from a first direction in which current is provided to the write head via the write head terminal to a second direction in which current is drawn from the write head from the write head terminal, the appropriate pull-up device is activated for a predetermined period of time.

Abstract: A motor control circuit wherein Bemf zero crossings are sensed to provide phasing information. To avoid incorrect timing (due to detection of zero crossings which may be caused by switching noise when the power transistors switch to commutate other phases), the Bemf detection is masked. Advantageously, the Bemf detection is masked not only for the normal masking period (including an additional percentage beyond the minimum period), but is also for an additional period, if the Bemf output is not of the expected polarity.

Abstract: The thin film transistor formed of polycrystalline silicon is positioned adjacent a heat reaction chamber. The gate electrode for the transistor is formed within a silicon substrate and a gate dielectric is positioned over the gate electrode. A pass transistor is coupled to the gate electrode, the pass transistor having a source/drain region in the same semiconductor substrate and positioned adjacent to the gate electrode of the thin film heating transistor. When the pass transistor is enabled, a voltage is applied to the gate electrode which causes the current to flow from the drain to the source of the thin film transistor. The current flow passes through a highly resistive region which generates heat that is transmitted to the heat reaction chamber.

Abstract: A number of voltage-controlled resistance cells, each formed by a transistor with a biasing capacitor connected between the gate and source and an associated controller coupled to the capacitor to maintain a steady charge on the biasing capacitor and keep the gate-source voltage at a control voltage corresponding to a desired resistance, are employed to form a voltage-controlled resistance structure. The gate voltage applied to each transistor is able to “float” together with the source voltage in order to keep the gate-source voltage constant, and the resistance structure exhibits improved voltage-dependent resistance linearity together with a larger range of biasing while lowering needed refresh frequencies to avoid noise injection.

Abstract: Disclosed is a CMOS image sensor that includes circuitry for identifying defective pixels, particularly pixels having leaky access switches. The leaky access switches allow charge to escape from the pixel over a row or column line in a pixel array, thereby corrupting the outputs of an entire row or column of pixels. A disclosed test involves (a) electronically setting a defined charge in a selected pixel of the CMOS imager; (b) reading the output of the selected pixel; and (c) comparing the output of the selected pixel to an expected value based upon the defined charge set in the selected pixels. If the output significantly deviates from the expected value, then the selected pixel is identified as having a leaky access switch. Preferably, a newly fabricated sensor is first tested as described. If such leaky access switch is discovered, the imager is discarded without incurring further manufacturing cost.

Abstract: A fuse-redundancy circuit for use in an integrated circuit and method for operating the same. The fuse-redundancy circuit comprises at least two fuses, at least two fuse-control devices, and a status-checking circuit. Each one of the at least two fuse-control devices is operable to control an electric current flowing through a corresponding one of the at least two fuses. The status-checking circuit operable to generate a status signal having (i) a first state when at least one of the at least two fuses is blown, and (ii) a second state otherwise.

Abstract: A servo circuit includes a servo channel and a processor. The servo channel recovers servo data from servo wedges that identify respective data sectors on a data-storage disk. On spin up of the disk, the processor detects a spin-up wedge associated with one of the servo wedges and then detects the servo wedge. Once the servo wedge is detected, a head-position circuit can read the location data from the servo wedge to determine an initial position of the read-write head. By detecting a both a spin-up wedge and a servo wedge to determine an initial head position on disk spin up, such a servo circuit often allows one to increase the disk's storage capacity by reducing the lengths of the spin-up wedges.

Abstract: A structure and method for dissipating charges comprising an underlying dielectric layer disposed over capacitor plates of sensor circuitry a gap being formed conformally between adjacent plates and a topographic discharge grid over the underlying dielectric layer and wherein the topographic discharge grid fills at least a portion of the gap between the plates over the dielectric layer and diffuses electrostatic charges at the surface of the integrated circuit.

Abstract: A ballast compatible with different types of gas discharge lamps includes a power supply and a controller connected to the power supply. The controller includes a memory having a plurality of desired operating parameters stored therein for respective different types of gas discharge lamps. A sensing circuit causes the power supply to supply a current to the gas discharge lamp prior to start-up and senses a voltage based thereon indicative of a type of the gas discharge lamp. A control circuit causes the power supply to provide the desired operating parameters based upon the type of gas discharge lamp. Since the desired operating parameters are applied to the gas discharge lamp, the life of the lamp is increased.

Abstract: Within a capacitive fingerprint detection device, finger detection is provided by a capacitive grid overlying the fingerprint sensor electrodes to measure the absolute capacitance of the finger placed on the sensor surface. The capacitive measurement is converted to a representative frequency, which is then compared to a reference frequency or frequency range to determine whether the measured capacitance matches the expected bio-characteristics of living skin tissue. The finger detection thus provides anti-spoofing protection for the fingerprint detection device.

Abstract: Deep profile and highly doped impurity regions can be formed by diffusing from a solid source or doped silicon glass and using a patterned nitride layer. An oxide etch stop and polysilicon sacrificial layer are left in place in the patterned regions and the dopant is diffused through those layers. The polysilicon provides sacrificial silicon that serves to prevent the formation of boron silicon nitride on the substrate surface and also protects the oxide layer during etching of the silicon glass layer. The oxide layer then acts as an etch stop during removal of the polysilicon layer. In this way, no damage done to the substrate surface during the diffusion or subsequent etch steps and the need for expensive ion implanter steps is avoided.

Abstract: A method and device are disclosed for controlling a polyphase motor having a plurality of windings. The device includes a memory device having stored therein data representing a predetermined driving profile, and driver circuit for driving the windings of the polyphase motor based upon the data provided by the memory unit. A feedback control loop is included having an input connected to a selected winding of the polyphase motor and providing an address signal to the memory device that is based upon a current level of the selected winding at around the time the back electromotive force (bemf) signal corresponding thereto crosses a zero reference, for controlling current provided to the windings by the driver circuit so that, for each winding, the current provided thereto is substantially in phase with a back electromotive force (emf) signal corresponding to the winding.