Patents Assigned to STMicroelectronics (Research& Development)
  • Publication number: 20250194267
    Abstract: A method of manufacturing an image sensor comprising the forming of an opening in a substrate, the forming of a conductive pad covering the flanks of the opening and delimiting a gap in the opening, the forming of microlenses in a layer made of a first resin, the layer made of the first resin covering the pad and penetrating into the gap, the forming of a mask made of a second resin on top of and in contact with the layer made of the first resin, the chemical plasma etching of the layer made of the first resin, through the mask, delimiting a block of the first resin in the gap, the deposition of a protective layer on the microlenses and on the block, the removal of the portion of the protective layer covering the block, and the etching of the block.
    Type: Application
    Filed: November 27, 2024
    Publication date: June 12, 2025
    Applicants: STMicroelectronics International N.V., COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Pierre BAR, Marc GUILLERMET
  • Publication number: 20250190002
    Abstract: A method for regulating voltage in an electronic device includes receiving, at a power stage, a gate voltage from an input terminal, and delivering an output voltage and an output current to a processing module based on the gate voltage. The gate voltage is compensated by comparing the output voltage with a reference voltage to produce a compensated gate voltage. The gate voltage compensation is sped by up stabilizing the output voltage during transitions between operational modes using a first compensation stage, decoupling a second compensation stage from the input terminal when a control signal is asserted to thereby precharge a compensation capacitor to an initial compensation voltage, and coupling the second compensation stage to the input terminal via a compensation resistor when the control signal is deasserted to thereby deliver the initial compensation voltage to the input terminal.
    Type: Application
    Filed: December 6, 2023
    Publication date: June 12, 2025
    Applicant: STMicroelectronics France
    Inventors: Lionel VOGT, Eoin Padraig O HANNAIDH
  • Publication number: 20250189392
    Abstract: A microelectromechanical sensor includes: a supporting body, containing semiconductor material; and a cap, of semiconductor material, coupled to the supporting body and having an internal surface arranged facing the supporting body and a plurality of inlet holes. The sensor further includes a sensing structure, comprising a measuring chamber and a sensitive element, the sensitive element being formed at least partially in the supporting body and facing the measuring chamber; fluidic paths configured to couple the sensing structure with the environment external to the sensor through the inlet holes, and having an access section to the measuring chamber; and trapping structures defined in the supporting body. The trapping structures are in communication with respective fluidic paths and extend in the supporting body at least partially at a greater distance, from the internal surface of the cap, with respect to the access section of each fluidic path.
    Type: Application
    Filed: November 26, 2024
    Publication date: June 12, 2025
    Applicant: STMicroelectronics International N.V.
    Inventors: Filippo DANIELE, Lorenzo BALDO, Silvia NICOLI
  • Publication number: 20250194272
    Abstract: A semiconductor photodetector includes an active region made of a doped semiconductor material of a first conductivity type. The active region is configured to convert a light radiation into charge carriers and to store the charge carriers. At least one repulsion element is positioned within the active region and configured to repel charge carriers stored in the active region.
    Type: Application
    Filed: December 5, 2024
    Publication date: June 12, 2025
    Applicant: STMicroelectronics International N.V.
    Inventor: Arthur ARNAUD
  • Publication number: 20250192740
    Abstract: Described herein is an operational transconductance amplifier (OTA) with a constant current source that provides a constant current to a node. The OTA includes two input pairs of transistors: the first sources variable currents based on feedback and input voltages, while the second sinks variable currents also based on feedback and input voltages. A folded cascode arrangement includes two branches, with one branch including a Monticelli cell. A class-AB output stage is present, with its inputs connected across the Monticelli cell. Additionally, a bias stage mirrors and scales the constant current to generate control voltages. Within the folded cascode branches, compensation transistors are controlled by these control voltages, ensuring that various sourced and sunk variable currents are of equal magnitude, making the OTA input voltage independent.
    Type: Application
    Filed: December 11, 2023
    Publication date: June 12, 2025
    Applicant: STMicroelectronics International N.V.
    Inventor: Lorenzo GIANCRISTOFARO
  • Publication number: 20250185946
    Abstract: A wearable electronic device detects the breathing of a user based on bone conduction of sounds waves. The wearable electronic device includes an inertial sensor unit. The inertial sensor unit generates sensor data based on bone conduction of sound. The inertial sensor unit generates frequency domain data based on the sensor data. The inertial sensor unit detects breathing of the user by performing a classification process based on the frequency domain data.
    Type: Application
    Filed: December 12, 2023
    Publication date: June 12, 2025
    Applicant: STMicroelectronics International N.V.
    Inventors: Alessandro MAGNANI, Federico RIZZARDINI
  • Patent number: 12328962
    Abstract: An electronic device includes a stack of a first level having a SPAD, a second level having a quench circuit for said SPAD, and a third level having a circuit for processing data generated by said SPAD. A method for making the device includes: a) forming of the first level; b) bonding, on the first level, by molecular bonding, of a stack of layers including a semiconductor layer; and c) forming the quench circuit of the second level in the semiconductor layer.
    Type: Grant
    Filed: November 3, 2023
    Date of Patent: June 10, 2025
    Assignees: STMicroelectronics (Crolles 2) SAS, STMicroelectronics (Research &Development) Limited
    Inventors: Francois Guyader, Sara Pellegrini, Bruce Rae
  • Patent number: 12327129
    Abstract: A processing system includes safety monitoring circuits configured to generate error signals by monitoring a microprocessor operations, a memory controller, and/or a resource. The system further includes fault collection sub-circuits, each including one or more error combination circuits, each including a first programmable register and being configured to receive a subset of the error signals, determine whether an error signal is asserted, and store to the first register error status data that identifies the asserted error signal. Each error combination circuit is configured to read enable data from the first register and generate a combined error signal based on the error status and enable data. The error management circuit includes a second programmable register and is configured to receive the combined error signals, read routing data from the second register, and generate for each microprocessor an error signal based on the combined error signals and routing data.
    Type: Grant
    Filed: April 4, 2022
    Date of Patent: June 10, 2025
    Assignees: STMicroelectronics Application GMBH, STMicroelectronics International N.V.
    Inventors: Roberto Colombo, Vivek Mohan Sharma
  • Publication number: 20250185242
    Abstract: Lateral isolation regions are formed in a semiconductor substrate to delimiting active regions of the semiconductor substrate. A trench is then etched extending vertically in depth in the substrate through the lateral isolation regions and the active regions. The formation of the lateral isolation regions is configured to provide, at the location of where the etching of the trench is to be performed, enlarged portions of the lateral isolation regions delimiting thinned portions of the active regions. As a result, the bottom of the trench has a form having variations in depth with low portions facing the location of the trench that passes through the lateral isolation regions, and high portions facing the location of the trench that passes through the active regions.
    Type: Application
    Filed: November 26, 2024
    Publication date: June 5, 2025
    Applicant: STMicroelectronics International N.V.
    Inventors: Carlos Augusto SUAREZ SEGOVIA, Simon JEANNOT, Catherine MARTINELLI, Nadia MIRIDI
  • Publication number: 20250184188
    Abstract: Disclosed is a receiver that includes a pre-amplifier circuit and an amplifier circuit. The pre-amplifier circuit includes first and second input terminals that receive signals from a transmitter; first and second output terminals that output signals to the amplifier circuit; a first resistor having a first terminal coupled to the first input terminal, and a second terminal coupled to a first node; a second resistor having a first terminal coupled to the second input terminal, and a second terminal coupled to the first node; a third resistor having a first terminal coupled to the first output terminal, and a second terminal coupled to a second node; a fourth resistor having a first terminal coupled to the second output terminal, and a second terminal coupled to the second node; and a switch having a first terminal coupled to the first node, and a second terminal coupled to the second node.
    Type: Application
    Filed: November 25, 2024
    Publication date: June 5, 2025
    Applicant: STMicroelectronics International N.V.
    Inventors: Sameer VASHISHTHA, Saiyid Mohammad Irshad RIZVI, Paras GARG
  • Publication number: 20250185390
    Abstract: A pixel includes a first electrode layer on an exposed surface of an interconnection structure and in contact with a conductive element of the interconnection structure. An insulating layer extends over the first electrode layer and includes opening crossing through the insulating layer to the first electrode layer. A second electrode layer is on top of and in contact with the first electrode layer and the insulating layer in the opening. A film configured to convert photons into electron-hole pairs is on the insulating layer, the second electrode layer and filling the opening. A third electrode layer covers the film.
    Type: Application
    Filed: February 12, 2025
    Publication date: June 5, 2025
    Applicant: STMicroelectronics (Crolles 2) SAS
    Inventors: Thierry BERGER, Stephane ALLEGRET-MARET
  • Publication number: 20250181105
    Abstract: According to one aspect, provision is made of a timing method implemented by a computer system comprising: a central processing unit, an external clock circuit comprising a counter, the counter being configured to increment or decrement its value with each clock stroke of the external clock circuit over a range of values corresponding to one millisecond, the timing method comprising: defining a maximum number of transitions of a bit to be monitored of the counter value corresponding to a desired waiting delay, monitoring transitions of the bit to be monitored of the counter value so as to achieve the timing until the number of performed transitions of the bit to be monitored reaches the defined maximum number of transitions.
    Type: Application
    Filed: November 19, 2024
    Publication date: June 5, 2025
    Applicant: STMicroelectronics International N.V.
    Inventor: Philippe CHERBONNEL
  • Publication number: 20250180597
    Abstract: An inertial structure is elastically coupled through a first elastic structure to a supporting structure so as to move along a sensing axis as a function of a quantity to be detected. The inertial structure includes first and second inertial masses which are elastically coupled together by a second elastic structure to enable movement of the second inertial mass along the sensing axis. The first elastic structure has a lower elastic constant than the second elastic structure so that, in presence of the quantity to be detected, the inertial structure moves in a sensing direction until the first inertial mass stops against a stop structure and the second elastic mass can move further in the sensing direction. Once the quantity to be detected ends, the second inertial mass moves in a direction opposite to the sensing direction and detaches the first inertial mass from the stop structure.
    Type: Application
    Filed: October 11, 2024
    Publication date: June 5, 2025
    Applicant: STMicroelectronics S.r.l.
    Inventors: Gabriele GATTERE, Francesco RIZZINI, Alessandro TOCCHIO
  • Patent number: 12322603
    Abstract: Semiconductor chips are arranged on an elongated substrate and encapsulated by an insulating encapsulation. Electrically conductive formations and electrically conductive plating lines are plated on the insulating encapsulation using, for example, Laser Direct Structuring (LDS) or Direct Copper Interconnect (DCI) material. The electrically conductive plating lines include first transverse plating lines as well as second plating lines branching out from the first plating lines towards the electrically conductive formations. A first partial cutting step is then performed to form grooves which remove the first plating lines. An insulating material is dispensed in the grooves to encapsulate the end portions of the second plating lines. A second cutting step median along the groove and through the elongate substrate is performed to produce singulated semiconductor devices (such as “die pad up” Quad-Flat No-lead (QFN) packages). End portions of the second plating lines are encapsulated by the insulating material.
    Type: Grant
    Filed: May 25, 2022
    Date of Patent: June 3, 2025
    Assignee: STMicroelectronics S.r.l.
    Inventors: Roberto Tiziani, Antonio Bellizzi
  • Patent number: 12323060
    Abstract: A buck-boost converter circuit includes a mode selection circuit that asserts a buck enable signal if an input voltage is higher than a lower threshold, and asserts a boost enable signal if the input voltage is lower than an upper threshold. A control circuit asserts a buck PWM signal upon a pulse in a buck clock and de-asserts the buck PWM signal if a buck ramp is higher than a buck control signal, and it keeps the buck PWM signal asserted if the buck enable signal is de-asserted. The control circuit asserts a boost PWM signal upon a pulse in a boost clock and de-asserts the boost PWM signal if a boost ramp is higher than a boost control signal, and it keeps the boost PWM signal de-asserted if the boost enable signal is de-asserted.
    Type: Grant
    Filed: April 10, 2023
    Date of Patent: June 3, 2025
    Assignee: STMicroelectronics S.r.l.
    Inventors: Nunzio Greco, Osvaldo Enrico Zambetti, Ranieri Guerra, Francesca Giacoma Mignemi
  • Patent number: 12323573
    Abstract: An electronic device includes a pixel array having a plurality of rows with active imaging pixels, and at least one row with test pixels. Each of the test pixels includes a test voltage generation circuit generating a test voltage, a switching circuit receiving the test voltage and an image pixel output signal and passing the test voltage as output when in a test mode, a comparison circuit receiving the output from the switching circuit and an analog to digital conversion signal and asserting a counter reset signal when the output from the switching circuit and the analog to digital conversion signal are equal in voltage, and a counter beginning counting at a beginning of each test cycle within the test mode, stopping counting upon assertion of the counter reset signal, and outputting its count upon stopping counting. The count is proportional to the test voltage when in the test mode.
    Type: Grant
    Filed: May 4, 2022
    Date of Patent: June 3, 2025
    Assignee: STMicroelectronics Asia Pacific Pte Ltd
    Inventors: Hong Chean Choo, Lookah Chua, Wai Yin Hnin
  • Patent number: 12324250
    Abstract: The present disclosure relates to a photodiode comprising a first part made of silicon and a second part made of doped germanium lying on and in contact with the first part, the first part comprising a stack of a first area and of a second area forming a p-n junction and the doping level of the germanium increasing as the distance from the p-n junction increases.
    Type: Grant
    Filed: December 28, 2022
    Date of Patent: June 3, 2025
    Assignee: STMicroelectronics (Crolles 2) SAS
    Inventors: Younes Benhammou, Dominique Golanski, Denis Rideau
  • Patent number: 12321739
    Abstract: According to one aspect, a method adds an additional function to a computer program installed on a microcontroller, the computer program using a table configured to associate an identifier of the additional function with a pointer to a memory address. The method includes the microcontroller obtaining a compiled code of the additional function and an identifier of this additional function, the microcontroller recording the compiled code of the additional function in a section of a memory, and recording in memory a pointer in the table, the pointer being aimed at the address of the memory section in which the compiled code of the additional function is recorded, the pointer being associated in the table with the identifier of the additional function.
    Type: Grant
    Filed: April 21, 2022
    Date of Patent: June 3, 2025
    Assignee: STMicroelectronics (Grand Ouest) SAS
    Inventor: Frederic Ruelle
  • Patent number: 12323136
    Abstract: A control device includes a triac and a first diode that is series-connected between the triac and a first terminal of the device that is configured to be connected to a cathode gate of a thyristor. A second terminal of the control device is configured to be connected to an anode of the thyristor. The triac has a gate connected to a third terminal of the device that is configured to receive a control signal. The thyristor is a component part of one or more of a rectifying bridge circuit, an in-rush current limiting circuit or a solid-state relay circuit.
    Type: Grant
    Filed: September 26, 2023
    Date of Patent: June 3, 2025
    Assignee: STMicroelectronics (Tours) SAS
    Inventors: Romain Pichon, Yannick Hague
  • Patent number: 12322977
    Abstract: A wireless device includes an energy harvester and an energy storage that operate in a sequence of energy harvesting cycles to alternately harvest energy and release energy for supplying the wireless device. The wireless device also includes a processing circuit and a wireless communication circuit. A configuration method for the wireless device includes first step where a base station receives a signal from the wireless device indicating wireless communication circuit entry into a receiving operation mode. In a second step, the base station transmits configuration data to the wireless device. The received configuration data is temporarily stored in a memory area of the wireless communication circuit. In a third step, the temporarily stored configuration data is transmitted from the wireless communication circuit to the processing circuit for storage in a memory area. The second and third steps are carried out during distinct energy harvesting cycles of the wireless device.
    Type: Grant
    Filed: July 11, 2022
    Date of Patent: June 3, 2025
    Assignee: STMicroelectronics S.r.l.
    Inventor: Roberto La Rosa