Patents Assigned to STMicroelectronics S.A.
  • Digital comparator
    Patent number: 6353646
    Abstract: The present invention relates to a digital comparator including a first block receiving on first inputs the bits of a first operand A of n bits and on second inputs the logic complements of the bits of a second operand B of n bits, generating a propagation signal p n = π i = 1 n ⁢ P i ⁢   ⁢ where ⁢   ⁢ P i = A i + B _ i , and a generation signal g
    Type: Grant
    Filed: March 30, 1999
    Date of Patent: March 5, 2002
    Assignee: STMicroelectronics S.A.
    Inventor: Stéphane Rossignol
  • Method for manufacturing bipolar devices with a self-aligned base-emitter junction
    Patent number: 6352907
    Abstract: The manufacturing of the emitter-base junction of a bipolar transistor on an active silicon region delimited by an insulator, the assembly being covered with a first insulating layer, including the steps of etching the first insulating layer to expose the active region; etching the active region across a given height; forming very heavily-doped silicon spacers at the internal periphery of the protrusions resulting from the etching of the first insulating layer and from the etching of the active region; depositing by epitaxy a base layer; forming a third insulating spacer at the internal periphery of a protrusion of the base layer corresponding to the first spacer; depositing an emitter layer; and performing a chem-mech polishing, by using the first layer and the third spacer as stops.
    Type: Grant
    Filed: May 26, 2000
    Date of Patent: March 5, 2002
    Assignee: STMicroelectronics S.A.
    Inventor: Yvon Gris
  • Integrated circuit with protection device
    Publication number: 20020024070
    Abstract: An integrated circuit receives as supply voltages a ground reference voltage, a logic supply voltage and a high voltage. A protection device is associated with at least one gate oxide circuit element. The protection device applies to a supply node of the circuit element either the logic supply voltage under normal conditions of operation of the integrated circuit, or the high voltage under abnormal conditions of operation of the integrated circuit for breaking down the gate oxide.
    Type: Application
    Filed: June 29, 2001
    Publication date: February 28, 2002
    Applicant: STMicroelectronics S.A.
    Inventor: Richard Fournel
  • Differential one-time programmable memory cell structure in CMOS technology
    Patent number: 6351407
    Abstract: An OTP memory integrated circuit in CMOS technology, including at least two oxide capacitors forming a differential reading storage element, and a read and programming circuit in which the transistors of a first conductivity type are adapted to being used both during read cycles under a relatively low voltage and during programming cycles under a relatively high voltage.
    Type: Grant
    Filed: December 22, 1999
    Date of Patent: February 26, 2002
    Assignee: STMicroelectronics S.A.
    Inventor: Philippe Candelier
  • Process for fabricating a capacitor within an integrated circuit, and corresponding integrated circuit
    Publication number: 20020022333
    Abstract: A production of a capacitor includes the simultaneous production, in at least part of an intertrack insulating layer (3) associated with a given metallization level, on the one hand, of the two electrodes (50, 70) and of the dielectric layer (60) of the capacitor and, on the other hand, of a conducting trench (41) which laterally extends the lower electrode of the capacitor, is electrically isolated from the upper electrode and has a transverse dimension smaller than the transverse dimension of the capacitor, and the production, in the interlevel insulating layer (8) covering the intertrack insulating layer, of two conducting pads (80, 81) which come into contact with the upper electrode of the capacitor and with the conducting trench, respectively.
    Type: Application
    Filed: August 17, 2001
    Publication date: February 21, 2002
    Applicant: STMicroelectronics S.A.
    Inventors: Yves Morand, Jean-Luc Pelloie
  • Current source with low temperature dependence
    Publication number: 20020021116
    Abstract: A current source with low temperature dependence includes a reference current source and a current mirror for copying the reference source current to at least one output branch. The reference current source and the current mirror may have opposite coefficients of temperature dependence and the current mirror may be a weighted mirror. The present invention is particularly applicable to the manufacture of integrated circuits.
    Type: Application
    Filed: May 24, 2001
    Publication date: February 21, 2002
    Applicant: STMicroelectronics S.A.
    Inventor: Philippe Sirito-Olivier
  • Device to control the power supply in an integrated circuit comprising electrically programmable non-volatile memory elements
    Publication number: 20020018367
    Abstract: An integrated circuit having as power supply voltages a low voltage reference, a logic supply voltage reference and a high voltage reference is provided. The high voltage reference is greater than the low voltage reference and the logic supply voltage reference. The integrated circuit includes an electrically programmable non-volatile memory element, and a selection and programming circuit connected thereto. A voltage control device is connected to a power supply input node of the selection and programming circuit for applying, based upon a programming control signal, the high voltage reference for programming the electrically programmable non-volatile memory element or for applying at least one logic supply voltage reference.
    Type: Application
    Filed: June 29, 2001
    Publication date: February 14, 2002
    Applicant: STMicroelectronics S.A.
    Inventor: Richard Fournel
  • Process and device for color adjustment of a color monitor
    Publication number: 20020017868
    Abstract: A process for color adjustment of a color monitor including a cathode-ray tube and a brightness adjustment module includes providing a nominal brightness signal downstream of a white level adjustment module for adjusting a white level and upstream of a black level adjustment module for adjusting a black level. The process also includes setting a voltage required to obtain a black color image, setting a voltage required to obtain a white color image, providing the nominal brightness signal upstream of the white level adjustment module, and setting the voltage required to obtain the black color image.
    Type: Application
    Filed: January 25, 2001
    Publication date: February 14, 2002
    Applicant: STMicroelectronics S.A.
    Inventor: Jean-Pierre Blanc
  • Method of fabricating a silicon-on-insulator system with thin semiconductor islets surrounded by an insulative material
    Publication number: 20020019083
    Abstract: A method of fabricating, from a first semiconductor substrate having two parallel main surfaces, a system including an islet of a semiconductor material surrounded by an insulative material and resting on another insulative material includes forming a layer of a first insulative material, and forming on the top main surface of the first semiconductor substrate a thin semiconductor layer forming the islet of semiconductor material. The thin semiconductor layer can be selectively etched relative to the first semiconductor substrate. A layer of a second insulative material is formed on exposed surfaces of the islet of semiconductor material and the thin semiconductor layer. The method further includes removing the first semiconductor substrate.
    Type: Application
    Filed: July 26, 2001
    Publication date: February 14, 2002
    Applicant: STMicroelectronics S.A.
    Inventors: Herve Jaouen, Vincent Le Goascoz
  • Series protection device for a telephone line
    Publication number: 20020018330
    Abstract: A series device for protection against a heating of aparallel protection element of an equipment of a telephone line, including a bi-directional cut-off element, of normally on state and placed in series with the parallel protection element, a temperature detection element, and a switching element adapted to turning off the cut-off element when the temperature detected by the detection element exceeds a predetermined threshold.
    Type: Application
    Filed: May 22, 2001
    Publication date: February 14, 2002
    Applicant: STMicroelectronics S.A.
    Inventors: Andre Bremond, Philippe Merceron
  • Voltage regulator with a ballast transistor and current limiter
    Patent number: 6346799
    Abstract: A voltage regulator with a current limiter includes a voltage regulating circuit including an amplifier circuit and a feedback circuit. The amplifier circuit includes a ballast or pass resistor and the feedback circuit supplies a first feedback voltage to the amplifier circuit, which is compared to a reference voltage. The voltage regulator further includes a current limiter circuit including a current limiter transistor in series with the ballast transistor and an output of the voltage regulator and a feedback circuit supplying a second feedback voltage to a controller for controlling the current limiter transistor. The controller causes the current limiter transistor to operate between saturation and blocking conditions depending on whether the second feedback voltage, which is representative of the output of the voltage regulator, is above or below a predetermined threshold voltage.
    Type: Grant
    Filed: December 11, 2000
    Date of Patent: February 12, 2002
    Assignee: STMicroelectronics S.A.
    Inventor: Claude Renous
  • Method for the control of an electronic circuit and control unit for its implementation
    Patent number: 6347392
    Abstract: A method for the control of an electronic circuit of the type includes at least one access pin to receive and/or deliver control signals, includes the generation, in a control unit, of control signals from data elements received serially through a data transfer input/output device. The method also includes the following steps: (1) extracting a control word included in the data received serially; and (2) decoding the control word extracted in the previous step in order to perform an operation, as a function of the value of the control word, thus modifying the logic state of at least one control signal.
    Type: Grant
    Filed: December 18, 1998
    Date of Patent: February 12, 2002
    Assignee: STMicroelectronics S.A.
    Inventor: Jean-Marie Gaultier
  • Current source with low supply voltage and with low voltage sensitivity
    Publication number: 20020014883
    Abstract: A current source includes a master branch including a branch current fixing resistor, at least one slave branch, and a current mirror including a mirror transistor in each of the master and slave branches, respectively, to couple the branches. The current source may additionally include at least one of a first circuit for injecting in the current fixing resistor a current proportional to the master branch current and a second circuit for injecting in a degeneration resistor of the mirror transistor of the slave branch a current proportional to a current of the slave branch. The invention is particularly applicable to the manufacture of integrated circuits.
    Type: Application
    Filed: May 24, 2001
    Publication date: February 7, 2002
    Applicant: STMicroelectronics S.A.
    Inventor: Philippe Sirito-Olivier
  • Process for forming deep and shallow insulative regions of an integrated circuit
    Publication number: 20020014676
    Abstract: Prior fabricating the transistors, a phase of forming a deep insulative trench in the substrate is followed by a phase of forming a shallow insulative trench in the substrate and extending the deep trench. The phase of forming the deep trench includes coating the inside walls of the deep trench with an initial oxide layer and filling the deep trench with silicon inside an envelope formed from an insulative material. The phase of forming the shallow trench includes coating the inside walls of the shallow trench with an initial oxide layer and filling the shallow trench with an insulative material.
    Type: Application
    Filed: July 3, 2001
    Publication date: February 7, 2002
    Applicant: STMicroelectronics S.A.
    Inventors: Michel Marty, Helene Baudry, Francois Leverd
  • Reading device and method for integrated circuit memory
    Publication number: 20020015345
    Abstract: In a reading device for a memory, a circuit for the asymmetrical precharging of the differential amplifier is provided so that an output of the reading device switches over to a determined state. In the following evaluation phase, if the memory cell is programmed, the output remains unchanged. If the memory cell is blank or erased, the output of the reading device switches over to another state. A detection circuit detects a sufficient difference between the inputs of the differential amplifier for stopping the asymmetrical precharging and for making the reading device go automatically to the evaluation phase.
    Type: Application
    Filed: October 9, 2001
    Publication date: February 7, 2002
    Applicant: STMicroelectronics S.A.
    Inventor: Richard Fournel
  • Secured microprocessor comprising a system for allocating rights to libraries
    Publication number: 20020016890
    Abstract: A secured microprocessor includes a rights allocation system for the allocation, to programs executable by the microprocessor, of permanent access rights to certain zones of the memory array of the microprocessor. The rights allocation system confers, on a sub-program shared by at least two programs, temporary rights of access to certain memory zones. The temporary rights are allocated when the sub-program is called by one of the programs as a function of the program calling the sub-program. The rights allocation system provides libraries in a secured microprocessor without harming the integrity of the rights conferred on programs using the libraries.
    Type: Application
    Filed: June 20, 2001
    Publication date: February 7, 2002
    Applicant: STMicroelectronics S.A.
    Inventor: Sylvie Wuidart
  • Dynamic random access memory device and process for controlling a read access of such a memory
    Publication number: 20020015346
    Abstract: A method is for controlling reading of a dynamic random access memory (DRAM) including memory cells connected to a bit line of a memory plane of the DRAM and associated with a main reference cell connected to a reference bit line. The method may include reading and refreshing the contents of the memory cell and pre-charging the bit line, the reference bit line and the main reference cell for a subsequent read access. During reading and refreshing the memory cell, the main reference cell and a secondary reference cell connected to the bit line may be activated and, after having deactivated the two reference cells, they are pre-charged to a final pre-charge voltage. The final pre-charge voltage may be chosen to be less than or greater than (as a function of the NMOS or PMOS technology used, respectively) half the sum of a high-state storage voltage and a low-state storage voltage.
    Type: Application
    Filed: June 12, 2001
    Publication date: February 7, 2002
    Applicant: STMicroelectronics S.A.
    Inventors: Francois Jacquet, Olivier Godcheau
  • Method and device to display an index of teletext pages
    Publication number: 20020012067
    Abstract: A teletext program includes several teletext pages, with each teletext page being broadcast in the form of a set of data packets. A method for displaying a teletext program index on a television receiver screen includes receiving a teletext page which includes the set of data packets. The set of data packets includes first and second data packets. The first data packet includes at least one label referring to another teletext page, and the second data packet is associated with the first data packet and includes a page number associated with at least one label. The method includes decoding the first and second data packets to obtain at least one label and the associated page number, and at least one label and the associated page number are stored in a buffer memory.
    Type: Application
    Filed: May 10, 2001
    Publication date: January 31, 2002
    Applicant: STMicroelectronics S.A.
    Inventor: Vincent Tauzia
  • Eeprom memory including an error correction system
    Publication number: 20020013876
    Abstract: An electrically erasable and programmable memory includes a memory array having memory cells connected to word lines and bit lines. The bit lines are arranged in columns. The memory also includes read circuits connected to the bit lines and programming latches connecting the bit lines to a programming line. The memory includes a device to break the conductive paths connecting the memory cells of a column to the read circuits when data has been loaded into the latches of the column, without breaking the conductive paths that connect the latches of the column to the read circuits.
    Type: Application
    Filed: May 16, 2001
    Publication date: January 31, 2002
    Applicant: STMicroelectronics S.A.
    Inventor: Francesco La Rosa
  • Process for controlling a read access for a dynamic random access memory and corresponding memory
    Publication number: 20020009008
    Abstract: Each memory cell of a memory device is connected to a bit line of a memory array and is associated with a read/rewrite amplifier connected between the bit line and a reference bit line. The bit line and the reference bit line are precharged to a predetermined precharge voltage. The content of a selected memory cell is read and refreshed based upon an associated read/rewrite amplifier. Between the precharging and the reading and refreshing, two capacitors previously charged to a charging voltage greater than the precharge voltage are respectively connected to the bit line and to the reference bit line.
    Type: Application
    Filed: June 18, 2001
    Publication date: January 24, 2002
    Applicant: STMicroelectronics S.A.
    Inventor: Richard Ferrant