Patents Assigned to STMicroelectronics S.A.
  • Integrated circuit comprising a memory cell of the DRAM type, and fabrication process
    Publication number: 20020119620
    Abstract: The integrated circuit comprises a semiconductor substrate SB supporting a memory cell PM of the DRAM type comprising an access transistor T and a storage capacitor TRC. The access transistor is made on the substrate, and the substrate includes a capacitive trench TRC buried beneath the transistor and forming the storage capacitor, the capacitive trench being in contact with one of the source and drain regions of the transistor.
    Type: Application
    Filed: January 11, 2002
    Publication date: August 29, 2002
    Applicant: STMicroelectronics S.A.
    Inventors: Olivier Menut, Yvon Gris
  • Method for the statistical test of integrated circuits
    Patent number: 6441635
    Abstract: In a method for testing integrated circuits present on a silicon wafer, a full sequence for the test of an integrated circuit comprises a plurality of elementary tests. The test method comprises preliminary steps consisting of the classification of the elementary test steps into statistically essential test steps and statistically secondary test steps and in defining a limited test sequence that comprises only statistically essential elementary test steps. The integrated circuits are then tested by means of a test loop comprising a first test step consisting of the application, to K integrated circuits, of a full test sequence and a second test step consisting of the application, to N following integrated circuits, of a reduced test sequence.
    Type: Grant
    Filed: February 22, 2000
    Date of Patent: August 27, 2002
    Assignee: STMicroelectronics, S.A.
    Inventor: Fabien Roulet
  • Digital signal processor with parallel architecture
    Publication number: 20020116596
    Abstract: A digital signal processor is designed to execute variable-sized instructions that may include up to N elementary instruction codes. The processor comprises a memory program comprising I individually addressable, parallel-connected memory banks in which the codes of a program are recorded in an interlaced fashion, and a circuit for reading the program memory arranged to read a code in each of the I memory banks during a cycle for reading an instruction. A cycle for reading an instruction in the program memory includes reading a sequence of codes that includes the instruction code or codes to be read and can also include codes, belonging to a following instruction, that are filtered before the instruction is applied to execution units. The program memory of the digital signal processor does not include any no-operation type codes.
    Type: Application
    Filed: July 26, 2001
    Publication date: August 22, 2002
    Applicant: STMicroelectronics S.A.
    Inventors: Jose Sanches, Marco Cornero, Miguel Santana, Philippe Guillaume, Jean-Marc Daveau, Thierry Lepley, Pierre Paulin, Michel Harrand
  • Integrated circuit having photodiode device and associated fabrication process
    Publication number: 20020113233
    Abstract: An integrated circuit is provided that includes a substrate incorporating a semiconductor photodiode device having a p-n junction. The photodiode device includes at least one capacitive trench buried in the substrate and connected in parallel with the junction. In a preferred embodiment, the substrate is formed from silicon, and the capacitive trench includes an internal doped silicon region partially enveloped by an insulating wall that laterally separates the internal region from the substrate. Also provided is a method for fabricating an integrated circuit including a substrate that incorporates a semiconductor photodiode device having a p-n junction.
    Type: Application
    Filed: January 11, 2002
    Publication date: August 22, 2002
    Applicant: STMICROELECTRONICS S.A.
    Inventors: Olivier Menut, Yvon Gris
  • Microprocessor for saving contextual data when switching to a test program
    Publication number: 20020113535
    Abstract: A microprocessor may be switchable between a normal mode and a test mode for performing a test program and may include a central processing unit (CPU) for saving contextual data in a stack of the microprocessor at the time of switching to the test mode. The CPU may deliver, at the beginning of the test program and on an input/output port, contextual data present in the stack beginning with the top of the stack. The CPU may also decrement a stack pointer by a value corresponding to a number of contextual data delivered.
    Type: Application
    Filed: November 28, 2001
    Publication date: August 22, 2002
    Applicant: STMicroelectronics S.A.
    Inventors: Franck Roche, Thierry Bouquier
  • Circuit for the filtering of parasitic logic signals
    Publication number: 20020113643
    Abstract: A filtering circuit includes circuits for delivering first and second ramp-shaped signals when a logic signal to be filtered changes values, and includes logic circuits each with a switching threshold, for receiving the ramp-shaped signals. A memory unit delivers an output signal having a first value when outputs of the logic circuits have a first pair of values, and delivers a second value when the outputs of the logic circuits have a second pair of values. The filtering circuit may be applied to the filtering of an external clock signal in serial type memory devices.
    Type: Application
    Filed: August 23, 2001
    Publication date: August 22, 2002
    Applicant: STMicroelectronics S.A.
    Inventor: Francesco La Rosa
  • Defluoridation of waste water
    Patent number: 6436297
    Abstract: The present invention relates to a method of defluoridation of waste water, including a step of acid neutralization between a basic neutralization step and a decantation step.
    Type: Grant
    Filed: November 24, 1998
    Date of Patent: August 20, 2002
    Assignee: STMicroelectronics S.A.
    Inventors: Jacques Lebeau, Christophe Maury
  • Charge pump type voltage booster circuit
    Patent number: 6437609
    Abstract: An integrated circuit card receives power in the form of a radio frequency signal and includes a voltage generator that produces a first power supply voltage. The card also includes a voltage booster circuit for producing a high voltage that receives the first power supply voltage at a first supply input terminal. The voltage booster circuit also receives a second power supply voltage higher than the first power supply voltage at a second supply input terminal.
    Type: Grant
    Filed: October 20, 2000
    Date of Patent: August 20, 2002
    Assignee: STMicroelectronics S.A.
    Inventor: Mohamad Chehadi
  • Process for fabricating a self-aligned double-polysilicon bipolar transistor
    Patent number: 6436782
    Abstract: The process includes successively forming, over a base region of a semiconductor substrate, a poly-Ge or poly-SiGe layer, an etch-stop layer over a selected zone of the Ge or SiGe layer, a layer of poly-Si of the same conductivity type as the base region, then an outer layer of dielectric material. Etching the layers includes stopping at the stop layer to form an emitter window preform, removing the stop film and selectively removing the Ge or SiGe layer in the emitter window preform to form an emitter window and to form an emitter made of poly-Si of conductivity type the opposite of the base region in the window.
    Type: Grant
    Filed: February 28, 2001
    Date of Patent: August 20, 2002
    Assignee: STMicroelectronics S.A.
    Inventors: Alain Chantre, Michel Marty, Hélène Baudry
  • Small-sized digital generator producing clock signals
    Publication number: 20020109536
    Abstract: A generator includes an oscillator for producing a clock signal from N logic signals representing an N-bit control number, with N being an integer greater than 1. The oscillator has N+1 components. The N most significant components are each assigned a place value i ranging from 1 to N, and a least significant component provides the clock signal. At least one component with a place value i greater than 1 includes first and second arms. The first arm includes a cell and a first switch connected in series, and the second arm includes 1+21 cells and a second switch connected in series. Each cell includes an odd number of inverters.
    Type: Application
    Filed: October 30, 2001
    Publication date: August 15, 2002
    Applicant: STMicroelectronics S.A.
    Inventors: Bruno Gailhard, Olivier Ferrand
  • Regulated voltage generator for integrated circuit
    Publication number: 20020109491
    Abstract: A regulated voltage generator provides different regulated voltages to an integrated circuit. The regulated voltage generator includes a bandgap reference circuit and at least one gain stage connected to an output thereof. The output voltage of the bandgap reference circuit varies as a function of temperature to compensate for variations in the gain stage made up of first and second transistors. A regulated voltage output by the regulated voltage generator is independent of temperature and of the supply voltage. The value of the regulated voltage is adjusted via a load resistor and via the first and second transistors along with an output transistor of the bandgap reference circuit.
    Type: Application
    Filed: September 14, 2001
    Publication date: August 15, 2002
    Applicant: STMicroelectronics S.A.
    Inventor: Edith Kussener
  • Dram memory integration method
    Publication number: 20020110976
    Abstract: The invention relates to a DRAM integration method that does away with the alignment margins inherent to the photoetching step of the upper electrode of the capacitance for inserting the bit line contact. The removal of the upper electrode is self-aligned on the lower electrode of the capacitance. This is accomplished by forming a difference in topography at the point where the opening of the upper electrode is to be made, and depositing a non-doped polysilicon layer on the upper electrode. An implantation of dopants is performed on this layer, and the part of the non-doped layer located in the lower part of the zone showing the difference in topography is selectively etched. The remainder of the polysilicon layer and the part of the upper electrode located in the lower layer are also etched.
    Type: Application
    Filed: January 8, 2002
    Publication date: August 15, 2002
    Applicant: STMicroelectronics S.A.
    Inventors: Philippe Coronel, Marc Piazza, Francois Leverd
  • Semiconductor device with an isolated zone and corresponding fabrication process
    Publication number: 20020109188
    Abstract: The semiconductor device comprises a semiconductor substrate (SB) having locally at least one zone (ZL) terminating in the surface of the substrate and entirely bordered, along its lateral edges and its bottom, by an insulating material so as to be completely isolated from the rest of the substrate. The horizontal isolating layer may be a layer of constant thickness or a crenellated layer.
    Type: Application
    Filed: January 11, 2002
    Publication date: August 15, 2002
    Applicant: STMICROELECTRONICS S.A.
    Inventors: Olivier Menut, Guillaume Bouche, Herve Jaouen
  • Precise digital generator producing clock signals
    Publication number: 20020109554
    Abstract: A generator includes an oscillator for producing a clock signal from an N-bit control number. The oscillator includes a first group of cells, with each cell including at least one series connected inverter. A first selection circuit selects a variable number of the cells as a function of the most significant bits of the control number. The oscillator also includes a second group of cells, with each cell including at least one series connected inverter. A second selection circuit selects one of the cells as a function of the least significant bits of the control number. The selected cells of the first and second groups of cells are series connected to form a chain of inverters.
    Type: Application
    Filed: October 30, 2001
    Publication date: August 15, 2002
    Applicant: STMicroelectronics S.A.
    Inventors: Bruno Gailhard, Olivier Ferrand
  • Fast access to buffer circuits
    Patent number: 6434655
    Abstract: A device and associated methods for the storage and retrieval of data elements in a buffer circuit include each data element being transmitted to the buffer circuit through a transmission bus and a bus interface. A data element is stored in a memory when a first register is not empty. Additionally, when the first register is not empty, a data element is also stored in an additional register directly accessible by a decoding interface. The time of access to the data elements in the buffer circuit may be reduced.
    Type: Grant
    Filed: June 2, 1999
    Date of Patent: August 13, 2002
    Assignee: STMicroelectronics S.A.
    Inventors: Francois Agon, Mark Vos
  • Regulating device for receiving a variable voltage and delivering a constant voltage and related methods
    Patent number: 6433526
    Abstract: A regulating device for receiving a variable voltage and delivering a constant voltage includes a regulating element that includes a circuit for comparing the variable voltage with a reference voltage, a circuit for dividing the variable voltage by a factor, and a switching circuit for supplying the regulating element with a voltage equal either to the variable voltage or to the divided variable voltage. The switching circuit may be controlled by the comparison circuit in such a way that the regulating element is supplied with the variable voltage if a voltage condition is not satisfied and with the divided variable voltage if the voltage condition is satisfied.
    Type: Grant
    Filed: December 28, 2000
    Date of Patent: August 13, 2002
    Assignee: STMicroelectronics S.A.
    Inventor: Laurent Micheli
  • Card reader comprising an energy-saving system
    Publication number: 20020105234
    Abstract: A smart card reader includes a housing for receiving a smart card, a microprocessor, and a connector for connecting the microprocessor to the received smart card for establishing communications therebetween. A voltage source provides a power supply voltage to the microprocessor based upon the smart card being received in the housing. The smart card reader further includes a first switch interposed between the voltage source and a power supply terminal of the microprocessor. The first switch is closed when the received smart card is at an end of travel in the housing so that the power supply voltage is provided to the microprocessor, and is opened when the received smart card is no longer at the end of travel in the housing so that the power supply voltage is not provided to the microprocessor.
    Type: Application
    Filed: January 29, 2002
    Publication date: August 8, 2002
    Applicant: STMicroelectronics S.A.
    Inventors: Ludovic Ruat, Olivier Ferrand, Bruno Gailhard
  • Demodulation capacity of an electromagnetic transponder
    Publication number: 20020105376
    Abstract: An electromagnetic transponder including an oscillating circuit adapted to extracting from a radiating field a high-frequency amplitude-modulated signal, circuitry for extracting from said high-frequency signal an approximately D.C. supply voltage, a demodulator of data carried by the high-frequency signal, and circuitry for separately regulating the supply voltage and a useful voltage carrying the data.
    Type: Application
    Filed: January 2, 2002
    Publication date: August 8, 2002
    Applicant: STMicroelectronics S.A.
    Inventors: Michel Bardouillet, Nathalie Donat, Vineet Tiwart
  • Mould for injection-moulding a material for coating integrated circuit chips on a substrate
    Publication number: 20020101006
    Abstract: An injection-molding mold having two parts adapted to take up between them the periphery of a substrate and one of which defines a molding cavity connected to means for feeding a coating material for encapsulating a row of spaced integrated circuit chips carried by a mounting face of said substrate and placed in said cavity, characterized in that the part (10) with cavities (14) includes a slot (17) for injecting the coating material into said cavity above the mounting face (2) of the substrate, recessed into its face (12) bearing on the substrate (1) along said row of chips and extending approximately the whole length of that row of chips.
    Type: Application
    Filed: February 1, 2001
    Publication date: August 1, 2002
    Applicant: STMicroelectronics S.A.
    Inventor: Christophe Prior
  • Universal modulator/demodulator
    Publication number: 20020101916
    Abstract: A modulation/demodulation device capable of operating with several types of modulation using different carrier frequencies may include a modulator which modulates at least one signal by a signal of a predetermined duration and representative of a binary information supplied by a microprocessor. The device may also include a demodulator which demodulates the modulated signals arriving from a remote site. This may be done by determining the type of modulation of the received signals and their carrier frequency (or frequencies), supplying signals from an analysis of the signals received according to the determined type of modulation, and detecting the signals of determined duration representative of binary information to make them accessible to the microprocessor.
    Type: Application
    Filed: October 26, 2001
    Publication date: August 1, 2002
    Applicant: STMicroelectronics S.A.
    Inventor: Maurice Le Van Suu