Abstract: A Darlington differential amplifier includes a differential pair of Darlington transistors, with each pair including a first transistor and a second transistor connected in cascade to the first transistor. The first transistor is controlled by an externally generated voltage and drives the second transistor. The first and second transistors each include first and second conducting terminals, with the first conducting terminals being connected together and forming an output node of the amplifier. A first degeneration impedance is connected between the second conduction terminals of the second transistors in the pair of Darlington transistors. A second degeneration impedance is connected between the second conduction terminals of the first transistors in the pair of Darlington transistors for reducing harmonic distortion of the amplifier.

Abstract: Once slot synchronization has been obtained in a first step, during a second step there is acquired, by means of correlation of the received signal (r) with the synchronization codes, the information corresponding to the codegroup and to the fine slot synchronization. The synchronization codes are split into codesets. In a first step, a synchronization code identifying a corresponding codeset (CS) is identified by means of correlation and search for the maximum value of correlation energy. In a second step, the received signal (r) is correlated with the remaining codes belonging to the codeset identified. The information thus obtained, which corresponds to all the synchronization codes comprised in the codeset identified, is used for obtaining frame synchronization and codegroup identification. Preferential application is in mobile communication systems based upon standards, such as UMTS, CDMA2000, IS95 or WBCDMA.

Abstract: A reliable method of sensing the inlet air flow in a combustion chamber of a cylinder of an internal combustion engine includes assessing the inlet air flow with soft-computing techniques basically exploiting a combustion pressure signal generated by a pressure sensor installed in the cylinder.

Abstract: An ion-implantation machine has an implantation chamber with a vent inlet; a vacuum pump is connected to the implantation chamber through a vacuum valve. A pipe connects the vent inlet of the implantation chamber to a source of a fluid containing oxygen. The fluid containing oxygen is preferably environmental air. A flow-rate control valve is arranged on the pipe and is activated only after closing the vacuum valve.

Abstract: A soft-computing method for establishing the dissipation law of the heat in a diesel Common Rail engine, in particular for establishing the dissipation mean speed (HRR) of the heat, includes the following steps: choosing a number of Wiebe functions whereon a dissipation speed signal (HRR) of the heat is decomposed; applying a Transform ? to the dissipation speed signal (HRR) of the heat; carrying out analysis of homogeneity of the Transform ? output; realizing a corresponding neural network MLP wherein the design is guided by an evolutive algorithm; and training and testing the neural network MLP.

Abstract: A method for generating interrupt commands for a microprocessor system includes storing interrupts in a pending interrupts register, and storing priority values associated with the stored interrupts in a plurality of priority registers coupled to the pending interrupts register. A plurality of counters coupled in cascade to the plurality of priority registers are loaded with the stored priority values. The loaded priority values are incremented at predetermined intervals, and are compared for identifying the interrupt having a highest priority. The method further includes identifying a respective interrupt service routine to be executed based upon the interrupt having the highest priority.

Abstract: The present invention refers to a switching power supply, in particular to a power factor corrector, and more particularly to a circuit for the programmable protection against output over-voltages. It also refers to a power factor corrector integrated circuit comprising a circuit for the programmable protection against output over-voltages. In one embodiment the circuit for the programmable protection against output over-voltages in a power Factor corrector comprises means for detecting a signal proportional to the output voltage; a first preset reference voltage; a second preset reference voltage; a transconductance amplifier which receives in input the signal proportional to the output voltage and the first preset reference voltage; a comparator which receives in input the signal proportional to the output voltage and the second preset reference voltage; means suitable for absorbing a current coming from the signal proportional to the output voltage.

Abstract: A process for manufacturing a dual charge storage location electrically programmable memory cell that includes the steps of forming a central insulated gate over a semiconductor substrate; forming physically separated charge-confining layers stack portions of a dielectric-charge trapping material-dielectric layers stack at the sides of the central gate, the charge trapping material layer in each charge-confining layers stack portion forming a charge storage element; forming side control gates over each of the charge-confining layers stack portions; forming memory cell source/drain regions laterally to the side control gates; and electrically connecting the side control gates to the central gate. Each of the charge-confining layers stack portions at the sides of the central gate is formed with an “L” shape, with a base charge-confining layers stack portion lying on the substrate surface and an upright charge-confining layers stack portion lying against a respective side of the insulated gate.

Abstract: A read/write assembly for magnetic hard disks includes at least: one supporting element; one read/write (R/W) transducer; one micro-actuator, set between the R/W transducer and the supporting element; one electrical-connection structure for connection to a remote device carried by the supporting element and connected to the R/W transducer and to the micro-actuator. In addition, a protective structure, set so as to cover the micro-actuator is made of a single piece with the electrical-connection structure.

Abstract: A method is for compressing a digital image including a matrix of elements, with each element including at least one component of a different type for representing a pixel. The method includes splitting the digital image into a plurality of blocks, and calculating for each block a group of discrete cosine transform (DCT) coefficients for the components of each type, and quantizing the DCT coefficients of each group using a corresponding quantization table scaled by a gain factor for achieving a target compression factor. The method also includes further quantizing the DCT coefficients of each group using the corresponding quantization table scaled by a pre-set factor, and arranging the further quantized DCT coefficients in a zig-zig vector.

Abstract: A selector switch may be controlled by a single-ended control signal for steering a current through a load or through an auxiliary line. The selector switch may include a first terminal to be coupled to the load, and a second terminal to be connected to the auxiliary line, and two analog switches coupled to respective ones of the first and second terminals and configured to implement a single pole double throw switch so that a conduction or non-conduction state is determined by the single-ended control signal for steering the current through the load or the auxiliary line. The selector switch may also include a circuit defining a positive feedback loop controlling the two analog switches.

Abstract: A multi-channel power amplifier for driving a plurality of loads, each associated to a respective channel, each channel comprising a pair of operational amplifiers, first and second, one operational amplifier of each channel being connectable through switches either in a bridge configuration with the other operational amplifier or in single-ended configuration to a constant reference voltage for driving the load of the respective channel, the amplifier comprises circuit means for comparing the signal level of the channels with at least a threshold and outputting a logic control signal for the switches. A relative method of controlling a power amplifier that allows a sensible reduction of distortion at the price of a negligible increase of dissipated power is disclosed.

Abstract: There is provided an adjustable harmonic distortion detector that includes a clock signal source, means for the detection of a first period of evaluation, and means for the detection of a second period of evaluation. The detector has the characteristic that a first block memorizes a number equal to the clock pulses present in the first period of evaluation, a multiplier block performs a multiplication between the number stored in the first block and a multiplicative factor during the second period of evaluation, and a second block memorizes the outcome. The second block is adapted to generate an output signal when the outcome in the second block is equal to zero.

Abstract: A method of sensing the air/fuel ratio in a combustion chamber of an internal combustion engine that may be easily implemented by a respective low-cost device includes a pressure sensor and a learning machine that generates a sensing signal representing the air/fuel ratio by processing the waveform of the pressure in at least one cylinder of the engine. In practice, the learning machine extracts characteristic parameters of the waveform of the pressure and as a function of a certain number of them generates the sensing signal.

Abstract: A method of programming a multi-level, electrically-programmable memory with memory cells electrically programmable into at least two distinct programmed states, includes: defining at least two programming sequences, each one being designed for bringing memory cells into at least one respective programmed state; receiving a pattern of data to be written into a selected group of memory cells of the memory; analyzing the pattern for determining sub-groups of memory cells, each sub-group of memory cells including the memory cells in the selected group that are to be brought into at least a respective one of the at least two programmed states; and submitting the memory cells in each sub-group to the respective programming sequence. A memory circuit and a computing system are also provided.

Abstract: In a method and system for reducing power consumed by a magnetic memory, magnetic memory cells are coupled to a bit line and are associated with a plurality of digit lines. A bit line current is provided in the bit line. Digit currents are provided in parallel in the digit lines at substantially the same time as the bit line current. The digit and bit line currents allow the magnetic memory cells to be written to a plurality of states in parallel.

Abstract: A sensor having an array of photo sensitive elements for acquiring images of the passenger compartment in a motor vehicle and a circuit for processing the signals corresponding to the images generated by said photo sensitive elements. The processing circuit is configured according to a cellular neural network processing architecture of the image signals and can generate an output signal indicating the decision on whether to deploy an airbag to which the sensor is associated or to control the explosion of the airbag. Preferably, the photo sensitive array and the processing circuit are comprised on a single integrated component, preferably implementing CMOS technology.

Abstract: A method programs a memory device that includes at least one memory cell matrix. The programming method the steps of: erasing the memory cells; soft programming the memory cells; and complete programming of a group of such memory cells each of them storing its own logic value. Advantageously, the first complete programming step of a group of such memory cells involves cells belonging to a block (A) of the matrix being electrically insulated from the rest of the matrix. A memory device suitable to implement the proposed method is also described.

Abstract: A voltage multiplier includes a control circuit that generates first and second signals in phase opposition and a charging section. The latter comprises a first capacitor having a first terminal coupled to the first signal and a second capacitor having a first terminal coupled with the second signal. The multiplier includes respective parasitic capacitances placed respectively between the capacitors and a reference voltage. The charging section is coupled with an input voltage and is suitable for producing an output voltage that is a multiple of the constant voltage. The multiplier comprises a switch that selectively connects the parasitic capacitances to carry out a charge transfer from one parasitic capacitance to the other.

Abstract: In an encryption/decryption system for converting data signals between an unencrypted plaintext format and an encrypted ciphertext format plurality of round modules are provided permitting a respective set of input data signals (TEXT IN) to generate a respective set of output data signals (TEXT OUT) by means of transformation controlled by a round key (SUBKEY). The transformation is identified by at least one map function derived from a chaotic map.