Abstract: A phase change memory has an array formed by a plurality of cells, each including a memory element of calcogenic material and a selection element connected in series to the memory element; a plurality of address lines connected to the cells; a write stage and a reading stage connected to the array. The write stage is formed by current generators, which supply preset currents to the selected cells so as to modify the resistance of the memory element. Reading takes place in voltage, by appropriately biasing the selected cell and comparing the current flowing therein with a reference value.

Abstract: The invention relates to a low supply voltage analog multiplier which comprises a pair of differential cells, each cell comprising a pair of bipolar transistors with coupled emitters. A first transistor of each cell receives an input signal on its base terminal and has its collector terminal coupled to a first voltage reference through a bias member. Advantageously, the second transistor of each cell is a diode configuration, and the cells are interconnected at a common node corresponding to the base terminals of the second transistors in each pair. This multiplier can be supplied very low voltages and still exhibit a high rate of operation along with reduced harmonic distortion of the output signal, even with input signals of peak-to-peak amplitude above 600 mV.

Abstract: The invention relates to a circuit for highly efficient driving of piezoelectric loads, comprising a linear driving circuit portion connected to the load through an inductive-resistive connection whereto a voltage waveform is applied. Advantageously, the circuit comprises further respective circuit portions, structurally independent, connected in turn to the inductive-resistive connection through respective inductors to supply a considerable fraction of the overall current required by the load in the transient and steady state respectively.

Abstract: A device for correcting a digital estimate of an electric signal is described. The device includes a comparator that generates a current proportional to the difference between an analog estimate signal, which derives from the digital estimate, and the electric signal. The device also includes a capacitor positioned to be charged by the current, a transistor that discharges the capacitor, and a comparator that compares the voltage at the terminal of the capacitor with a reference voltage. The device also includes a controller that drives the transistor in response to the output signal of the comparator and a logic device that generates a correction digital signal to be added to or subtracted from the digital estimate of the electric signal in correspondence of an ascending or descending waveform of the electric signal.

Abstract: A method is described for fixing a lens of an optical group with respect to an optical sensor in an image acquisition device comprising the steps of housing the optical sensor in a housing, fixing a lower holder of the optical group to the housing, aligning an upper holder of the optical group, wherein the lens is placed, with the sensor so as to align a focusing point of the lens with respect to the sensor, welding the upper holder to the lower holder. The welding step may be performed by means of ultrasounds.

Abstract: An ion-implantation machine has an implantation chamber with a vent inlet; a vacuum pump is connected to the implantation chamber through a vacuum valve. A pipe connects the vent inlet of the implantation chamber to a source of a fluid containing oxygen. The fluid containing oxygen is preferably environmental air. A flow-rate control valve is arranged on the pipe and is activated only after closing the vacuum valve.

Abstract: The bitrate of a digital signal is adapted in a dynamic way to the bandwidth available on a transmission channel, through the operations of: converting the digital signal into a multiple-description format, so as to have available a plurality of descriptions of the digital signal; and transmitting on the transmission channel descriptions of the digital signal chosen from among said plurality of multiple descriptions, the number of the transmitted descriptions being determined as a function of the bandwidth available on the transmission channel.

Abstract: A method of fabricating a wafer-size photovoltaic cell module includes defining an integrated cellular structure of a light converting monolateral or bilateral junction diode in an epitaxially grown detachable layer including a first deposited metal current collecting terminal of the diode. The method also includes laminating onto the surface of the processed epitaxially grown detachable layer a film of an optical grade plastic material resistant to hydrofluoric acid solutions. The method further includes immersing the wafer in a hydrofluoric acid solution causing detachment of the epitaxially grown silicon layer laminated with the film, and polishing the surface of separation of the detached epitaxially grown layer and forming a second metal current collecting terminal of the diode by masked deposition of a metal at a temperature tolerable by the film.

Abstract: The method is for estimating the fading coefficients of a plurality of transmission channels on which signals to be sent, generated as a function of a sequence of symbols, are transmitted according to a particular modulation, e.g. AM-PSK modulation. The fading coefficients are estimated by using estimations of the transmitted symbols obtained in advance, thus obtaining DC components of the received signal by coherent demodulation locked to the phases of the transmitted AM-PSK signals, and processing these DC components. The method may not require the choice of a stochastic distribution model of the channel fading, thus it remains efficient even when the channel characteristics vary significantly. Moreover, the method works correctly even if the received stream is disturbed by inter-symbolic interference (ISI) and/or by multi-path fading.

Abstract: A device for correcting a digital estimate of an electric signal is described. The device includes a comparator that generates a current proportional to the difference between an analog estimate signal, which derives from the digital estimate, and the electric signal. The device also includes a capacitor positioned to be charged by the current, a transistor that discharges the capacitor, and a comparator that compares the voltage at the terminal of the capacitor with a reference voltage. The device also includes a controller that drives the transistor in response to the output signal of the comparator and a logic device that generates a correction digital signal to be added to or subtracted from the digital estimate of the electric signal in correspondence of an ascending or descending waveform of the electric signal.

Abstract: A device for effectuating a digital estimate of a periodic electric signal is described. The device comprising a linear DAC having an output signal, a comparator that compares the output signal of the linear DAC with the periodic electric signal, and logic circuitry having in input the output signal of the comparator and a pulse clock signal. The logic circuitry provides a first digital signal in input to the linear DAC and a second digital signal representative of the estimate of the periodic electric signal.

Abstract: In a charge-pump device, a charge-pump circuit has an input, which is connected to a supply line and receives a supply voltage, and an output; in the charge-pump circuit a first elementary stage defines a first transfer node and a second transfer node that can be connected respectively to the input and to the output, and has at least one first phase input. In addition, in the first elementary stage a first switching element is arranged between the first transfer node and the second transfer node, has a control terminal receiving a control signal, and is closed during a charge-transfer interval; and first charge-storage means are connected between the control terminal and the first phase input. In the first elementary stage, a voltage-booster stage has an input connected to the first phase input of the first elementary stage, and an output connected to the first charge-storage means and supplies a boosted phase signal; in particular, the voltage-booster stage is operative during the charge-transfer interval.

Abstract: A method for generating sequences of memory addresses for a memory buffer having N*M locations includes making a first address and a last address of every sequence respectively equal to 0 and to N*M?1, assigning a first sequence of addresses, and each address but a last address of another sequence of addresses is generated by multiplying a corresponding address of a previous sequence by N, and performing a modular reduction of this product with respect to N*M?1. The method further includes calculating a greatest bit length of every address, and calculating an auxiliary constant as the modular reduction with respect to N*M?1 of the power of two raised to twice the greatest bit length.

Abstract: A biological molecule detection device that includes a detection array, arranged on a body and having one or more probes for detecting corresponding electrically charged molecules, wherein a time varying electric field generating circuit is provided for generating at least one time varying electric field around the detection array within the detection region. The time varying electric field moves the electrical charged molecules repeatedly back and forth over the probes, thus providing increased opportunities for interaction and speeding the detection process.

Abstract: A driving circuit is provided for a control terminal of a bipolar transistor in an emitter-switching configuration. The emitter-switching configuration is between first and second voltage references. The driving circuit includes at least one first resistive element connected to the control terminal of the bipolar transistor and a first capacitor connected to the resistive element with respect to a first circuit node and to the second voltage reference. The driving circuit further includes a Zener diode connected between the first circuit node and a second circuit node, and a second capacitor between the second circuit node and the second voltage reference.

Abstract: A reading method for a nonvolatile memory device, wherein the gate terminals of the array memory cell and of the reference memory cell are supplied with a same reading voltage having a ramp-like pattern, so as to modify their current-conduction states in successive times, and the contents of the array memory cell are determined on the basis of the modification order of the current-conduction states of the array memory cell and of the reference memory cell.

Abstract: An injection control method for controlling a “common rail” fuel injection system in a diesel engine is described. The method includes the following steps: an initializing step for acquiring engine control parameters; and a main adjustment cycle for adjusting operational variables of the engine. The injection control method also includes an interrupting step for adjusting an injection procedure proper of the injection system by variation of all the characteristic parameters of the injection procedure. Also described is an injection control system for a diesel engine based on the above method.

Abstract: The manufacturing process comprises the steps of growing epitaxially a first layer from a semiconductor material substrate, forming in the first layer a first and a second buried region spaced from one another and having conductivity of the type opposite that of the first layer; growing epitaxially on the first layer a second layer of semiconductor material having the same type of conductivity as the first layer; forming in the second layer a trench extending in depth beyond the buried regions, arranged between the buried regions, and having, in plan view, a frame shape; forming an oxide layer covering the lateral walls and the base wall of the trench; and filling the remaining part of the trench with an isolating material.

Abstract: A process forms an integrated device having: a first conductive region; a second conductive region; an insulating layer arranged between the first and the second conductive region; at least one through opening extending in the insulating layer between the first and the second conductive region; and a contact structure formed in the through opening and electrically connecting the first conductive region and the second conductive region. The contact structure is formed by a conductive material layer that coats the side surface and the bottom of the through opening and surrounds an empty region which is closed at the top by the second conductive region. The conductive material layer preferably comprises a titanium layer and a titanium-nitride layer arranged on top of one another.

Abstract: A two-phase charge pump is provided that is capable of being controlled by first and second clock signals that are out-of-phase and take alternatively a first value and a second value during consecutive phases. The charge pump includes a sequence of cascade-connected stages that each have a first section and a second section. Each section includes an input terminal and an output terminal, a capacitive element, and a controlled switch coupling the input terminal of the section with the output terminal of the section. The input terminals in each stage other than the first stage are cross-coupled with the output terminals in a preceding stage. The capacitive element has first and second terminals. The first terminals in the first and second sections receive the first and second clock signals, respectively, and the second terminal is coupled with the output terminal of the section. The controlled switch has a control terminal. In each stage, the control terminals are coupled to each other.