Patents Assigned to STMicroelectronics S.r.l.
  • Publication number: 20020180464
    Abstract: A distance sensor has a capacitive element in turn having a first plate which is positioned facing a second plate whose distance is to be measured. In the case of fingerprinting, the second plate is defined directly by the skin surface of the finger being printed. The sensor comprises an inverting amplifier, between the input and output of which the capacitive element is connected to form a negative feedback branch. By supplying an electric charge step to the input of the inverting amplifier, a voltage step directly proportional to the distance being measured is obtained at the output.
    Type: Application
    Filed: October 30, 2001
    Publication date: December 5, 2002
    Applicant: STMicroelectronics S.r.l.
    Inventor: Marco Tartagni
  • Publication number: 20020180054
    Abstract: An integrated device having: a first conductive region; a second conductive region; an insulating layer arranged between the first and the second conductive region; at least one through opening extending in the insulating layer between the first and the second conductive region; and a contact structure formed in the through opening and electrically connecting the first conductive region and the second conductive region. The contact structure is formed by a conductive material layer that coats the side surface and the bottom of the through opening and surrounds an empty region which is closed at the top by the second conductive region. The conductive material layer preferably comprises a titanium layer and a titanium-nitride layer arranged on top of one another.
    Type: Application
    Filed: April 18, 2002
    Publication date: December 5, 2002
    Applicant: STMicroelectronics S.r.l.
    Inventors: Raffaele Zambrano, Cesare Artoni, Chiara Corvasce
  • Publication number: 20020181277
    Abstract: The method for timing reading of a memory cell envisages supplying the memory cell (with a constant current by means of a first capacitive element, integrating said current in a time interval, and controlling the duration of the time interval in such a way as to compensate for any deviations in the current from a nominal value. In particular, a reference current is supplied to a reference cell by means of a second capacitive element; next, a first voltage present on the second capacitive element is measured; finally, the memory cell is deactivated when the first voltage is equal to a second voltage, which is constant.
    Type: Application
    Filed: April 16, 2002
    Publication date: December 5, 2002
    Applicant: STMicroelectronics S.r.l.
    Inventors: Rino Micheloni, Giovanni Campardo
  • Patent number: 6489907
    Abstract: A method of re-establishing the stability of a sigma-delta modulator having a plurality of integrator stages in cascade and a quantizer, achieving very short resetting times, a bit sequence corresponding to an instability state of the modulator is defined, the bit-stream output by the modulator is monitored to check whether it includes the instability sequence and, if the instability sequence is detected, the last integrator stage is reset and one or more preceding integrator stages are reset, progressively, until the instability sequence is no longer detected.
    Type: Grant
    Filed: July 30, 2001
    Date of Patent: December 3, 2002
    Assignee: STMicroelectronics S.r.l.
    Inventors: Paolo Cusinato, Andrea Baschirotto, Fabio Pasolini
  • Patent number: 6489664
    Abstract: A fabrication process and an integrated MOS device having multi-crystal silicon resisters are described. The process includes depositing a multi-crystal silicon layer on top of a single-crystal silicon body; forming silicon oxide regions on top of the multi-crystal silicon layer in zones where resistors are to be produced; depositing a metal silicide layer on top of and in contact with the multi-crystal silicon layer so as to form a double conductive layer; and shaping the conductive layer to form gate regions, of MOS transistors. During etching of the double conductive layer, the metal silicide layer on top of the silicon oxide regions is removed and the silicon oxide regions form masking regions for the multi-crystal silicon underneath, so as to form resistive regions having a greater resistivity than the gate regions.
    Type: Grant
    Filed: May 24, 2001
    Date of Patent: December 3, 2002
    Assignee: STMicroelectronics S.r.l.
    Inventors: Danilo Re, Massimo Monselice, Paola Maria Granatieri
  • Patent number: 6489831
    Abstract: A CMOS temperature sensor includes a first circuit portion for generating a voltage signal whose value increases with the temperature to be sensed, and a second circuit portion for generating an electric voltage signal whose value decreases with the temperature to be sensed. A comparator is provided as an output stage for comparing the values of both voltage signals. The generator element of the second circuit portion is a vertical bipolar transistor connected in a diode configuration.
    Type: Grant
    Filed: August 28, 2000
    Date of Patent: December 3, 2002
    Assignee: STMicroelectronics S.r.l.
    Inventors: Giovanni Matranga, Luca Lo Coco, Giuseppe Compagno
  • Patent number: 6489800
    Abstract: A method of testing an integrated circuit that includes supplying the integrated circuit in static conditions; biasing the p-type body regions with a potential more negative than the negative pole of the supply and the n-type body regions with a potential more positive than the positive pole of the supply; setting a current threshold value; measuring the current absorbed; comparing the current measured with the threshold current; and accepting or rejecting the integrated circuit if the comparison shows that the current measured is less than or is greater than the threshold value, respectively.
    Type: Grant
    Filed: September 14, 2000
    Date of Patent: December 3, 2002
    Assignee: STMicroelectronics S.r.l.
    Inventor: Carlo Dallavalle
  • Patent number: 6489758
    Abstract: Disclosed is a bootstrap circuit in DC/DC static converters having the characteristic of comprising a fixed frequency signal, a recharge circuit of a capacitor and current generator means, said generator means controlled so as to emit current pulses, in synchrony with said fixed frequency signal, of a predetermined duration, every time that charge accumulated by said capacitor goes below a predetermined level.
    Type: Grant
    Filed: July 24, 2001
    Date of Patent: December 3, 2002
    Assignee: STMicroelectronics S.r.l.
    Inventors: Ugo Moriconi, Claudio Adragna
  • Patent number: 6489840
    Abstract: A power amplification apparatus receiving in input an enable signal (En) and an input square wave signal (C) is described. The apparatus comprises a device (6) receiving the input square wave signal (C) and the enable signal (En) and which produces a new enable signal (Ens) of the apparatus which is synchronized with a rise or down front of the input square wave signal (C), so that an output square wave signal (Vo) of the apparatus, which is normally shifted of a certain period fraction with respect to the square wave signal (C) in input to the apparatus, has the first (Ti) and the last (Tf) pulses which have a duration equal to a period fraction of the output square wave signal (Vo).
    Type: Grant
    Filed: August 1, 2001
    Date of Patent: December 3, 2002
    Assignee: STMicroelectronics, S.r.l.
    Inventors: Edoardo Botti, Antonio Grosso
  • Patent number: 6489228
    Abstract: The integrated electronic device comprises a protection structure of metal, extending vertically and laterally to and along a predominant part of the periphery of an electronic component integrated underneath the pad region. The protection structure comprises a substantially annular region formed from a second metal layer and absorbing the stresses exerted on the pad during wire bonding. The annular region may be floating or form part of the path connecting the pad to the electronic component.
    Type: Grant
    Filed: October 2, 2000
    Date of Patent: December 3, 2002
    Assignee: STMicroelectronics S.r.l.
    Inventors: Benedetto Vigna, Enrico Maria Alfonso Ravanelli
  • Patent number: 6489807
    Abstract: A method is for driving an output buffer for outputting a datum of a certain voltage level with a certain slew-rate as a function of an input datum and a first enabling signal. The first enabling signal commands the buffer to a normal functioning state or to a high impedance state. The output buffer has an output stage controlled at least by a pull-up driving circuit and a pull-down driving circuit, and an enabling circuit input with the input datum and a second enabling signal and generating control signals. The control signals may be in phase or in phase opposition depending on whether the second enabling signal is active or disabled, and they are input into the respective driving circuits.
    Type: Grant
    Filed: August 8, 2001
    Date of Patent: December 3, 2002
    Assignee: STMicroelectronics S.r.l.
    Inventors: Giovanni Genna, Raffaele Solimene
  • Publication number: 20020175692
    Abstract: Method for detecting movements through a micro-electric-mechanical sensor, having a fixed body and a moving mass, forming at least one first and one second detection capacitor, connected to a common node and to a first, respectively a second detection node and having a common detection capacitance at rest and a capacitive unbalance in case of a movement. The method includes the steps of: feeding the common node with a constant detection voltage of predetermined duration; generating a feedback voltage to maintain the first and the second detection node at a constant common mode voltage; generating a compensation electric quantity, inversely proportional to the common detection capacitance at least in one predetermined range; supplying the compensating electric quantity to the common node; and detecting an output quantity related to the capacitive unbalance.
    Type: Application
    Filed: February 20, 2002
    Publication date: November 28, 2002
    Applicant: STMicroelectronics S.r.l.
    Inventors: Ernesto Lasalandra, Tommaso Ungaretti, Andrea Baschirotto
  • Patent number: 6487140
    Abstract: A control circuit manages transferring of data within a system, such as an interleaved memory. The system includes a plurality of data sources for providing an output data stream synchronous with an external timing signal, an output register for storing data available at an output of the system, and a selection multiplexer for transferring the data from the plurality of data sources to the output register. The control circuit includes a plurality of circuit blocks, with each circuit block being dedicated to one of the plurality of data sources. Each circuit block includes a detection circuit for detecting availability of the data at an output of a selected data source, and a conditioned update path connected to the detection circuit provides an update flag. A logic gate having a first input receives the update flag and a second input receives an output signal from the detection circuit for providing a selection signal for the selection multiplexer.
    Type: Grant
    Filed: January 31, 2001
    Date of Patent: November 26, 2002
    Assignee: STMicroelectronics S.r.l.
    Inventors: Francesco Tomaiuolo, Fabrizio Campanale, Salvatore Nicosia, Luca Giuseppe De Ambroggi, Promod Kumar
  • Patent number: 6486736
    Abstract: A class AB single-stage operational amplifier having input decoupler stages for voltage signals, a voltage repeater stage, biasing transistors and bias current generators for the input decoupler stages, and capacitors placed between the input decoupler stages and the voltage repeater stage so as to increase the phase margin.
    Type: Grant
    Filed: March 8, 2001
    Date of Patent: November 26, 2002
    Assignee: STMicroelectronics S.r.l.
    Inventors: Paolo Cusinato, Andrea Baschirotto, Vittorio Colonna, Gabriele Gandolfi
  • Patent number: 6487263
    Abstract: A digital circuit generates a phase synchronization signal for a digital input signal coded according to a biphase modulation. The phase synchronization signal is derived from a clock signal having a higher frequency than the maximum switching frequency of the digital input signal. The frequency of the clock signal is divided with a fully digital divider circuit having a non-integer ratio. The divider is self-synchronizing with the input digital signal. Control signals are used to enable or disable switching of the frequency divider. These control signals are generated by two circuits which sample the input signal with the master clock signal and analyze triplets of consecutive sampling values.
    Type: Grant
    Filed: December 2, 1998
    Date of Patent: November 26, 2002
    Assignee: STMicroelectronics S.r.l.
    Inventors: Marco Bianchessi, Sandro Dalle Feste, Nadia Serina, Marco Angelici
  • Patent number: 6487059
    Abstract: The power supply device includes a DC-DC converter circuit having a power switch and a driving stage. The driving stage has a compensation terminal on which a compensation voltage is present, and which receives a biasing current. The driving stage includes a control circuit having an output terminal connected to a control terminal of the power switch and disconnection-detecting circuitry connected to the compensation terminal and generating a signal for permanent turning-off of the power switch when the biasing current drops below a current-threshold value. The driving stage moreover includes over-voltage detecting circuitry connected to the compensation terminal and generating a signal for temporary turning-off of the power switch when the compensation voltage exceeds a voltage-threshold value.
    Type: Grant
    Filed: July 30, 2001
    Date of Patent: November 26, 2002
    Assignee: STMicroelectronics S.r.l.
    Inventors: Gregorio Bontempo, Claudio Adragna, Mauro Fagnani, Albino Pidutti, Francesco Pulvirenti, Roberto Quaglino, Giuseppe Gattavari
  • Patent number: 6487000
    Abstract: A microelectromechanical structure, usable in an optical switch for directing a light beam towards one of two light guide elements, including: a mirror element, rotatably movable; an actuator, which can translate; and a motion conversion assembly, arranged between the mirror element and the actuator. The motion conversion assembly includes a projection integral with the mirror element and elastic engagement elements integral with the actuator and elastically loaded towards the projection. The elastic engagement elements are formed by metal plates fixed to the actuator at one of their ends and engaging the projection with an abutting edge countershaped with respect to the projection.
    Type: Grant
    Filed: August 8, 2001
    Date of Patent: November 26, 2002
    Assignee: STMicroelectronics S.r.l.
    Inventors: Ubaldo Mastromatteo, Bruno Murari
  • Patent number: 6483449
    Abstract: A digital-analog converter having a sigma delta cascade modulator with two outputs, particularly a third order sigma delta modulator 2+1. The digital-analog converter includes a sigma delta modulator of the type having two outputs able to supply a first and a second signal to the two outputs; a reconstruction circuit of the first and second signals able to provide a reconstructed signal; a filter able to filter the reconstructed signal; the reconstruction circuit combining the first and second signals according to the following relationship: Yout Y1*(1+Z−1)−Y2*(1−Z−1)+Y2*Z−2*(1−Z−1), where: Yout corresponds to said reconstructed signal, Y1 corresponds to said first signal, Y2 corresponds to said according to signal, Z corresponds to the Z transform.
    Type: Grant
    Filed: July 11, 2001
    Date of Patent: November 19, 2002
    Assignee: STMicroelectronics S.r.l.
    Inventors: Gabriele Gandolfi, Andrea Baschirotto, Vittorio Colonna, Paolo Cusinato
  • Patent number: 6482698
    Abstract: A method for manufacturing an integrated circuit having a memory device and a logic circuit includes forming a plurality of first transistors in a first portion of a semiconductor substrate, a plurality of second transistors in a second portion of the semiconductor substrate, and a plurality of memory cells in a third portion of the semiconductor substrate. A matrix mask used for selectively removing a dielectric layer from the first and third portions of the semiconductor substrate allows dielectric to remain on a floating gate of the plurality of memory cells and on the gate electrodes of the plurality of first transistors. A control gate is then formed on the floating gate, which is separated by the dielectric. Portions of the gate electrodes for the plurality of first transistors are left free so that contact is made with the transistors.
    Type: Grant
    Filed: March 26, 2001
    Date of Patent: November 19, 2002
    Assignee: STMicroelectronics S.r.l.
    Inventors: Daniela Peschiaroli, Alfonso Maurelli, Elisabetta Palumbo, Fausto Piazza
  • Patent number: 6483671
    Abstract: The microstructure, of semiconductor material, includes a micromotor and an encapsulation structure. The micromotor is externally delimited by a first and a second faces, opposed to one another, and by a side delimitation trench. The encapsulation structure surrounds the micromotor and has a bottom portion facing the second face of the micromotor, and an outer lateral portion facing the side delimitation trench. An outer separation trench extends through the bottom portion of the encapsulation structure, separates a mobile region from the external side portion, and defines, together with the side delimitation trench, a labyrinthic path for contaminating particles. A sealing ring extends on the bottom portion of the encapsulation structure around an inner separation trench separating the mobile region from a fixed central region and closes a gap between the bottom portion and a mobile component connected to the mobile region of the encapsulation structure.
    Type: Grant
    Filed: February 1, 2001
    Date of Patent: November 19, 2002
    Assignee: STMicroelectronics, S.r.l.
    Inventors: Benedetto Vigna, Simone Sassolini, Francesco Ratti