Abstract: A monocrystalline silicon substrate is subjected to the following operations: implantation of doping impurities in a high concentration to form a planar region of a first type; selective anisotropic etching in order to hollow out trenches to a depth greater than the depth of the planar region; oxidation of the silicon inside the trenches, starting a certain distance from the surface of the substrate, until a silicon dioxide plaque is formed, surmounted by residues of strongly-doped silicon; epitaxial growth between and on top of the silicon residues to close the trenches and to bring about a redistribution of the doping impurities into the silicon grown to produce a buried region with low resistivity in an epitaxial layer of high resistivity.

Abstract: A circuit and method are disclosed for asynchronously accessing accessing a ferroelectric memory device. The ferroelectric memory device internally generates timing signals for latching a received address signal and driving the row lines of the device based upon transitions appearing on the received address signal. The circuit receives an address signal and asserts an edge detect signal in response. The address signal is latched following the edge detect a signal being asserted. Address decode circuitry receives the latched address and generates decoded output signals that identify a row of memory cells to be accessed. In this way, a ferroelectric memory device may effectively replace an asynchronous static random access random access memory (SRAM) device.

Abstract: A method is provided for controlling a capacitive charge pump. The charge pump is regulated by a regulating voltage when the supply voltage is greater than the regulating voltage. When the supply voltage is less than a triggering voltage, which is less than or equal to the regulating voltage, the charge pump is automatically supplied between the supply voltage and ground. In one preferred method, the charge pump has a first supply terminal connected to the supply voltage and a second supply terminal that is automatically grounded when the supply voltage is less than the triggering voltage. Also provided is a capacitive charge pump device that includes a charge pump having first and second supply terminals, a voltage regulator delivering a regulating voltage, a switch connected between the second supply terminal and ground, and switch control circuitry for automatically controlling the switch.

Abstract: A motion estimator operating on a recursive mode reduces the number of operations per pixels required by the particular coding process being implemented. The coding process includes the MPEG standard. A method is based on the correlation existing among motion vectors associated to macroblocks in a common position in temporally adjacent images. The method is also associated to macroblocks belonging to the same picture and spatially adjacent to the current macroblock being processed. By using this double correlation, the calculation burden is reduced.

Abstract: A method and circuit are disclosed for controlling the write head of a magnetic disk storage device. The circuit includes a pull-up device coupled to a terminal of the write head, for selectively providing a current to the write head though the write head terminal. The circuit further includes parallel-connected current sink circuits, each of which is coupled to the write head terminal and selectively activated to draw current from the write head via the write head terminal. A first transistor is connected in series between the pull-up device and the write head terminal and biased to provide a voltage differential between the write head terminal and the pull-up device. A second transistor is connected in series between the write head terminal and the current sink circuits and biased to provide a voltage differential between the write head terminal and the current sink circuits.

Abstract: A method for correcting color in a system for creating a panoramic image from a plurality of images taken by a camera. The method comprising the steps of: receiving a color channel from at least a first image and a second image; creating an overlap portion between the first image and second image; and adjusting the color channel for the first image and for the second image in at least the overlap portion between the first image and the second image which is independent of motion estimation. In an alternate embodiment, a system and computer readable medium corresponding to the above method is described.

Abstract: A single integrated circuit chip connected to an external computer device. The chip includes a CPU with registers, a bus for addressing devices assigned to a memory address space of the CPU and providing a parallel path between the CPU and a first memory local to the CPU, an address memory for storing addresses assigned to the devices, and an external port connected to the bus. The port includes an internal parallel signal format connection to the bus and a less parallel external connection to the external computer device. The port forms part of the memory address space of the CPU. The external computer device includes a second memory local to the external computer device and accessible by the CPU through the port. Address diversion means are provided for reconfiguring the memory address space of the CPU to assign to the port memory addresses of another one of the devices.

Abstract: An electrically-modifiable, non-volatile, semiconductor memory comprising a plurality of user memory locations which can be addressed individually from outside the memory in order to read and to modify the data held therein is characterized in that, for each user memory location, there is a corresponding pair of physical memory locations in the memory, which assume, alternatively, the functions of an active memory location and of a non-active memory location, the active memory location containing a previously-written datum and the non-active memory location being available for the writing of a new datum to replace the previously-written datum, so that, upon a request to replace the previous datum with the new datum, the previous datum is kept in the memory until the new datum has been written.

Abstract: Semiconductor device comprising a metal circuit with two parts wound into spirals which are formed such that the branches of one of the parts and the corresponding branches of the other part lie on either side of a median longitudinal region and are symmetrical with respect to this region. A common junction connects the inner ends of the parts and lies across the median longitudinal region and the intermediate junctions between the branches of one of the parts pass above or below the intermediate junctions between the branches of the other part. A common external connection is connected to the common junction and separate external connection are connected respectively to the outer ends of the wound parts. The wound parts constitute two symmetrical metal windings formed between the common connection and the separate connection, respectively, and constituting symmetrical inductors.

Abstract: To establish whether a precharged node remains isolated or alternatively is subject to discharge, the conventional circuit allows uncertainty. For a period after evaluation starts, the conventional circuit will give a tentative result that may subsequently turn out to be wrong. During evaluation power is dissipated. A differential offset dynamic comparator and timing circuit are used to evaluate whether the node is being discharged. Because the comparator has an offset, much smaller deviations from the precharge potential can be sensed: because it is dynamic, it does not consume steady state current. The timing circuit permits precise knowledge of when to look at the output: before the timing period has elapsed, the result is known to be invalid.

Abstract: Disclosed is a device to control a circuit for the vertical deflection of a spot scanning a screen, and more particularly a control device whose output amplifier stage works in class D mode at the rate of a switching signal called a first switching signal. The control device has an internal auxiliary supply to generate the overvoltage needed for the fast flyback of the spot. This auxiliary power supply is a switching voltage generation circuit whose switching signal, called a second switching signal, is synchronous with the first switching signal. The present invention has been shown to used advantageously in television screens and/or computer screens.

Abstract: A field-effect transistor and a method for its fabrication is described. The transistor includes a monocrystalline semiconductor channel region overlying and epitaxially continuous with a body region of a semiconductor substrate. First and second semiconductor source/drain regions laterally adjoin opposite sides of the channel region and are electrically isolated from the body region by an underlying first dielectric layer. The source/drain regions include both polycrystalline and monocrystalline semiconductor material. A conductive gate electrode is formed over a second dielectric layer overlying the channel region. The transistor is formed by patterning the first dielectric layer to selectively cover a portion of the substrate and leave an exposed portion of the substrate.

Abstract: A circuit implementing a non-integer order dynamic system includes a neural network that receives at least one input signal and generates therefrom at least one output signal. The input and output signals are related to each by a non-integer order integro-differential relationship through the coefficients of the neural network. A plurality of such circuits, implementing respective non-integer order controllers can be interconnected in an arrangement wherein any of the integral or differential blocks included in one of these circuits generates a signal which is fed to any of the integral or differential blocks of another circuit in the system.

Abstract: A charge pump for a nonvolatile memory, having a clock generator circuit supplying an output clock signal; a phase generator circuit receiving the output clock signal, and supplying phase signals; and a voltage booster circuit receiving a supply voltage supplied from outside to the nonvolatile memory and the aforesaid phase signals, and supplying a read voltage higher than the supply voltage. The clock generator circuit includes a comparator receiving the read voltage and a reference voltage, and supplying a selection signal indicating the outcome of the comparison between the read and reference voltages; and a multiplexer receiving a first input clock signal having a pre-set frequency, a second input clock signal having a frequency correlated to the transition frequency of the addresses supplied to the nonvolatile memory, and the selection signal, and supplying the aforesaid output clock signal.

Abstract: A method and network device are disclosed using a look-ahead watermark in a FIFO memory. In accordance with the present invention, a watermark interrupt is generated from a FIFO memory when data in the FIFO memory has crossed a watermark threshold. A data burst is transferred through a direct memory access unit to the FIFO memory. A look-ahead watermark flag is checked at the FIFO memory to determine if sufficient memory space exists inside the FIFO memory for an additional data burst, which is transferred through the direct memory access unit to the FIFO memory when the look-ahead watermark flag indicates that sufficient memory space is available.

Abstract: One embodiment of the invention is directed to a method of forming a metallization level of an integrated circuit including the steps of forming metal areas of a metallization level laterally separated by a first insulating layer, removing the first insulating layer, non-conformally depositing a second insulating layer so that gaps can form between neighboring metal areas, or to obtain a porous layer. The removal of the first insulating layer is performed through a mask, to leave in place guard areas of the first insulating layer around the portions of the metal areas intended for being contacted by a via crossing the second insulating layer.

Abstract: An electronic power device is integrated monolithically in a semiconductor substrate. The device has a first power region and a second region, each region comprising at least one P/N junction formed of a first semiconductor region with a first type of conductivity, which first semiconductor region extends through the substrate from the top surface of the device and is diffused into a second semiconductor region with the opposite conductivity from the first. The device also includes an interface structure between the two regions, of substantial thickness and limited planar size, comprising at least one trench filled with dielectric material.

Abstract: A circuit for controlling the storage of data in a memory element including a bistable device having a first input for receiving an address input and a second input for receiving a clock signal and circuitry for receiving the output of the bistable device and the clock signal and providing a write enable signal for the memory, the circuitry being arranged so that the write enable signal is enabled in response to a first transition in the clock signal from a first state to a second state and disabled in response to the clock signal making the next transition back to the first state, the first and next transitions being in the same clock cycle.

Abstract: A dynamic random access memory device includes a memory plane including at least one first matrix of memory cells, a read/write amplifier connected to the end of each column of the matrix, and at least one pair of input/output lines associated with the matrix. The dynamic random access memory device also includes at least one cache memory stage connected to each amplifier and is disposed in the immediate vicinity of this amplifier. The cache memory stage includes a static random access memory cell connected between the read/write amplifier and the pair of input/output lines.

Abstract: A method for controlling the position of an optical beam incident on a track of a rotationally mobile carrier of information, such as a disc, includes picking up a beam reflected by the disc using an optical pick-up and determining a positioning error of the beam with respect to the track. The pick-up may include several photodetectors each providing an elementary signal, and the positioning error may be determined from the elementary signals. More precisely, from the elementary signals two sampled secondary signals whose mutual time gap is representative of the positioning error of the beam with respect to the track may be formulated. Furthermore, successive current values of the mutual time gap may be determined at the sampling frequency by searching at the sampling frequency for a successive current maximum of the cross-correlation function between the two sampled secondary signals. The present invention may be particularly applicable to multifunction digital disc (e.g., DVD) readers, for example.