Patents Assigned to Sun Microsystems
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Patent number: 5635957Abstract: An apparatus for use with a computer having a display. The computer is programmed to provide an indicia on the display. The apparatus includes a control device adapted to be electrically connected to the computer and having an indicia control element for moving the indicia across the display. At least one foot pedal and at least one electrical connector for electrically connecting the at least one foot pedal to the control device are provided. The at least one foot pedal can be used to click on the indicia on the display. A method for operating the computer with the apparatus is provided.Type: GrantFiled: June 24, 1996Date of Patent: June 3, 1997Assignee: Sun Microsystems, Inc.Inventors: Gary F. Feierbach, Miriam Blatt
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Patent number: 5636130Abstract: A method is provided for accurately determining the propagation delay of a gate under consideration in a static timing analyzer. This is accomplished by determining both the output load and input rise time of the gate under consideration. These values are then compared with a load versus rise time grid having previously determined values of propagation delay (points) for specified combinations of load and input rise time. These points are then used to interpolate a value of propagation delay for the gate under consideration by an interpolation technique that accounts for at least one of the following non-linear effects: the feed forward capacitance of a gate, soft switching, gate resistance, source and drain resistance, and/or other non-linear effects. The method accounts for each non-linear effect by imparting a corresponding component to propagation delay only in that range of output load and input rise time for which that non-linear effect is most pronounced.Type: GrantFiled: July 5, 1995Date of Patent: June 3, 1997Assignee: Sun Microsystems, Inc.Inventors: Raoul B. Salem, Vernon R. Brethour, Wen-Jay Hsu, Raymond A. Heald, Subramanian Ganesan
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Patent number: 5634068Abstract: A multiprocessor computer system has a multiplicity of sub-systems and a main memory coupled to a system controller. An interconnect module, interconnects the main memory and sub-systems in accordance with interconnect control signals received from the system controller. All of the sub-systems include a port that transmits and receives data as data packets of a fixed size. At least two of the sub-systems are data processors, each having a respective cache memory and a respective set of master cache tags (Etags), including one cache tag for each data block stored by the cache memory. The system controller maintains a set of duplicate cache tags (Dtags) for each of the data processors. The data processors each include master cache logic for updating the master cache tags, while the system controller includes logic for updating the duplicate cache tags.Type: GrantFiled: March 31, 1995Date of Patent: May 27, 1997Assignee: Sun Microsystems, Inc.Inventors: Satyanarayana Nishtala, Zahir Ebrahim, William C. Van Loo, Kevin Normoyle, Leslie Kohn, Louis F. Coffin, III
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Patent number: 5633933Abstract: A first data processing device (node I) is coupled to a private network which is in turn coupled to the Internet. A second data processing device (node J) is coupled to the same, or to a different network, which is also coupled to the Internet, such that node I communicates to node J using the Internet protocol. Node I is provided with a secret value i, and a public value .alpha..sup.i mod p. Node J is provided with a secret value j, and a public value .alpha..sup.j mod p. Data packets (referred to as "datagrams") are encrypted using the teachings of the present invention to enhance network security. A source node I obtains a Diffie-Helman (DH) certificate for node J, (either from a local cache, from a directory service, or directly from node J), and obtains node J's public value .alpha..sup.j mod p from the DH certificate. Node I then computes the value of .alpha..sup.ij mod p, and derives a key K.sub.ij from the value .alpha..sup.ij mod p. A transient key K.sub.p is then generated at random, and K.sub.Type: GrantFiled: July 15, 1996Date of Patent: May 27, 1997Assignee: Sun Microsystems, Inc.Inventor: Ashar Aziz
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Patent number: 5633870Abstract: A method and network interface for controlling the flow of data between a and an ATM network is provided. The network interface resides on an ATM interface and includes a state machine for each channel supported by the ATM interface. The state machine moves from state to state based on the contents of a local buffer, indications that data for the channel is ready to be transferred from the host computer to the local buffer, and the status of operations that transfer data for the channel from the host computer to the local buffer. The ATM interface includes a DMA unit and a segmentation unit that operate responsive to the states of the various state machines to avoid inefficient transfer operations.Type: GrantFiled: July 7, 1995Date of Patent: May 27, 1997Assignee: Sun Microsystems, Inc.Inventors: Andre J. Gaytan, Rasoul M. Oskouy
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Patent number: 5634058Abstract: A dynamically configurable operating system is achieved by providing a module sub-system which intercepts requests by processes to access a module in the operating system and determines whether the module has been loaded in the kernel memory and linked the other modules located in the kernel memory and installed in the appropriate table. If the module has been into the kernel memory, and installed the module sub-system grants the requesting installed process access to the module and processing continues. If the module has not been loaded into the kernel memory, the module sub-system will retrieve a copy of the module stored and copy it into kernel memory. The module is then linked to the other modules located in the kernel and installed. Once the module is loaded and linked and installed, access is granted to the requesting process and normal processing continues.Type: GrantFiled: October 11, 1995Date of Patent: May 27, 1997Assignee: Sun Microsystems, Inc.Inventors: Tom Allen, Joseph E. Provino, William F. Pittore
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Patent number: 5634002Abstract: In a preferred embodiment, the present invention provides an improved method and system for testing a graphical user interface program. The preferred embodiment provides improved performance over prior methods because it decouples the testing of an program's engine component from the testing of its GUI component. The preferred method begins the testing process by invoking test functions that send data to the program's engine component. The data simulates user action on the graphical user interface of the program. In response to receiving the data, the engine component processes the simulated user action as if it had been sent from the graphical user interface component. The preferred method captures the results of this processing and uses the results to determine whether the engine component is performing properly.Type: GrantFiled: May 31, 1995Date of Patent: May 27, 1997Assignee: Sun Microsystems, Inc.Inventors: George A. Polk, Vladimir G. Ivanovic, Hans E. Muller, John S. Kern, Robert Jervis, Rance DeLong
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Patent number: 5633810Abstract: A novel video server is taught which allows for additional output bandwidth from the server by using multiple physical network interfaces over a single IP subnetwork. This approach is particularly well suited for use with video servers that store and deliver multimedia bit streams by allowing all clients to share the same subnetwork with the server. In this manner, the bandwidth from each of the physical network interface can be combined as needed and assigned as needed in service to any plurality of destinations in the network, allowing all bandwidth to be available for use with one or more clients.Type: GrantFiled: December 14, 1995Date of Patent: May 27, 1997Assignee: Sun Microsystems, Inc.Inventors: Kallol Mandal, Steven Kleiman
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Patent number: 5634098Abstract: An apparatus and method for testing software is disclosed. A test base is constructed on a storage device by creating a plurality of directories connected to form a hierarchical directory structure. Files associated with software programs to be tested are stored in directories within the hierarchical directory structure. Such files may include source code files, test input files and expected output files. Environment files and environment configuration files that specify values for environment variables are also stored in the test base. A test is run by invoking a test engine and passing to the test engine the name of an environment file and the name of a test. The test engine modifies the values of environment variables based on the specified environment file prior to executing the specified test. After modifying the environment based on the specified environment file and prior to executing the test, the test engine further modifies the environment based on any applicable environment configuration files.Type: GrantFiled: February 1, 1995Date of Patent: May 27, 1997Assignee: Sun Microsystems, Inc.Inventors: Micheal E. Janniro, Robert B. Jervis, Donald G. Miller, Jr.
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Patent number: 5630087Abstract: A method and apparatus to share virtual memory translations in a computer is described. The apparatus includes an operating system that runs in conjunction with a central processing unit. The operating system is programmed to include an address identification routine to identify distinct virtual memory translation entries, associated with a plurality of distinct processes running on the computer, that map to one or more common physical memory page addresses. The operating system also includes a mask assignment routine to assign a first mask value to the distinct virtual memory translation entries, and a write routine to write, to a translation-lookaside buffer or a page table, the distinct virtual memory translation entries as a single address associated with the first mask value. A comparison mechanism is used to compare a second mask value of a translation-request virtual memory translation value to the first mask value to determine whether the second mask value corresponds to said first mask value.Type: GrantFiled: November 2, 1994Date of Patent: May 13, 1997Assignee: Sun Microsystems, Inc.Inventors: Madhusudhan Talluri, Yousef A. Khalidi
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Patent number: 5629240Abstract: Switching noise at integrated circuit V.sub.DD and V.sub.SS metal traces is reduced by minimizing lead inductance in on-chip bypass capacitors. For each on-chip bypass capacitor, a pair of V.sub.DD -carrying and V.sub.SS -carrying metal traces is formed, these traces having regions spaced-apart laterally a distance .DELTA.X corresponding to lateral separation of the bypass capacitor connecting pads. For each bypass capacitor, column-shaped openings, spaced-apart distance .DELTA.X, are formed through the passivation and inter-metal oxide layers, as needed. These openings expose and access regions of the pair of spaced-apart metal traces carrying V.sub.SS and V.sub.DD. These openings, which may be formed after the IC has been fabricated, preferably are formed using focussed ion beam technology ("FIB"). Alternatively, these openings may be formed using masking and etching steps. The column-shaped openings are then made into conductive columnar elements, preferably using FIB deposition of tungsten or platinum.Type: GrantFiled: June 5, 1995Date of Patent: May 13, 1997Assignee: Sun Microsystems, Inc.Inventors: Deviprasad Malladi, Shahid S. Ansari, Eric Bogatin
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Patent number: 5629984Abstract: A system and method for substantially reducing accidental disclosure of confidential information by interleaving video data frames with video flash frames. These video flash frames preclude an unauthorized person not wearing an appropriate shutter device from intelligibly reading video data frames by influencing the unauthorized person's eye prior to transmission of the video data frame.Type: GrantFiled: March 10, 1995Date of Patent: May 13, 1997Assignee: Sun Microsystems, Inc.Inventor: Charles E. McManis
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Patent number: 5630042Abstract: In a window and notification based computer system, a browser class, a browser item layout class, a browser item data cell layout class and a browser item class are provided to the window object class hierarchy for applications to provide collection browsers on a display. An application provides a collection browser by creating a browser item layout object, zero or more browser item data cell layout objects, a browser object, and zero or more browser item objects as class instances of the four enumerated classes, and providing procedures for servicing events generated by a user interacting with the objects presented in the collection browser using a cursor control device and/or a keyboard. As a result applications may provide collection browsers in a more efficient and consistent manner.Type: GrantFiled: June 6, 1995Date of Patent: May 13, 1997Assignee: Sun Microsystems, Inc.Inventors: Heather A. McIntosh, Eswar Priyadarshan, Alan Ruberg, Timothy Shea
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Patent number: 5630066Abstract: A class loader downloads objects and object viewers from remote computer nodes, and invokes locally stored object viewers to view objects. When a user selects an object to view, a conventional downloading of the referenced object is initiated. The class loader, however, utilizes data type information received at the beginning of the object downloading process to determine if a viewer for the referenced object is available on the user's workstation. If an appropriate view is not locally available, the class loader automatically locates an appropriate viewer on the server from which the object is being downloaded, or from any other appropriate server known to the user's workstation. The class loader downloads the located viewer and then invokes a program verification procedure to verify the integrity of the downloaded viewer before the viewer is executed.Type: GrantFiled: December 20, 1994Date of Patent: May 13, 1997Assignee: Sun Microsystems, Inc.Inventor: James A. Gosling
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Patent number: 5629613Abstract: In accordance with the teachings of this invention, a novel voltage regulator is taught which is capable of being formed solely of MOS devices. This eliminates the need to utilize off chip components to form a stand-alone voltage regulator, and avoid the process complexities and increased cost associated with BICMOS fabrication processes.Type: GrantFiled: October 4, 1994Date of Patent: May 13, 1997Assignee: Sun Microsystems, Inc.Inventors: Philip R. Marzolf, Alan C. Rogers
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Patent number: 5630136Abstract: An improved technique for serializing access to multithreading unsafe resources is described. A baton manager is used to manage the serializing of accesses to a multithreading unsafe resource. For a thread to access the multithreading unsafe resource, the thread must first obtain a baton from the baton manager. Then, once the thread has finished accessing the multithreading unsafe resource, the thread releases the baton to the baton manager. Hence, by using the baton manager to manage the baton, accesses to multithreading unsafe resources are serialized while program crashes or deadlocks are minimized. The multithreading unsafe resource will typically have a plurality of baton objects associated therewith. The baton objects are objects of object-oriented programming. The baton manager will permit at most one of the baton objects for a given multithreading unsafe resource to own the baton at a time.Type: GrantFiled: June 9, 1995Date of Patent: May 13, 1997Assignee: Sun Microsystems, Inc.Inventors: Andrew E. Davidson, Maurice Balick, Alan Snyder
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Patent number: 5627966Abstract: A method for simulating multiple instruction launch in a single-scalar computer system is disclosed. A video data signal having a plurality of data components arranged contiguously is reformatted by inserting overflow buffers between the data components such that they are no longer contiguous. The reformatted video data signal may then be operated on by a single instruction because there will be no propagation of a carryover value between contiguous data components. Upon completion of the instruction, the overflow buffers are checked to determine if overflow has occurred. If there has been overflow, overflow compensation is performed. After overflow compensation, or if there was none, the result of the instruction may be placed in an appropriate format for use in a display device.Type: GrantFiled: April 12, 1995Date of Patent: May 6, 1997Assignee: Sun Microsystems, Inc.Inventor: James G. Hanko
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Patent number: 5625625Abstract: The asynchronous transfer mode (ATM) interface, which may be a segmentation and reassembly unit, controls segmentation of packets into cells and reassembly of cells into packets for interconnecting a computer system to an ATM system. An architecture is disclosed which partitions load and unload functions within the ATM interface. The load and unload functions are separately partitioned for segmentation and for reassembly. For segmentation, a transmit load engine controls storage of data from packets into an external buffer memory; whereas transmit unload engine handles extracting data from the memory, segmenting the data into cells, and transmitting the cells to the ATM system. For reassembly, a receive load engine handles receiving and storing the cells corresponding to the packets into a memory; whereas a receive unload engine controls extraction of the data from the memory and transmission of the packets to the computer system.Type: GrantFiled: July 7, 1995Date of Patent: April 29, 1997Assignee: Sun Microsystems, Inc.Inventors: Rasoul M. Oskouy, Denny E. Gentry
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Patent number: 5622880Abstract: Low threshold voltage MOS devices having buried electrodes are disclosed herein. Such devices have source and drain regions which include tip regions and plug regions. The buried electrodes have bottom boundaries located above the bottoms of the plug regions. The buried electrode has the same conductivity type as the device's bulk (albeit at a higher dopant concentration) and, of course, the opposite conductivity type as the device's source and drain. The exact dopant concentrations and locations of the buried electrodes should be provided such that punch through is avoided in MOS devices.Type: GrantFiled: March 31, 1995Date of Patent: April 22, 1997Assignee: Sun Microsystems, Inc.Inventors: James B. Burr, Michael P. Brassington
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Patent number: D379351Type: GrantFiled: January 26, 1996Date of Patent: May 20, 1997Assignee: Sun Microsystems, Inc.Inventors: Alison Armstrong, Paul Montgomery, Herbert Pfeifer