Patents Assigned to Sun Microsystems
  • Patent number: 5481715
    Abstract: An apparatus and a method are disclosed whereby a client application can use a trusted "Deputy" application to execute operation calls on several servers on behalf of the client, the Deputy application being able to convince the servers that the deputy application is representing the original client application, and the client thereby reducing the risk of being contaminated by uncontrolled access to an unknown server, while at the same time being able to obtain the desired processing results regardless of the number or location of servers involved in providing the results. The Deputy application is authenticated by the server as representing a user, not a user on a predetermined workstation or as a predetermined member of a particular work group.
    Type: Grant
    Filed: December 15, 1993
    Date of Patent: January 2, 1996
    Assignee: Sun Microsystems, Inc.
    Inventors: Graham Hamilton, Robert B. Hagmann
  • Patent number: 5481431
    Abstract: The disclosed invention relates to a computer system, including a crib device and chassis and including a U-shaped actuator and handle with distinct cam surfaces for installing and removing a hard drive to and from the chassis of the system. The drive is securable to the crib device, which has a handle that allows the drive to be carried to and away from the chassis. The crib device and chassis have cams and cam engaging surfaces that cause the crib device and drive to move to effect engagement and disengagement of the electrical connectors of the computer system and drive.
    Type: Grant
    Filed: January 28, 1994
    Date of Patent: January 2, 1996
    Assignee: Sun Microsystems, Inc.
    Inventors: Hassan Siahpolo, Robert S. Antonuccio, James M. Carney, Daniel F. Hoornaert, Joseph M. Spano
  • Patent number: 5481722
    Abstract: A source module and its changes in a parent and a child development environment of an hierarchy of development environments are created as a first and a second delta structure in their respective environments. Various procedures and working tables/files are provided to merge the second delta structure into the first delta structure whenever the latest revision of the source module in the parent environment is reconciled to the latest edition of the source module in the child environment, and to merge the first delta structure into the second delta structure whenever the latest edition of the source module in the child environment is resynchronized to the latest revision of the source module in the parent environment. As a result, as the process is repeated by other parent and child environments of the hierarchy, change deltas are created and propagated among the environments without any loss in change history.
    Type: Grant
    Filed: November 14, 1994
    Date of Patent: January 2, 1996
    Assignee: Sun Microsystems, Inc.
    Inventor: Glenn Skinner
  • Patent number: 5479627
    Abstract: A method and apparatus for translating a virtual address to a physical address. A virtual address to be translated has a virtual page offset and a virtual page number. The virtual address to be translated addresses a page of memory. The size of this page is unknown. There are L different possible page sizes where L is a positive integer greater than one. Each of the L different page sizes is selected to be a test page size and a test is performed. During the test, a pointer into a translation storage buffer is calculated. The pointer is calculated from the virtual address to be translated by assuming that the virtual address to be translated corresponds to a mapping of the test page size. The pointer points to a candidate translation table entry of the translation storage buffer. The candidate translation table entry has a candidate tag and candidate data.
    Type: Grant
    Filed: September 8, 1993
    Date of Patent: December 26, 1995
    Assignee: Sun Microsystems, Inc.
    Inventors: Yousef A. Khalidi, Glen R. Anderson, Stephen A. Chessin, Shing I. Kong, Charles E. Narad, Madhusudhan Talluri
  • Patent number: 5475840
    Abstract: A method is disclosed for a method to dynamically link a new program image and related library programs into an executable application program image. The method provides for producing a linked list of the required programs by giving the linker an argument representing the designated program image and a naming context which contains data on the associated library programs which are to be linked together. The linker finds all of the required programs, and links them together. The parent maps the program images into the designated addresses thereby completing the linking of the executable application program. In finding the required programs, the linker first checks the image cache to see if the new program and its related library programs is already linked and cached because it was executed before.
    Type: Grant
    Filed: April 13, 1993
    Date of Patent: December 12, 1995
    Assignee: Sun Microsystems, Inc.
    Inventors: Michael N. Nelson, Graham Hamilton
  • Patent number: 5471421
    Abstract: A storage cell includes a first bit line, a storage circuit, and a pass transistor. The storage circuit has a first storage node for holding a logic state indicative of a logic value. The pass transistor is coupled to the first bit line and the first storage node for establishing a conduction path therebetween. The pass transistor receives a bias voltage to switch the pass transistor into a substantially nonconducting state when the storage cell is not being accessed. The reverse bias on the first transistor substantially reduces the leakage current through the pass transistor.
    Type: Grant
    Filed: December 16, 1994
    Date of Patent: November 28, 1995
    Assignee: Sun Microsystems, Inc.
    Inventors: James W. Rose, Godfrey P. D'Souza, Jonathan J. Stinehelfer, James F. Testa
  • Patent number: 5465229
    Abstract: A full width single in-line memory module (SIMM) for dynamic random access memory (DRAM) memory expansions is disclosed. A printed circuit board having a multiplicity of DRAM memory elements mounted thereto is arranged in a data path having a width of 144 bits. The SIMM of the present invention further includes on-board drivers to buffer and drive signals in close proximity to the memory elements. In addition, electrically conductive traces are routed on the circuit board in such a manner to reduce loading and trace capacitance to minimize signal skew to the distributed memory elements. The SIMM further includes a high pin density dual readout connector structure receiving electrical traces from both sides of the circuit board for enhanced functionality. The SIMM is installed in complementary sockets one SIMM, at a time to provide memory expansion in full width increments.
    Type: Grant
    Filed: November 28, 1994
    Date of Patent: November 7, 1995
    Assignee: Sun Microsystems, Inc.
    Inventors: Andreas Bechtolsheim, Edward Frank, James Testa, Shawn Storm
  • Patent number: 5465337
    Abstract: A memory management unit for translating a virtual address into a corresponding physical address including a translation lookaside buffer and a comparator. The translation lookaside buffer includes a plurality of entries, each of the entries having a first number of bits to indicate a virtual page number, a second number of bits to indicate an offset into the page, a third number of bits to indicate either a portion of a page number or a portion of an offset value, a fourth number of bits to indicate a page size, and a fifth number of bits for storing a physical address of a page of memory. The comparator compares a number of bits equal to the virtual page size of a virtual address presented to the translation lookaside buffer with the virtual addresses stored in entries of the translation lookaside buffer. If the result of the comparison produces a match/hit, the physical address is concatenated with the bits of the second and third number of bits using the stored page size to provide a physical address.
    Type: Grant
    Filed: October 5, 1994
    Date of Patent: November 7, 1995
    Assignee: Sun Microsystems, Inc.
    Inventor: Shing I. Kong
  • Patent number: 5461766
    Abstract: A method for minimizing thermal overhead in an integrated circuit package is described. A heat sink having a base is integrally formed into the package. The base is connected to the die, and a portion of the heat sink projects from the package, forming a post. A heat transfer assembly having a shaft with an aperture is heated until the aperture expands sufficiently to allow the heat transfer assembly to be fitted on the post with a minimum of force. Upon cooling, a tight joint is formed between the heat sink and the heat transfer assembly.
    Type: Grant
    Filed: January 26, 1994
    Date of Patent: October 31, 1995
    Assignee: Sun Microsystems, Inc.
    Inventor: Trevor Burward-Hoy
  • Patent number: 5452362
    Abstract: An acoustic duct using active noise cancellation to reduce the acoustic signature of a computer system is disclosed. The acoustic duct is coupled to a vent of a thermal box that encloses the components (the heat source) and the fan cooling system (the noise source) of the computer system. The acoustic duct is constructed as an acoustic waveguide such that the flow of air through the thermal box is not impeded. An anti-noise circuit that generates an anti-noise signal is positioned near the vent such that the anti-noise signal and the noise signal generated by the noise source propagate through and out of the acoustic duct in the same mode.
    Type: Grant
    Filed: January 26, 1994
    Date of Patent: September 19, 1995
    Assignee: Sun Microsystems, Inc.
    Inventor: Trevor Burward-Hoy
  • Patent number: 5452447
    Abstract: A method and apparatus are described for a caching file server ("CFS") system which permits end user client programs on a local node of a distributed computer system, to issue requests to read/write data to a remote file and to query/set attributes of the remote file, and to have these requests serviced by the CFS in a way which minimizes the caching resources used as well as minimizes the related network communications. The CFS establishes CFS file programs to interface with the client programs, and sets up a common CFS cache for the file attributes, which cache is kept current via a communications link to a file program in a file server at the remote node containing the file, wherein the file program automatically updates the common CFS cache whenever any attributes change. The CFS also caches the results of bind operations in order to further minimize network calls and redundant cache usage.
    Type: Grant
    Filed: December 21, 1992
    Date of Patent: September 19, 1995
    Assignee: Sun Microsystems, Inc.
    Inventors: Michael N. Nelson, Yousef A. Khalidi
  • Patent number: 5450616
    Abstract: A method and apparatus for implementing a protocol for controlling transmitter power in a wireless LAN. The LAN is assumed to include a number of nodes, each node including a transmitter and a receiver for communicating information between computers located at the node. To initiate the protocol, the transmitter of a data sending node first transmits a signal including a transmitter power signal to each of the receivers of the data receiving noes. The information contained in the transmitter power signal may be transmitted in one of the fields of the data packet of the signal. The receivers of the data receiving nodes individually transmit power control feedback signals back to the transmitter of the data sending node. Information in each of the power control feedback signals may occupy a field in the data packet transmitted from the receiver to the transmitter of the data sending node.
    Type: Grant
    Filed: October 6, 1993
    Date of Patent: September 12, 1995
    Assignee: Sun Microsystems, Inc.
    Inventor: Raphael Rom
  • Patent number: 5446902
    Abstract: An object oriented application comprising an hierarchy of application classes, each having a plurality of class methods, is created from a toolkit having a static class hierarchy including a number of standard classes, a number of public interface methods with interfacing attributes and a list for chaining class private methods to the public interface methods, a plurality of class definition source and header files defining the extended application classes, a plurality of class method source and header files implementing the class methods of the extended classes, and a plurality of object user source and header files implementing the object users, using a traditional programming language that provides no support for object oriented programming. Together, the various files cooperate to achieve data abstraction and inheritance of object oriented programming, when the various files are compiled, linked, executed.
    Type: Grant
    Filed: July 14, 1993
    Date of Patent: August 29, 1995
    Assignee: Sun Microsystems, Inc.
    Inventor: Nayeem Islam
  • Patent number: 5446834
    Abstract: A method and apparatus for accurate head-tracked stereo display on a workstation CRT is disclosed that corrects inaccuracies caused by CRT optical properties. The correction includes modification of a viewing matrix equation to adjust the physical coordinates of a display window. An alternative correction models the CRT surface as multiple flat "patches" positioned and titled to approximate the spherical or cylindrical shape of the actual screen, and each patch is rendered separately with a patch-specific viewing matrix. Another alternative correction uses angle of view information obtained directly with eye tracking, or indirectly through a "hot spot" determination to bias correction at the point of viewing.
    Type: Grant
    Filed: December 6, 1994
    Date of Patent: August 29, 1995
    Assignee: Sun Microsystems, Inc.
    Inventor: Michael Deering
  • Patent number: 5446686
    Abstract: A circuit for detecting multiple address matches in an associative array includes a match current generator that responds to active match signals generated by the associative array by generating a match current that is linearly proportional to the number of active match signals generated by the array. A reference current source generates a reference current that is between one and two times greater than the match current when a single active match signal is generated by the associative array. A comparator compares the match current and the reference current and generates an active output signal when the match current is greater than the reference current.
    Type: Grant
    Filed: August 2, 1994
    Date of Patent: August 29, 1995
    Assignee: Sun Microsystems, Inc.
    Inventors: Robert J. Bosnyak, Mark R. Santoro
  • Patent number: 5446854
    Abstract: A method and apparatus for providing address translations for a computer system having a virtual memory that is mapped onto physical memory. The apparatus has at least one page frame descriptor (PFD) for describing a contiguous portion of physical memory, at least one translation block (TB) for describing a contiguous portion of virtual memory and a hash list. Each PFD has a base physical address (PA), a PA range beginning at the base PA and a translation entry pointer. Each TB has a base virtual address (VA), a VA range beginning at the base VA, and a page size used to map the VA range of the TB. Each TB also has a header and at least one translation entry. Each header has a TB pointer and each translation entry has a backward pointer. Each translation entry of the TB corresponds to a different equalsized translation range of the VA range of the TB.
    Type: Grant
    Filed: October 20, 1993
    Date of Patent: August 29, 1995
    Assignee: Sun Microsystems, Inc.
    Inventors: Yousef A. Khalidi, Madhusudhan Talluri, Dock G. Williams, Vikram P. Joshi
  • Patent number: 5444296
    Abstract: A package and packaging technique for enhancing performance of critical chips within an electronic device, wherein the critical chips comprise an integrated circuit. The package includes a main package incorporating a first integrated circuit coupled to a substrate board. At least one package having a second integrated circuit is mounted to the main package in order to reduce (i) propagation delay for data to transfer between critical chips within the main package and one of the plurality of packages or between the critical chips within the plurality of packages and (ii) total footprint area. The method for implementing such a package including the steps of packaging the first and second integrated circuits and electrically coupling these integrating circuits together in a mounted position.
    Type: Grant
    Filed: November 22, 1993
    Date of Patent: August 22, 1995
    Assignee: Sun Microsystems, Inc.
    Inventors: Sunil Kaul, Douglas A. Laird
  • Patent number: 5441102
    Abstract: A heat transfer apparatus is disclosed. The heat transfer apparatus includes a heat pipe containing heat transfer liquid. Disposed in the heat pipe is a centrifugal rotor assembly having fixed magnets on the rotor blades. A magnetic field is generated by a magnetic coil assembly that surrounds the heat pipe. The rotor assembly rotates in response to the magnetic field, agitating the heat transfer liquid. A second embodiment is a liquid heat transfer system that includes a heat absorption chamber, a pump, and a heat exchanger where circulation and cooling of the heat transfer liquid occurs outside of the heat absorption chamber.
    Type: Grant
    Filed: January 26, 1994
    Date of Patent: August 15, 1995
    Assignee: Sun Microsystems, Inc.
    Inventor: Trevor Burward-Hoy
  • Patent number: D361755
    Type: Grant
    Filed: October 27, 1992
    Date of Patent: August 29, 1995
    Assignee: Sun Microsystems, Inc.
    Inventors: Edward H. Frank, Michael R. Sheridan, Steve Peart
  • Patent number: D362236
    Type: Grant
    Filed: March 3, 1994
    Date of Patent: September 12, 1995
    Assignee: Sun Microsystems, Inc.
    Inventors: Michael S. Dann, Philip G. Yurkonis, Craig M. Leverault, Paul S. Montgomery, Herbert H. F. Pfeifer, Richard W. Seymour, David H. Powell