Abstract: Edge maps (40) derived from images are used to compute edge spectra (44), an edge spectrum having a plurality of components (41, 43) corresponding to the angular bins (60) of edge vectors having equal angular widths. Various feature detectors (56) process the edge spectrum to yield information identifying the image. A linear detector correlates a shifted prototype edge spectrum (45) to an input spectrum (44). Nonlinear detectors analyze edge spectra to detect mutually orthogonal edges and edge reversal features (90). Higher level logic (30) is used to select certain detected edge reversal features (90) as the ends of an object (16) depicted in the image.

Abstract: A text-to-speech synthesis system receives digital code representative of characters from a local or remote source, and converts those character codes into speech. A set of allophone rules is contained in a memory and each incoming character set is matched with the proper character set to describe the sound of that particular character set. A microcontroller is dedicated to the comparison procedure which provides allophonic code when a match is made. The allophonic code is provided to a speech producing system which has a system microcontroller for controlling the retrieval, from a read-only memory, of digital signals representative of the individual allophone parameters. The addresses at which such allophone parameters are located are directly related to the allophonic code. A dedicated microcontroller concatenates the digital signals representative of the allophone parameters, including code indicating stress and intonation patterns for the allophones.

Abstract: Static random access memory having an edge-triggered power up architecture. Each element of the signal path is powered up only during the period when it is expected to be active. Separate delays are provided to tailor the delay of the power-up pulses for each separate circuit component, and separate 1-shot pulse generators, with the pulse width tailored to the power-up duration required by each circuit element, are provided for each circuit element.

Abstract: Methods of doping Hg.sub.1-x Cd.sub.x Te (50) with fast diffusing dopants by immersion in a mercury reservoir (32) doped with the desired dopants are disclosed. Also, methods of core annihilation of Hg.sub.1-x Cd.sub.x Te slices or ingots by immersion in a heated mercury reservoir are disclosed. Preferred embodiments include dopants such as copper in a mercury reservoir (32) that is heated to 270.degree. C. for a Hg.sub.1-x Cd.sub.x Te slice, and a reservoir (32) that is heated to 150.degree. C. for a thin film of Hg.sub.1-x Cd.sub.xn Te on a CdTe substrate.

Abstract: An edgeboard connector having a large number of contacts accommodated in a housing cavity is adapted to mount one or more printed circuit boards having lesser numbers of contacts pads and to assure that the contact pads on the boards are electrically engaged with predetermined ones of the connector contacts by attaching one or more detachable members to the housing within the cavity to engage lateral edges of the printed circuit boards as they are inserted into the connector cavity to position the boards in the cavity.

Abstract: A transportable hydraulic seismic transducer has a seismic energy source connected to a pad for imparting elastic waves to the underlying ground. The energy source has a reaction mass with a single diameter cylinder formed therein, a double ended piston reciprocally mounted in the cylinder with a piston rod extending from opposite ends of the piston and a pair of bushings fitted within the cylinder at opposite ends to provide bearing surfaces for the opposite ends of the piston rod. A piston may be ringed and a liner fitted into place within the cylinder with the rings forming a seal with the liner. The piston may also be ringless and a liner made of a bushing material fitted within the cylinder so that between the piston and the liner, an adequate seal is provided. The use of the single diameter cylinder or bore permits the total machining of inserted parts such as the bushings and liners to be done before inserting in the reaction mass bore.

Abstract: A dRAM cell and array of cells, together with a method of fabrication, are disclosed wherein the cell includes one field effect transistor and one storage capacitor with both the transistor and the capacitor formed in a trench in a substrate. The transistor source, channel, and drain and one capacitor plate are formed in a layer of material inserted into the trench and insulated from the substrate; the gate and other capacitor plate are formed in the substrate trench sidewall. In preferred embodiments bit lines on the substrate surface connect to the inserted layer, and word lines on the substrate surface are formed as diffusions in the substrate which also form the gate. The trenches and cells are formed in the crossings of bit lines and word lines; the bit lines and the word lines form perpendicular sets of parallel lines.

Abstract: A semiconductor memory is comprised of four arrays (10), (12), (14) and (16) that have the memory elements therein arranged in accordance with pixel positions on a display. The memory arrays have associated shift registers (34), (36), (38) and (40) which have data loaded in parallel and output in a serial format to the display. Each of the shift registers can be connected in a circulating fashion or a shift register of adjacent arrays can be cascaded. Switches (56), (58), (60) and (62) are provided for configuring the shift registers for either circulation or cascading of data. In the circulating mode, the input and output of the shift registers is multiplexed on one pin whereas in the cascaded configuration, one array receives a dedicated serial input and the other array in the cascaded pair outputs the serial output on a dedicated pin.

Abstract: Deposition in an RIE type plasma reactor of interlevel oxide at high power and low pressure yielding a topography similar to reflowed PSG is disclosed. Deposition rates and film purity are limited by purity and the rate of flow of reactant gases through the plasma reactor and not by the thermal conductivity and expansion properties of quartz as in bias sputtering.

Abstract: A radar transmitter includes a ripple and droop reduction circuit to reduce the ripple and droop of the beam (power) supply. A beam supply filter capacitor is connected to the source of power and an operational amplifier has its balanced input ac connected across the beam supply capacitor. A transistorized amplifier stage inverts the signal from the operational amplifier and amplifies its absolute value up to the same level appearing across the beam supply filter capacitor. A transistorized follower stage is connected to the transistorized amplifier stage for receiving the inverted signal and producing a low impedance output for insertion in series with the beam supply filter capacitor for ripple and droop cancellation. A traveling-wave-tube is connected to the supply power capacitor which receives the ripple and droop free capacitor output and produces substantially consistent pulses for transmission.

Abstract: A high speed processor has its speed enhanced through the use of an asynchronous operation and its arithmetic logic unit and memory circuits. The minimum possible delay time is implemented through the providing a completion pulse upon the completion of each operation and initiating a subsequent operation at the receipt of the completion pulse.

Abstract: Circumnavigation using an increased test cell domain may be used to collect data from discontinuous characters stored in a bit map such as those printed by a dot matrix printer. The test cell domain is increased to locate a pixel and consider it a portion of the same character if it is within the minimum permissable pixel gap range. The sequence of testing must be designed to read each possible pixel and not enter an endless loop during the circumnavigation. One sequence of testing is to begin testing those cells in the column adjacent to the reference cell beginning of the cell in the row adjacent to the reference cell and testing cells adjacent to the most recently tested cell along the entire column until the desired number of cells in that column according to the minimum permissable pixel gap range have been tested. Each column adjacent to the most recently tested is tested in the described sequence until the desired number of columns have been tested to permit the minimum permissable gap spacing.

Abstract: A control system for controlling an industrial process includes a network of a plurality of distributed programmable controllers or nodes coupled serially to a communications bus on either a single or dual media by means of a shielded twisted wire pair cable. The programmable controllers are coupled to the bus through a communications module which uses a broadcast method to achieve peer-to-peer communications. One module of the network, designated as an active monitor, exercises exclusive supervisory control of the broadcast activity on the network. The active monitor polls each node coupled to the network and each active node responds by broadcasting unacknowledged data to all nodes in the network. The broadcast message of each node in the network is mapped directly into designated variable memory locations of each programmable controller on the network.

Abstract: The projection display of the present invention employs a light source, a spatial light modulator such as a deformable mirror device having a plurality of individually electrically deformable mirror cells and Schlierin optics to project light from deformed mirror cells onto a viewing screen. An optical system forms light from the light source into a substantially collinear beam. A Schlierin optical device composed of alternating reflecting and transmitting portions is disposed at an angle to this beam. Light reflected or transmitted by the Schlierin optical device is focused by additional optics to a point near the deformable mirror device. Light reflected from undeformed mirror cells passes through the Schlierin optical device back to the light source. Deformed mirror cells reflect light at least in part to differing portions of the Schlierin optical device to follow a different path to a viewing screen.

Abstract: The disclosure relates to a method for realizing a fully functional buried level of interconnect using only a single level of a silicide over N+ polycrystalline silicon, the latter serving as the gate material for both the N channel and P channel devices formed.

Abstract: The specification discloses a charge transfer imaging device (10) having a charge removal gate (26). Pulses (30) of sufficient amplitude and frequency are applied to gate (26) in order to remove charge from device (10) by electron-hole recombination through interface traps of electrons and holes. Pulses of one amplitude reduce blooming of the device when used as an imager, while pulses of a second amplitude may be used to produce imager aperture control and gamma correction. Further, the charge removal technique may be used to control charge injection device (96) operation.

Abstract: A semiconductor device such as a dynamic read/write memory or the like is made by a twin-well CMOS process that employs a minimum number of photomasks. Field oxide isolation areas are formed in nitride-framed recesses so a relatively plane surface is provided, and a minimum of encroachment occurs. Both P-channel and N-channel transistors are constructed with silicided, ion-implanted, source/drain regions, self-aligned to the gates, employing an implant after sidewall oxide is in place, providing lightly-doped drains. The threshold voltages of the P-channel and N-channel transistors are established by the tank implants rather than by separate ion-implant steps for threshold adjust.

Abstract: A data processing system has an arithmetic logic unit that includes a plurality of summation units for summing an ADDEND with a AUGEND to obtain a first signal that represents the summation of the ADDEND, AUGEND and a CARRY IN. Each summation units also provides a second signal that represents the carry of the summation of the ADDEND and the AUGEND. The plurality of summation units are arranged in a second plurality of groups of less than a third preselected number of summation units with over to the carry in such that each member group has a carry a serial connection of the carry in for receipt of a carry out from a preceding group's carry out. Interdisposed between the groups is a fourth plurality of carry boost units for boosting the second signal of a preceding group prior to application to a following group.Each summation unit includes a carry advance node which is driven to a predetermined voltage when the ADDEND and AUGEND do not indicate a carry propagate condition.

Abstract: A microwave oscillator provides two outputs, of opposite phase, which are directly connected to provide the local oscillator inputs to a balanced mixer. Since no balun is used, very wide-band performance can be obtained.

Abstract: A local interconnect system for VLSI integrated circuits. During self-aligned silicidation of exposed moat and gate regions in a nitrogen atmosphere, a conductive titanium nitride layer is formed overall. A second titanium layer is then deposited overall and again reacted, to thicken the nitride layer without increasing the thickness of the silicide layers. This conductive layer is patterned and etched to provide local interconnects with a sheet resistance of the order to ten ohms per square, and also etch stops. Moreover, this local interconnect level permits contacts to be misaligned with the moat boundary, since the titanium nitride local interconnect layer can be overlapped from the moat up on to the field oxide to provide a bottom contact and diffusion barrier for a contact hole which is subsequently etched through the interlevel oxide. This local interconnect capability fulfills all of the functions which a buried contact capability fulfill, and fulfills other functions as well.