Patents Assigned to Texas Instruments
  • Patent number: 4661930
    Abstract: A register of the type used on as address counter in a dynamic RAM is tested by a method which does not require cycling through every possible value of the register contents. The counter is first loaded with a fixed value, all 1's or all 0's, and the contents checked by an AND or OR gate, producing a one-bit output which is monitored off-chip. Then, the carry feedback path to the counter register is altered, as by inverting all but the LSB, and the contents again checked, using the one-bit output via the AND or OR. In this manner, the operation of the counter is tested in three cycles.
    Type: Grant
    Filed: August 2, 1984
    Date of Patent: April 28, 1987
    Assignee: Texas Instruments Incorporated
    Inventor: Bao G. Tran
  • Patent number: 4661915
    Abstract: An allophone vocoder which utilizes the inherent redundancy of the spoken language together with the automatic human filtering of speech so as to obtain a speech compression and recognition system. An analog speech signal is broken up into its phoneme components and encoded for transmission. The encoded phoneme sequence has a much higher compression rate than the analog speech signal. The phonemes are then either transmitted, stored, or used to generate directly an analogous allophone sequence so as to approximate the original speech signal. Due to the inherent redundancy of the spoken language, and the filtering effect of the human ear, variations or errors in the approximations of the phonemes received from the original speech signal are inconsequential to the comprehension ability of the final allophone synthesized speech.
    Type: Grant
    Filed: August 3, 1981
    Date of Patent: April 28, 1987
    Assignee: Texas Instruments Incorporated
    Inventor: Granville E. Ott
  • Patent number: 4661374
    Abstract: Metal-gate transistors with metal silicide cladding of the source/drain regions, as may be used in very high density dynamic RAM devices, are made by a process in which the metal gate is encapsulated in oxide and the cladding is self aligned with the encapsulated gate. A thin coating of a refractory metal is applied to the source/drain areas and heated to react with the exposed silicon. The unreacted metal is removed by an etchant that does not disturb the metal gate or the silicide.
    Type: Grant
    Filed: August 7, 1984
    Date of Patent: April 28, 1987
    Assignee: Texas Instruments Incorporated
    Inventor: Robert R. Doering
  • Patent number: 4660278
    Abstract: Using a structure according to one embodiment of the present invention, active elements in integrated circuitry may be completely isolated from other elements in the integrated circuitry by silicon dioxide regions surrounding the sides of the region containing the active element and a buried diffusion beneath the active element extending to all sides of the isolating silicon dioxide regions.In one embodiment of the present invention, an isolation structure is fabricated by etching a silicon substrate to remove the silicon from the entire region occupied by the isolated active area and the isolation structure of this embodiment of the invention. A conformal layer of silicon dioxide, or other dielectric material, is then deposited on the surface of the silicon substrate. The conformal silicon dioxide layer is then anisotropically etched to remove the silicon dioxide on the bottom of the isolation region but still provide a sidewall region of silicon dioxide on the sides of the isolation region.
    Type: Grant
    Filed: June 26, 1985
    Date of Patent: April 28, 1987
    Assignee: Texas Instruments Incorporated
    Inventor: Clarence W. Teng
  • Patent number: 4661196
    Abstract: A substrate that is a portion of an electrode of a plasma reactor has two positions, a low position and a process position. They are achieved without generating particulate contaminate and are achieved additionally while the reaction chamber is maintained at its process pressure.Stainless steel bellows assemblies have an inter volume that are capped at both ends from a chamber between the bellows. One end of the bellows assembly is mounted to the process chamber in a fixed position and a substrate to the other end is attached and is movable. A positioning is achieved by introducing compressed air in the chamber between the bellows and overcoming the process pressure in the outer chamber. A second position is achieved by releasing the compressed air between the chamber between the bellows and allowing the process pressure in the process chamber to collapse the bellows assembly.
    Type: Grant
    Filed: October 22, 1984
    Date of Patent: April 28, 1987
    Assignee: Texas Instruments Incorporated
    Inventors: Dan T. Hockersmith, Joe W. Gilbert
  • Patent number: 4660066
    Abstract: An image focal plane array is disclosed including a first substrate having a first surface containing image detection elements that are interconnected to metallized layers on the opposite surface. The first substrate area is located above a second semiconductor substrate containing elevated portions that are metal coated and contacting the metallized portions on the opposite surface of the the first substrate to provide for electrical interconnection with the detection elements on the first substrate. A second structure is also illustrated which includes the image focal point array located on a cold finger and adjacent to the image focal plane array on the same cold finger is a stack of at least two silicon substrates containing support circuitry for the focal plane array. The circuitry on these semiconductor substrate stacks are interconnected by having at least one of the substrates including elevated portions to provide electrical interconnection between the two or more stack substrates.
    Type: Grant
    Filed: August 19, 1985
    Date of Patent: April 21, 1987
    Assignee: Texas Instruments Incorporated
    Inventor: Lee R. Reid
  • Patent number: 4659932
    Abstract: A radiant energy interlace system comprises an electromagnetic radiant energy reflector means having a magnetic core which includes a reed mirror portion and a body portion. The reed mirror portion is either a polished plate or frame of magnetic material holding a mirror and the body portion is of magnetic material having a center section with a centrally disposed ridge from which downwardly sloping surfaces extend to solid bar reel sections surrounded by coils of conductive wire. End sections of magnetic material having sloping surfaces for continuing the sloping surface of the center section complete the body section. A circuit is connected to the coils for alternately energizing the coils to magnetize alternate portions of the reed mirror portion to rotate the reed mirror portion about the fulcrum ridge of the center section. The slope of the body portion surfaces is equal to one half of the desired interlace angle.
    Type: Grant
    Filed: April 29, 1985
    Date of Patent: April 21, 1987
    Assignee: Texas Instruments Incorporated
    Inventor: Walter F. Roll
  • Patent number: 4660048
    Abstract: A microstrip antenna system is comprised of either a single antenna element (patch) or a plurality of stacked antenna elements having one or more feedpins connected to a corresponding number of conductive elements (flags) capacitively coupled to the antenna element or elements. The one or more feedpins have an inductive reactance which is cancelled by trimmed flags to provide the capacitance necessary to cancel the inductance for tuning the one or more antennas and providing maximum gain and minimum VSWR.
    Type: Grant
    Filed: December 18, 1984
    Date of Patent: April 21, 1987
    Assignee: Texas Instruments Incorporated
    Inventor: David W. Doyle
  • Patent number: 4659426
    Abstract: Refractory metals, refractory metal silicide, and polysilicon/refractory metal silicide sandwich structures integrated circuits are etched using carbonyl chemistry. That is, the deposited material is plasma etched using an etchant gas mixture which contains a gas, such as CO2, which can dissociate to provide carbonyl groups (CO) or, in combination with halogen sources, carbonyl halide radicals.
    Type: Grant
    Filed: May 3, 1985
    Date of Patent: April 21, 1987
    Assignee: Texas Instruments Incorporated
    Inventors: Clyde R. Fuller, Gordon P. Pollack, Robert H. Eklund, Dave Monahan
  • Patent number: 4660155
    Abstract: A video system has a controller for controlling the transfer of data from a processor to a CRT monitor. The controller has two clocks and a CRT interface for synchronously interfacing the controller to the CRT monitor, a second interface for synchronously interfacing the controller to the processor. A first clock source provides timing for the CRT interface and is in synch with the timing of the CRT monitor. A second clock source provides timing for the processor interphase which is in synch with the timing of the processor.
    Type: Grant
    Filed: July 23, 1984
    Date of Patent: April 21, 1987
    Assignee: Texas Instruments Incorported
    Inventors: Robert C. Thaden, Jeffrey C. Bond
  • Patent number: 4660090
    Abstract: A CCD imager with a correlated clamp sample and hold amplifier on chip includes a chain of CCD wells, a charge-sensing node coupled to one end of the chain of CCD wells, and a clock to clock charge packets from the chain of CCD wells into the charge-sensing node. A dummy charge-sensing node is integrated into the same monocrystalline semiconductor substrate as the charge-sensing node, and the charge-sensing node and the dummy node are connected to a common reference voltage. An amplifier senses a predetermined voltage change on the charge-sensing node with reference to the voltage on the dummy node after a charge packet has been transferred into the charge-sensing node.
    Type: Grant
    Filed: August 27, 1985
    Date of Patent: April 21, 1987
    Assignee: Texas Instruments Incorporated
    Inventor: Jaroslav Hynecek
  • Patent number: 4660065
    Abstract: A semiconductor Hall effect device having a stable and more controllable offset voltage is formed, in one embodiment, of an N-type silicon epitaxial layer overlying a P-type silicon substrate, and a P+-type region is formed, for example, by ion implantation, in the surface of the epitaxial layer over the active area of the Hall element. The P+-type region effectively shields the surface of the Hall element to prevent induced surface potential variations. Current and voltage sense contacts are provided by N+-type regions which penetrate through the P+-type shield region to contact the N-type epitaxial layer.
    Type: Grant
    Filed: July 8, 1985
    Date of Patent: April 21, 1987
    Assignee: Texas Instruments Incorporated
    Inventors: Fernando D. Carvajal, Joe R. Trogolo
  • Patent number: 4659413
    Abstract: A plasma etch system that processes one slice at a time is disclosed. The system is comprised of an entry loadlock, an exit loadlock, a main chamber, vacuum pumps, RF power supply, RF matching network, a heat exchanger, throttle valve and pressure control gas flow distribution and a microprocessor controller. A multiple slice cassette full of slices is housed in the entry load lock and after pumping to process pressure, a single slice at a time is moved by an articulated arm from the cassette through an isolation gate to the main process chamber. The slice is etched and removed from the main process chamber through a second isolation gate by a second articulated arm to a cassette in the exit loadlock. The process is repeated until all semiconductor wafers have been etched.
    Type: Grant
    Filed: October 24, 1984
    Date of Patent: April 21, 1987
    Assignee: Texas Instruments Incorporated
    Inventors: Cecil J. Davis, John E. Spencer, Randall E. Johnson, Rhett B. Jucha, Frederick W. Brown, Stanford P. Kohan
  • Patent number: 4659928
    Abstract: A focal plane array infrared device includes an optical system for focusing incoming infrared energy, a scanner for scanning the focused infrared energy onto a focal plane detector array for converting the infrared energy into electrical signals representative of the intensity of the infrared energy signals, a multiplexer for multiplexing the focal plane detector array electrical output to a dynamic preamplifier for amplification to a working level and a data processing means including a dynamic amplifier connected to the preamplifier for removing correlated noise from the information signal prior to signal processing, the dynamic amplifier including a plurality of switched capacitors and a transistor controlled by a controller whereby the incoming signals are stored in selected capacitors, amplified and combined to produce a difference signal at the output substantially equal to the focal plane detector array output.
    Type: Grant
    Filed: April 22, 1985
    Date of Patent: April 21, 1987
    Assignee: Texas Instruments Incorporated
    Inventor: Claude E. Tew
  • Patent number: 4660130
    Abstract: A method for compacting blocks of memory in a demand paged virtual address space which includes a plurality of virtual address pages includes identifying active and stable blocks to be compacted by defining a pointer to indicate a page of the virtual memory space, and advancing the pointer to continually indicate the page of the beginning of the available virtual memory space. As new blocks are allocated, they are located in the virtual address space beginning at the next available location of the advancing pointer. As blocks are referenced by the user, they are moved to the current location of the advancing pointer, so that, stable blocks may be collected together on stable pages and active blocks are collected together on active pages. A disk memory is provided, and periodically the pages containing collected stable blocks are "paged-out" to it.
    Type: Grant
    Filed: July 24, 1984
    Date of Patent: April 21, 1987
    Assignee: Texas Instruments Incorporated
    Inventors: David H. Bartley, Timothy J. McEntee, Donald W. Oxley, Satish M. Thatte
  • Patent number: 4660156
    Abstract: A video system includes a processor, CRT monitor, video memory and a video memory and CRT controller that provides rapid transfer of data to be displayed in both the text and graphics mode.
    Type: Grant
    Filed: July 23, 1984
    Date of Patent: April 21, 1987
    Assignee: Texas Instruments Incorporated
    Inventors: Karl M. Guttag, Ray Pinkam, Mark F. Novak
  • Patent number: 4656731
    Abstract: A method for siliciding interconnects on a vertically integrated device utilizing stacked CMOS technology includes a step for blocking off the p-channel devices. This blocking step is utilized to block the p-channel device in a stacked CMOS pair prior to forming titanium di-silicide on the exposed polysilicon interconnects. A mask is formed on the top polysilicon layer that forms the p-channel device and then patterned to remove the mask and the top polysilicon layer to expose the underlying polysilicon layers. A sidewall oxide is then formed to completely seal the p-channel devices and then the exposed silicon and polysilicon surfaces subjected to a self-aligned silicide process.
    Type: Grant
    Filed: August 5, 1985
    Date of Patent: April 14, 1987
    Assignee: Texas Instruments Incorporated
    Inventors: Hon W. Lam, Ravishankar Sundaresan
  • Patent number: 4658424
    Abstract: An integrated circuit device or chip digitally synthesizes human speech employing a linear predictive filter and a variable frame rate. The variable frame rate provides a more natural speech by slowing or speeding the frame rate for a particular application used in a system which constructs the speech data to be synthesized from allophone codes.
    Type: Grant
    Filed: March 5, 1981
    Date of Patent: April 14, 1987
    Assignee: Texas Instruments Incorporated
    Inventor: Alva E. Henderson
  • Patent number: 4658140
    Abstract: An infrared scanner includes an infrared energy reflecting surface rigidly fixed to a supporting shaft. The shaft is supported by jewel bearings for rotation by a motor controlled by a control circuit for imparting a scanning motion to the reflecting surface. A collar interconnects the shaft to an electrical coil which is energized by a two-directional source of power. A magnetic means includes a pair of "U" shaped members forming a housing of electromagnetic material for containing a pair of opposing magnets. The legs of the "U" shaped members support a coil pole in an air gap forming relationship with respect to the magnets.
    Type: Grant
    Filed: May 20, 1985
    Date of Patent: April 14, 1987
    Assignee: Texas Instruments Incorporated
    Inventors: Walter F. Roll, Anthony R. Thedford
  • Patent number: 4658377
    Abstract: A semiconductor dynamic read/write memory device contains an array of rows and columns of one-transistor memory cells, with a differential sense amplifier for each column of cells. The sense amplifier has a pair of balanced bit lines extending from its inputs, in a folded bit line configuration. The memory cells are not directly connected to the bit lines, but instead are coupled to bit line segments. The row address selects a cell to be connected to a segment, and also selects a segment to be connected to the bit line. The ratio of storage capacitance to effective bit line capacitance is increased, because the bit line itself is of lower capacitance to the substrate.
    Type: Grant
    Filed: July 26, 1984
    Date of Patent: April 14, 1987
    Assignee: Texas Instruments Incorporated
    Inventor: David J. McElroy