Patents Assigned to Texas Instruments
  • Execution of additional instructions in conjunction atomically as specified in instruction field
    Patent number: 9471317
    Abstract: A processor includes a plurality of execution units. At least one of the execution units is configured to determine, based on a field of a first instruction, a number of additional instructions to execute in conjunction with the first instruction and prior to execution of the first instruction.
    Type: Grant
    Filed: September 27, 2012
    Date of Patent: October 18, 2016
    Assignee: TEXAS INSTRUMENTS DEUTSCHLAND GMBH
    Inventors: Horst Diewald, Johann Zipperer
  • Isolated semiconductor layer over buried isolation layer
    Patent number: 9472571
    Abstract: An integrated circuit may be formed by forming an isolation recess in a single-crystal silicon-based substrate. Sidewall insulators are formed on sidewalls of the isolation recess. Thermal oxide is formed at a bottom surface of the isolation recess to provide a buried isolation layer, which does not extend up the sidewall insulators. A single-crystal silicon-based semiconductor layer is formed over the buried isolation layer and planarized to be substantially coplanar with the substrate adjacent to the isolation recess, thus forming an isolated semiconductor layer over the buried isolation layer. The isolated semiconductor layer is laterally separated from the substrate.
    Type: Grant
    Filed: June 11, 2014
    Date of Patent: October 18, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Daniel Nelson Carothers, Jeffrey R. Debord
  • Enabling coordinated multi-point reception
    Patent number: 9473219
    Abstract: This invention measures the propagation delay ?1 between the user equipment and a first cooperating unit and the propagation delay ?2 between the user equipment and a second cooperating unit. These propagation delays are used to compute a timing advance amount to the user equipment to enable coordinated multi-point reception. In a first embodiment one cooperating unit receives a function of the propagation delay, computes the timing advance amount and transmits a timing advance command to the user equipment. In a second embodiment a central unit performs these operations.
    Type: Grant
    Filed: December 31, 2014
    Date of Patent: October 18, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Tarik Muharemovic, Zukang Shen, Anthony Edet Ekpenyong
  • Method and system for reducing slice header parsing overhead in video coding
    Patent number: 9473769
    Abstract: A method for encoding a picture of a video sequence in a bit stream that reduces slice header parsing overhead is provided. The method includes determining weighting factors that may be used for weighted prediction in encoding at least one slice of the picture, wherein a total number of the weighting factors is constrained to not exceed a predetermined threshold number of weighting factors, wherein the threshold number is less than a maximum possible number of weighting factors, and signaling weighted prediction parameters including the weighting factors in a slice header in the bit stream.
    Type: Grant
    Filed: June 7, 2013
    Date of Patent: October 18, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Minhua Zhou
  • SRAM with buffered-read bit cells and its testing
    Patent number: 9472268
    Abstract: An SRAM with buffered-read bit cells is disclosed (FIGS. 1-6). The integrated circuit includes a plurality of memory cells (102). Each memory cell has a plurality of transistors (200,202). A first memory cell (FIG. 2) is arranged to store a data signal in response to an active write word line (WWL) and to produce the data signal in response to an active read word line (RWL). A test circuit (104) formed on the integrated circuit is operable to test current and voltage characteristics of each transistor of the plurality of transistors of the first memory cell (FIGS. 7-10).
    Type: Grant
    Filed: June 27, 2011
    Date of Patent: October 18, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Xiaowei Deng, Wah Kit Loh
  • Allocation and logical to physical mapping of scheduling request indicator channel in wireless networks
    Patent number: 9474055
    Abstract: A method for allocating resources for a scheduling request indicator (SRI) is disclosed. An SRI cycle period for use by user equipment (UE) within a cell is transmitted from a NodeB in a cell to UE within the cell. The NodeB transmits a specific SRI subframe offset and an index value to the particular UE within the cell. The specific SRI subframe offset and the index value enable the UE to determine a unique combination of cyclic shift, RS orthogonal cover, data orthogonal cover, and resource block number for the UE to use as a unique physical resource for an SRI in the physical uplink control channel (PUCCH).
    Type: Grant
    Filed: August 5, 2014
    Date of Patent: October 18, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Pierre Bertrand, Zukang Shen, Tarik Muharemovic
  • Die testing using top surface test pads
    Patent number: 9472478
    Abstract: Timely testing of die on wafer reduces the cost to manufacture ICs. This disclosure describes a die test structure and process to reduce test time by adding test pads on the top surface of the die. The added test pads allow a tester to probe and test more circuits within the die simultaneously. Also, the added test pads contribute to a reduction in the amount of test wiring overhead traditionally required to access and test circuits within a die, thus reducing die size.
    Type: Grant
    Filed: November 19, 2015
    Date of Patent: October 18, 2016
    Assignee: Texas Instruments Incorporated
    Inventors: Lee D. Whetsel, Richard L. Antley
  • Computer generated sequences for downlink and uplink signals in wireless communication systems
    Patent number: 9474035
    Abstract: The present disclosure provides a base station transmitter, a user equipment transmitter and methods of operating the base station and user equipment transmitters. In one embodiment, the base station transmitter is for use with a cellular communication system and includes a synchronization unit configured to provide a randomly-generated constant amplitude zero autocorrelation (random-CAZAC) sequence corresponding to a downlink synchronization signal. Additionally, the base station transmitter also includes a transmit unit configured to transmit the downlink synchronization signal using the random-CAZAC sequence. In another embodiment, the user equipment transmitter is for use with a cellular communication system and includes a reference signal unit configured to provide a random-CAZAC sequence for an uplink reference signal corresponding to a one resource block allocation of the user equipment.
    Type: Grant
    Filed: April 19, 2016
    Date of Patent: October 18, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Anand G. Dabak, Eko N. Onggosanusi, Aris Papasakellariou
  • Method and system to improve the performance of a video encoder
    Patent number: 9473792
    Abstract: Method and system to improve the performance of a video encoder. The method includes processing an initial video signal in a front-end image pre-processor to obtain a processed video signal and processor information respecting the signal, providing the processed video signal and the processor information to a video encoder, and encoding the video signal in the video encoder according to the processor information to provide an encoded video signal for storage. The system includes a video pre-processor connectable to receive an initial video signal. The video encoder in communication with the video pre-processor receives a processed video signal and a processor information. A storage medium in communication with the video encoder stores an encoded video signal.
    Type: Grant
    Filed: November 5, 2010
    Date of Patent: October 18, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Naveen Srinivasamurthy, Manoj Koul, Soyeb Nagori, Peter Labaziewicz, Kedar Chitnis
  • Sample adaptive offset (SAO) filtering in video coding
    Patent number: 9473784
    Abstract: A method for sample adaptive offset (SAO) filtering of largest coding units (LCUs) of a video frame in an SAO component is provided that includes receiving, by the SAO component, an indication that deblocked pixel blocks of an LCU are available, and applying SAO filtering, by the SAO component, to each pixel block of pixel blocks of an SAO processing area corresponding to the LCU responsive to the indication, wherein pixels of each pixel block of the SAO processing area are filtered in parallel.
    Type: Grant
    Filed: May 16, 2014
    Date of Patent: October 18, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Mihir Narendra Mody, Niraj Nandan, Hideo Tamama
  • Software reconfigurable digital phase lock loop architecture
    Patent number: 9473155
    Abstract: A novel and useful apparatus for and method of software based phase locked loop (PLL). The software based PLL incorporates a reconfigurable calculation unit (RCU) that is optimized and programmed to sequentially perform all the atomic operations of a PLL or any other desired task in a time sharing manner. An application specific instruction-set processor (ASIP) incorporating the RCU includes an instruction set whose instructions are optimized to perform the atomic operations of a PLL. The RCU is clocked at a fast enough processor clock rate to insure that all PLL atomic operations are performed within a single PLL reference clock cycle.
    Type: Grant
    Filed: July 15, 2015
    Date of Patent: October 18, 2016
    Assignee: Texas Instruments Incorporated
    Inventors: Roman Staszewski, Robert B. Staszewski, Fuqiang Shi
  • Switched mode assisted linear regulator with seamless transition between power tracking configurations
    Patent number: 9473023
    Abstract: A Switch Node Assisted Linear architecture, including a linear amplifier in parallel with a switched converter, is configurable in two tracking modes: (a) a SMAL regulator in which the amplifier sets load voltage with an envelope tracking bandwidth, and the switched converter is configured for current assist, and (b) a Switched Mode Power Supply configuration in which the amplifier is switch-decoupled, and the switcher circuit is switched configured with an output capacitor, operable as an SMPS providing load voltage with an adaptive tracking bandwidth that is less than the envelope tracking bandwidth.
    Type: Grant
    Filed: December 30, 2014
    Date of Patent: October 18, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Kevin Vannorsdel, Mark D. Kuhns, Juha T. Pennanen
  • Loop filtering managing storage of filtered and unfiltered pixels
    Patent number: 9473782
    Abstract: A video encoder comprises a loop filter to filter luminance and chrominance pixel values, first and second loop filter working buffers accessible to the loop filter, and ping and pong loop filter data buffers accessible to the loop filter and to a direct memory access (DMA) engine. The loop filter filters pixels about a plurality of vertical edges and a plurality of horizontal edges for each macroblock in a video frame. The loop filter distributes partially filtered luma and chrominance pixel values across the first and second loop filter working buffers as well as the ping and pong loop filter data buffers, and does not save partially filtered luma and chrominance pixel values to external memory via the DMA engine.
    Type: Grant
    Filed: October 30, 2012
    Date of Patent: October 18, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Shyam Jagannathan, Naveen Srinivasamurthy
  • Using L1 cache as re-order buffer
    Patent number: 9471320
    Abstract: A method is shown that eliminates the need for a dedicated reorder buffer register bank or memory space in a multi level cache system. As data requests from the L2 cache may be returned out of order, the L1 cache uses it's cache memory to buffer the out of order data and provides the data to the requesting processor in the correct order from the buffer.
    Type: Grant
    Filed: July 18, 2014
    Date of Patent: October 18, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Ramakrishnan Venkatasubramanian, Oluleye Olorode, Hung Ong
  • Microprocessor based power management system architecture
    Patent number: 9471121
    Abstract: An electronic system is disposed on a single integrated circuit including a plurality of power domains and a power control manager. Each power domain may be independently powered. The power control manager includes a set of control registers storing individual control bits, a power switch for each power domain and a programmable microprocessor. The programmable microprocessor controls the digital state of individual bits within the control registers thereby controlling the ON and OFF state of the corresponding power domain.
    Type: Grant
    Filed: November 14, 2012
    Date of Patent: October 18, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Arindam Saha, Ish Kumar Dham, Vijay Sarathy, William B Bonnett
  • Split phosphor/slit color wheel segment for color generation in solid-state illumination system
    Patent number: 9470886
    Abstract: Apparatus for generating blue color illumination for use in a projection system a color wheel with segments of respective different color light emitting phosphors formed over light non-transmitting portions and at least one blue color generating segment. The blue color generating segment has cyan color light emitting phosphor formed over a light non-transmitting first portion and a second portion that transmits blue laser light through the wheel. A dichroic filter directs blue laser light from a light source onto the respective segments as the color wheel rotates. The light strikes the first and second portions of the blue color generating segment to generate blue light at a color point determined by both blue laser light and phosphor emitted cyan light.
    Type: Grant
    Filed: January 24, 2014
    Date of Patent: October 18, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Terry Alan Bartlett
  • Valid context status retention in processor power mode management
    Patent number: 9471140
    Abstract: A system having multiple power mode types, for example, includes a power manager that is responsive to a selection of a suspend power mode type for maintaining processor context information in volatile memory while the processor is in the selected suspend mode. A status register is arranged to retain the status of the context information in the volatile memory while the processor is in the selected suspend power mode. The power manager is arranged to selectively apply power to various voltage domains in response to the type of power mode selected. The processor is optionally arranged to signal the power manager of transitions to the selected suspend mode and of transitions to an active mode using a power enable signal.
    Type: Grant
    Filed: June 13, 2014
    Date of Patent: October 18, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Kazunobu Shin, Siva Srinivas Kothamasu, James John Doublesin, Roland Volker Bucksch
  • Integrated circuit package strip insert assembly
    Patent number: 9472440
    Abstract: A plurality of inserts adapted are to be received in a plurality of holes in a support plate having a first surface adapted to engage a first surface of an integrated cicuirt IC package strip. The support plate has a plurality of holes in fluid communication with a vacuum source and are constructed from a first material having a first hardness. The plurality of inserts are constructed from a second material having a second hardness less than said first hardness.
    Type: Grant
    Filed: September 11, 2015
    Date of Patent: October 18, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Joseph Cruz Yutuc, Leody Navarro Olivares
  • Dielectric waveguide comprised of a core, a cladding surrounding the core and cylindrical shape conductive rings surrounding the cladding
    Patent number: 9472840
    Abstract: A dielectric waveguide (DWG) has a dielectric core member that has a length L and an oblong cross section. The core member has a first dielectric constant value. A dielectric cladding surrounds the dielectric core member; the cladding has a second dielectric constant value that is lower than the first dielectric constant. A conductive shield layer surrounds a portion of the dielectric cladding.
    Type: Grant
    Filed: May 22, 2014
    Date of Patent: October 18, 2016
    Assignee: Texas Instruments Incorporated
    Inventors: Juan Alejandro Herbsommer, Baher Haroun
  • Tunable power amplifier with wide frequency range
    Patent number: 9473078
    Abstract: A circuit includes an amplifier configured to amplify an input signal and generate an output signal. The circuit also includes a tuning network configured to tune frequency response of the amplifier. The tuning network includes at least one tunable capacitor, where the at least one tunable capacitor includes at least one micro-electro mechanical system (MEMS) capacitor. The amplifier could include a first die, the at least one MEMS capacitor could include a second die, and the first die and the second die could be integrated in a single package. The at least one MEMS capacitor could include a MEMS superstructure disposed over a control structure, where the control structure is configured to control the MEMS superstructure and tune the capacitance of the at least one MEMS capacitor.
    Type: Grant
    Filed: August 5, 2014
    Date of Patent: October 18, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Aritra Banerjee, Nathan R. Schemm, Rahmi Hezar, Lei Ding, Baher Haroun