Abstract: A detailed design of an LTE Link Adaptation function for LTE uplink is disclosed. A new approach for adapting SINR backoff in OLLA is used when serving non-time-sensitive radio bearers without target BLER constraint. A sub-optimal scheduler is also disclosed wherein the SINR measurements at the ILLA input are updated on each TTI for the UEs scheduled in that sub-frame for future UL transmission with a fresher interference measurement from the sub-frame preceding by 8 ms the actual transmission sub-frame. This allows for exploitation of a correlation peak of the interference resulting from HARQ retransmissions. A schedule incorporating these features improves upon, with a minor complexity increase, the spectral efficiency performance of a low-complexity baseline scheduler only based on SINR updates at SRS rate.
Type:
Grant
Filed:
January 17, 2013
Date of Patent:
April 19, 2016
Assignee:
TEXAS INSTRUMENTS INCORPORATED
Inventors:
Pierre Bertrand, Jing Jiang, Anthony Ekpenyong
Abstract: Embodiments of a power line communication (PLC) transmitter device for overlapping priority contention windows are presented. A processor is configured to perform a physical channel sense operation to detect an idle channel on a PLC network. A transmitter transmits a normal priority data packet on the channel during a high priority contention window. In another embodiment, a Normal Priority Contention Window (NPCW) is allowed to overlap with a High Priority Contention Window (HPCW). The minimum contention window for the normal priority frames (i.e., NPCW) is equal to or longer than the contention window for high priority frames (i.e., HPCW). By making the NPCW longer than the HPCW, the high priority frames will have a better chance than normal priority frames to get access to the channel on transmission reattempts.
Abstract: Channel state information (CSI) feedback in a wireless communication system is disclosed. A precoding matrix is generated for multi-antenna transmission based on precoding matrix indicator (PMI) feedback, wherein the PMI indicates a choice of precoding matrix derived from a matrix multiplication of two matrices from a first codebook and a second codebook. In one embodiment, the first codebook comprises at least a first precoding matrix constructed with a first group of adjacent Discrete-Fourier-Transform (DFT) vectors. In another embodiment, the first codebook comprises at least a second precoding matrix constructed with a second group of uniformly distributed non-adjacent DFT vectors.
Abstract: The silicon real estate required for the semiconductor fabrication of a calibrated capacitor-based successive approximation register (SAR) analog-to-digital converter (ADC) (100) is substantially reduced by using a number of shared capacitors (SC1-SCs?1) which are used as calibration capacitors when operating in a calibration mode and as bit capacitors when operating in a normal mode.
Abstract: A trench MOSFET device includes a semiconductor layer of a first doping type. MOS transistor cells are in a body region of a second doping type in the semiconductor layer. The transistor cells include a first cell type including a first trench providing a first gate electrode or the first gate electrode is on the semiconductor surface between the first trench and a second trench, and a first source region is formed in the body region. The first gate electrode is electrically isolated from the first source region. A second cell type has a third trench providing a second gate electrode or the second gate electrode is on the semiconductor surface between the third trench and a fourth trench, and a second source region is in the body region. An electrically conductive member directly connects the second gate electrode, first source region and second source region together.
Type:
Grant
Filed:
May 30, 2014
Date of Patent:
April 19, 2016
Assignee:
TEXAS INSTRUMENTS INCORPORATED
Inventors:
Thomas Eugene Grebs, Touhidur Rahman, Christopher Boguslaw Kocon
Abstract: An embodiment of the invention provides a method for reducing data corruption in a wireless power transmission system. Power is transmitted from a primary coil to a secondary coil by induction. The voltage induced on the secondary coil by induction is rectified. The change in current supplied to a load configured to be coupled to the wireless power transmission system is limited.
Type:
Grant
Filed:
July 16, 2010
Date of Patent:
April 19, 2016
Assignee:
TEXAS INSTRUMENTS INCORPORATED
Inventors:
Paul LeRoy Brohlin, Stephen Christopher Terry, Deepak Mohanlal Khanchandani
Abstract: A system and method for detecting a USB cable-type. A USB PD device configured at a near end of a USB cable is configured to (i) receive and process a signal from a device at a far end of the USB cable to determine a power rating of the USB cable and (ii) adjustably establish power delivered by the first device to the USB cable as a function of the determined USB cable power rating.
Abstract: A dual platform communication controller, a method of controlling communication of data packets based on different communication standards and a wireless transceiver. In one embodiment, the dual platform communication controller includes: (1) a signal interpreter configured to recognize first data packets based on a first communication standard and second data packets based on a second communication standard and (2) a traffic manager coupled to the signal interpreter and configured to dynamically control communication of the second data packets including active second data packets and allocate bandwidth for communication of the first and second data packets.
Type:
Grant
Filed:
August 30, 2013
Date of Patent:
April 12, 2016
Assignee:
TEXAS INSTRUMENTS INCORPORATED
Inventors:
Yaniv Tzoreff, Avi Baum, Yariv Raveh, Moshe Menachem
Abstract: A system includes a memory bank and a control unit. The control unit is configured to perform FFT computations based on Merged radix-2 butterfly calculations by performing FFT computations over N input items, and to access the memory bank for (½×log2N)×(10×log2N) times.
Abstract: Topology discovery of a target system having a plurality of components coupled with a scan topology may be performed by driving a low logic value on the data input signal and a data output signal of the scan topology. An input data value and an output data value for each of the plurality of components is sampled and recorded. A low logic value is then scanned through the scan path and recorded at each component. The scan topology may be determined based on the recorded data values and the recorded scan values.
Abstract: Transmitting a acknowledge/not acknowledge (ACK/NACK) response in a wireless cellular network by mapping the data value into a cyclic shifted version of a reference signal. A subframe is formed with a plurality of symbols with certain symbols designated as reference signal (RS) symbols. The receiver and transmitter both know when an ACK/NACK response is expected. If an ACK/NACK response is not expected, then an RS is inserted in the duration of symbols designated as RS symbols. If an ACK/NACK response is expected, then the ACK/NACK response is embedded in one or more of the symbols designated as RS symbols. The subframe is transmitted to a receiver, and the receiver can determine the ACK/NACK value in the RS symbol, if present, and also use the RS symbol for coherent demodulation of a CQI (channel quality indicator) or data.
Type:
Grant
Filed:
September 26, 2013
Date of Patent:
April 12, 2016
Assignee:
TEXAS INSTRUMENTS INCORPORATED
Inventors:
Tarik Muharemovic, Zukang Shen, Pierre Bertrand
Abstract: In an embodiment of the invention, a method of performing a byte-rotate-merge on computer hardware is discussed. Byte-rotating is performed on first and second source operands and are byte-rotated by first and second rotation constants respectively. The first byte-rotate output and the second byte-rotate output are merged. Bytes from the first byte-rotate output are output to a byte-rotate-merge output when control bits from a byte-mask are logical ones. Bytes from the second byte-rotate output are output to a byte-rotate-merge output when control bits from the byte-mask are logical zeros.
Abstract: An integrated circuit is formed by forming an isolation mesa over a single crystal substrate which includes silicon, and forming a first epitaxial layer on the substrate by a selective epitaxial process so that a top surface of the first epitaxial layer is coplanar with the top surface of the isolation mesa. A non-selective epitaxial process forms single-crystalline silicon-based semiconductor material on the first epitaxial layer and non-crystalline silicon-based material on the isolation mesa. A cap layer is formed over the second epitaxial layer, and a radiantly-induced recrystallization process causes the non-crystalline silicon-based material to form single-crystalline semiconductor over the isolation mesa.
Type:
Grant
Filed:
June 11, 2014
Date of Patent:
April 12, 2016
Assignee:
TEXAS INSTRUMENTS INCORPORATED
Inventors:
Daniel Nelson Carothers, Jeffrey R. Debord
Abstract: A network switch includes a plurality of ports, a parser coupled to the plurality of ports, and a processor coupled to the ports and configured to process a received packet via one of the ports. The received packet includes a first header field, a second header field, and a destination header field, each of the first, second, and destination header fields including a TTL field. The parser is configured to decide a valid bit for each of the first header field, the second header field and the destination header field, based on an availability for each of the first header field, the second header field and the destination header field. The processor is configured to execute an instruction to cause, based on the valid bits of the first and second header fields, content of a select one of the first or second header field's TTL field to be copied to the destination header field.
Abstract: An adaptive threshold approach is applied to detect true touch signals and filter out increased noise signals. More specifically, statistics regarding the signals from a touch screen are used to create a touch signal threshold that changes with the statistics of the touch signals. Accordingly, the threshold can automatically move higher in high noise situations and lower in low noise situations. So configured, fewer noise signals are erroneously interpreted as touches for the device associated with the touch screen.
Abstract: In an embodiment of the invention, power is provided to an SRAM array without causing latch-up by charging the positive voltage node in the SRAM array and the Nwell regions in the SRAM at approximately the same rate.
Abstract: A method for fabricating a semiconductor device provides a first chip having first terminals, a second chip having second terminals, and a third chip having third terminals. A first silicon interposer having first through silicon vias TSVs and a second silicon interposer having second TSVs is provided. The first TSVs are arrayed in a first, a second, and a third set. The first set is located in a first interposer region and matching the first terminals. The second set is located in a second interposer region and matching the second terminals. The third set is located in a third interposer region between the first and second regions and matching the TSVs of the second interposer and the third terminals. The first chip is aligned with the first set TSVs. The second chip is aligned with the second set TSVs. The second interposer is aligned with the third set TSVs. A solder of a first melting temperature is used.
Abstract: A method for detecting a resynchronization marker in an encoded MPEG-4 video bitstream is provided that includes computing a first candidate resynchronization marker length based on a first version of MPEG-4 Visual and the type of a video object plane (VOP) in the video bitstream, computing a second candidate resynchronization marker length based on a second version of MPEG-4 Visual and the type of the VOP, checking the video bitstream for a first valid resynchronization marker bit sequence using the first candidate resynchronization marker length, checking the video bitstream for a second valid resynchronization marker bit sequence using the second candidate resynchronization marker length, and detecting the resynchronization marker when a valid sequence of stuffing bits is present in the video bitstream after the macroblock boundary and either the first valid resynchronization marker bit sequence or the second valid resynchronization marker bit sequence is found in the video bitstream.
Abstract: A voltage reference circuit includes a bipolar transistor and a circuit configured to measure the ratio of emitter current to base current of the bipolar transistor. The output voltage of the voltage reference circuit is compensated as a function of the measured ratio.
Abstract: A dielectric wave guide (DWG) has a longitudinal dielectric core member. The core member has a first dielectric constant value. A cladding surrounds the dielectric core member and has a second dielectric constant value that is lower than the first dielectric constant. A portion of the DWG is configured as a corner having a radius. A conductive layer formed on an outer radius of the corner.
Type:
Grant
Filed:
April 1, 2013
Date of Patent:
April 12, 2016
Assignee:
TEXAS INSTRUMENTS INCORPORATED
Inventors:
Juan Alejandro Herbsommer, Gerd Schuppener, Robert Floyd Payne