Abstract: The invention provides, one aspect, a method of fabricating a semiconductor device. In one aspect, the method includes forming a carbide layer over a gate electrode and depositing a pre-metal dielectric layer over the carbide layer. The method provides a significant reduction in NBTI drift.

Abstract: A method for manufacturing a semiconductive device comprising forming a mask for a semiconductive device structure over a layer of a semiconductor substrate and partially etching the layer to form lateral and vertical surfaces. Thicknesses of one to several atomic diameters of atoms that comprise said layer are removed from the lateral surfaces and the vertical surfaces that are located under the mask to form a target dimension of a semiconductive device structure.

Abstract: A Propagation Test instruction, a Decay Test instruction and a Cycle Test instruction provide testing of DC and AC interconnect circuits between circuits including JTAG boundary scan cells. A few additions to the Test Access Port circuitry, including gating producing a Capture Test Strobe (CTS) signal, and the boundary scan cells are required to implement the additional instructions. The instructions are extensions of the conventional JTAG operating structure.

Abstract: An apparatus for detection of a USB host or a USB OTG device being attached to Vbus connector terminal of a USB device includes an attach detection pull down resistor isolated from the Vbus connector terminal. This attach detection feature guarantees USB attach detection and complies with current limits of both USB 1.1 and USB 2.0 OTG specifications.

Abstract: A highly secure “Design Zones” system is described that promotes collaboration between a manufacturer and owner of compute systems and its partners such as sub-contractors, customers and suppliers offers flexibility in the compute and design process. A partner starts a VPN tunnel between his workstations to establish a secure encrypted tunnel end to end wherein each partner is identified with a different VPN group/password. A session is started by the partner in a Web page on a portal machine through a thin client technology that authenticates thru LDAP the user/password of the person.

Abstract: Methods (102) are presented for protecting copper structures (26) from corrosion in the fabrication of semiconductor devices (2), wherein a thin semiconductor or copper-semiconductor alloy corrosion protection layer (30) is formed on an exposed surface (26a) of a copper structure (26) prior to performance of metrology operations (206), so as to inhibit corrosion of the copper structure (26). All or a portion of the corrosion protection layer (30) is then removed (214) in forming an opening in an overlying dielectric (44) in a subsequent interconnect layer.

Abstract: A method evaluating threshold of a data cell in a memory device including a programming locus coupled with the data cell for receiving a programming signal setting a stored signal level in the data cell and responding to a read signal to indicate the stored signal at a read locus; includes the steps of: (a) in no particular order: (1) selecting a test threshold signal; and (2) setting a read signal at a non-read level; (b) applying the test threshold signal to the programming locus; (c) cycling the read signal between a read level and a non-read level while applying the test threshold signal to the programming locus to present at least two test signals at the read locus when the read signal is at the read level; and (d) while cycling, observing whether the at least two test signals manifest a difference greater than a predetermined amount.

Abstract: In the present invention, a PMOS device comprises a channel region formed in {100} silicon with first and second source/drain region disposed on either side of the channel region. The channel region is oriented such that a current flow between the source/drain regions has a <100> direction through the channel region. Dielectric regions create a compressive stress on the channel region perpendicular to the current flow.

Abstract: One or more aspects of the present invention relate to forming a dielectric suitable for use as a gate dielectric in a transistor. The gate dielectric is formed by a nitridation process that adds nitrogen to a semiconductor substrate.

Abstract: A metal interconnect structure (100) comprising a bond pad (101), which has copper with at least 70 volume percent composed of crystal grains expanding more than 1 ?m in their main direction, and 30 or less volume percent composed of crystal grains, which expand less than 1 ?m in their main crystal direction. A body (102) of tin alloy is in contact with the bond pad.

Abstract: A method and apparatus is provided for characterizing a contactor for automated semiconductor device testing, the method first comprising placing the contactor on a contactor test board positioned within an automated test apparatus. A first probe of the automated test apparatus is contacted to a conductive layer of the contactor test board, and a second probe is placed on a contactor pin of the contactor, wherein the contactor pin is operable to linearly translate within the contactor. A predetermined pressure is applied to the contactor pin via the second probe, wherein the contactor pin is translated toward the contactor test board. An electrical characteristic of the contactor pin is measured between the first probe and the second probe and compared to a desired electrical characteristic, wherein a condition of the contactor pin is determined, based on the comparison of the measured electrical characteristic and the desired electrical characteristic.

Abstract: The present invention provides an apparatus, system and method for transmitting asynchronous transfer mode (ATM) data cells on an ATM adaptation layer (AAL) configured connection within an ATM system comprising a digital signal processor (DSP) sub-system (160) and a host processor (190). The transmitter interfaces directly with the DSP sub-system (160) (which converts the digitized voice samples into voice signals) and the host processor (190) (which performs AAL2 signaling and layer management functions). The transmitter is configured to interleave AAL2 voice packets from the DSP sub-system (160) and signaling and management packets from the host processor (190) on an ATM connection. Data is fetched by DMA(s) (415). A channel look-up table uses the DSP assigned voice channel as an index into the table to map a voice channel to the ATM connection.

Abstract: A programmable address decoder is common to the on-chip ROM and on-chip RAM. The programmable address decoder conditionally routes accesses to portions of the ROM to the RAM. The ROM address space is mapped to RAM via a set of configuration registers. This permits patched ROM program code and data table to be stored in on-chip RAM. The patched code and configuration data is stored in an off-chip non-volatile memory. This patch code and the configuration to use is loaded into the RAM and configuration registers on system bootstrap procedure.

Abstract: Junction field effect transistors (JFETs) can be fabricated with an epitaxial layer that forms a sufficiently thick channel region to enable the JFET for use in high voltage applications (e.g., having a breakdown voltage greater than about 20V). Additionally or alternatively, threshold voltage (VT) implants can be introduced at one or more of the gate, source and drain regions to improve noise performance of the JFET. Additionally, fabrication of such a JFET can be facilitated forming the entire JFET structure concurrently with a CMOS fabrication process and/or with a BiCMOS fabrication process.

Abstract: A “Design Zones” system provides a highly secure common resource computing environment or design zone with services on the common resource or design zone being protected by multiple layers of security to engagement boxes with the computing environment where the partners can work simultaneously in multiple teams, run simulation tests, emulate software problems and share in a secure zone with just the remote display going back to the engagement box and therefore to the partner outside the owner.

Abstract: A method and system that objectively measures the convergence and focus of a 2 or 3 spatial light modulator (SLM) projection display. The system uses five (5) CCD cameras and a frame grabber to store red, green, and blue (R-G-B) data from selected pixels located in the corners and center of the projector's field-of-view. The horizontal and vertical locations for the R-G-B pixels at each of the five locations is determined and the delta (?) displacement of the green and blue pixels, relative to the reference red pixel, is calculated and used to converge the image. The optical focus of the system is also determined using a Fast Fourier Transform (FFT). The FFT is performed on this same data and a power spectrum summation beyond the first mimima is determined. The focus is then adjusted to maximize this value.

Abstract: A semiconductor device having a leadframe comprised of a base metal (110, e.g., copper), a chip mount pad (103) and a plurality of lead segments (104). Each of the segments has a first end (104a) near the mount pad and a second end (104b) remote from the mount pad. The device further has a semiconductor chip (103) attached to the mount pad and electrical interconnections (107) between the chip and the first segment ends. Encapsulation material (120) covers the chip, the bonding wires and the first segment ends, yet leaves the second segment ends exposed. At least portions of the second segment ends have the base metal covered by a layer of solderable metal (130, e.g., nickel) and by an outermost layer of noble metal (140, e.g., stack of palladium and gold).

Abstract: A micromirror of a micromirror array of a spatial light modulator used in display systems comprises a mirror plate attached to a hinge that is supported by two posts formed on a substrate. Also the mirror plate is operable to rotate along a rotation axis that is parallel to but offset from a diagonal of the mirror plate when viewed from the top. An imaginary line connecting the two posts is not parallel to either diagonal of the mirror plate.

Abstract: For a given sentence grammar, speech recognizers are often required to decode M sets of HMMs each of which models a specific acoustic environment. In order to match input acoustic observations to each of the environments, typically recognition search methods require a network of M sub-networks. A new speech recognition search method is described here, which needs that is only the size of a single sub-network and yet gives the same recognition performance, thus reducing memory requirement for network storage by (M?1)/M.

Abstract: An improved n-channel integrated lateral DMOS (10) in which a buried body region (30), beneath and self-aligned to the source (18) and normal body diffusions, provides a low impedance path for holes emitted at the drain region (16). This greatly reduces secondary electron generation, and accordingly reduces the gain of the parasitic PNP bipolar device. The reduced regeneration in turn raises the critical field value, and hence the safe operating area.