Patents Assigned to Texas Instruments
  • Method to extend operating range of joint additive and convolutive compensating algorithms
    Patent number: 7236930
    Abstract: The operating range of joint additive and convolutive compensating method is extended by enhanced channel estimation procedure that adds SNR-dependent inertia and SNR-dependent limit on the channel estimate.
    Type: Grant
    Filed: April 12, 2004
    Date of Patent: June 26, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Alexis P. Bernard, Yifan Gong
  • Secure bootloader for securing digital devices
    Patent number: 7237121
    Abstract: A secure bootloader for securing software and systems in a digital device 110 by ensuring only encrypted and authenticated boot software is loaded and executed in the digital device 110. The encrypted boot software is read into the device 110 and authenticated. If the boot software is not authenticated, then the digital device 110 does not boot.
    Type: Grant
    Filed: September 17, 2001
    Date of Patent: June 26, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: William E. Cammack, Jason Douglas Kridner
  • Method of initializing a communication system with different bandwidth receivers and transmitters
    Patent number: 7236532
    Abstract: A method of communicating across a channel includes receiving information having a known bandwidth and a known spectrum. The information is preferably in the form of a multicarrier modulated signal, e.g., a DMT signal. In one aspect, this information is received at a receiver having a reduced channel bandwidth. An aliasing spectrum can be calculated based on the known spectrum and the frequency difference between the known bandwidth and the reduced-channel bandwidth. The received information can then be modified based upon the aliasing function to compensate for alias distortion. For example, the received information can be modified by modifying the noise component or signal-to-noise ratio of the received information.
    Type: Grant
    Filed: June 11, 2001
    Date of Patent: June 26, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Fernando A. Mujica, Michael O. Polley, Arthur J. Redfern, Nirmal C. Warke, Yaser M. Ibrahim
  • Enhanced preamble to enable low power detection
    Patent number: 7236544
    Abstract: System and method for enabling the low power detection of a transmitted sequence. A preferred embodiment comprises the replacement of a portion of a preamble (after the application of any needed scrambling) with an expected sequence field (such as the expected sequence field 410). The expected sequence field may contain a sequence of values known at a receiver or a periodic sequence. The addition of the expected sequence field does not affect the length of the preamble and is compatible with existing receivers.
    Type: Grant
    Filed: September 24, 2003
    Date of Patent: June 26, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Richard G. C. Williams, A. Joseph Mueller
  • Configurable cache system depending on instruction type
    Patent number: 7237065
    Abstract: A processor comprises decode logic that determines an instruction type for each instruction fetched, a first level cache, a second level cache coupled to the first level cache, and control logic operatively coupled to the first and second level caches. The control logic preferably causes cache linefills to be performed to the first level cache upon cache misses for a first type of instruction, but precludes linefills from being performed to the first level cache for a second type of instruction.
    Type: Grant
    Filed: May 24, 2005
    Date of Patent: June 26, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Thang M. Tran, Raul A. Garibay, Jr., Muralidharan S. Chinnakonda, Paul K. Miller
  • Assembly directives for the support of multi-language programming
    Patent number: 7237233
    Abstract: The present invention provides methods for facilitating the sharing of data structures in a software application written using both a high level programming language and assembly language. Methods are provided for defining a data structure in an assembly language program such that the data structure is created in exact conformance to the physical and logical memory layout mandated for a comparable data structure by a compiler for a high level language. Such methods comprise providing assembly language directives that cause the assembler to automatically adapt a data structure definition to the alignment constraints imposed by the high level language compiler.
    Type: Grant
    Filed: December 19, 2002
    Date of Patent: June 26, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Paul Knueven, Christopher M. Wolf
  • Speed of execution of a conditional subtract instruction and increasing the range of operands over which the instruction would be performed correctly
    Patent number: 7237000
    Abstract: A circuit which first shifts both a dividend and a divisor by an extra bit such that a 1-bit shift can be avoided after subtraction of the shifted values of dividend and the divisor, while performing a conditional subtraction instruction. The shifted divisor can conveniently replace the dividend as required for the instruction. The approach can be used to implement, among others, 2N-bit/N-bit (denoted 2N/N) division using an N-bit ALU, N/N division using N-bit ALU. The division can be implemented for all possible values of N without requiring substantially more complexity in the implementation.
    Type: Grant
    Filed: July 24, 2002
    Date of Patent: June 26, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Ajit Gupte, Subash Chandar Govindarajan, Alexander Tessarolo
  • Method to implement hysteresis in a MOSFET differential pair input stage
    Patent number: 7236030
    Abstract: A simplified comparator circuit (10) having hysteresis and lower power requirements for its implementation. The circuit (10) includes 2 minimum-sized MOSFETs (MN4, MN5) providing feedback from the circuit output to an input device (MN1) body to produce hystereis, requiring very little power. This invention is suitable for applications not requiring a precisely set hysteresis magnitude.
    Type: Grant
    Filed: June 30, 2004
    Date of Patent: June 26, 2007
    Assignee: Texas Instruments Incorporated
    Inventor: John J. Price, Jr.
  • Area efficient implementation of small blocks in an SRAM array
    Patent number: 7236396
    Abstract: An SRAM array with a dummy cell row structure in which the SRAM array is divided into segments isolated by a row pattern of dummy cells. The dummy cell structure provides a continuous cell array at the lower cell patterning levels. The SRAM array includes a first and second array block each including an SRAM cell having a first layout configuration, one or more of the dummy cells having a second layout configuration arranged along the row pattern associated with a wordline of the SRAM array, a first power supply voltage line connected to the first array block, and a second different power supply voltage line connected to the second array block. The first and second power supply voltage lines of the array blocks are further connected to the one or more dummy cells.
    Type: Grant
    Filed: June 30, 2005
    Date of Patent: June 26, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Theodore W. Houston, David Barry Scott, Sudha Thiruvengadam
  • Apparatus and method for generating pulses
    Patent number: 7236036
    Abstract: An apparatus for generating pulses includes: (a) A delay unit having an input delay locus for receiving a delay unit input signal and an output delay locus for presenting an output delay signal. The delay unit output signal is delayed by a delay interval with respect to the input delay signal. (B) A latch coupled with the delay unit to selectively keep the delay unit input signal at at least one predetermined signal level.
    Type: Grant
    Filed: April 12, 2005
    Date of Patent: June 26, 2007
    Assignee: Texas Instruments Incorported
    Inventors: Charles M. Branch, Steven C. Bartling
  • H-bridge circuit with shoot through current prevention during power-up
    Patent number: 7236003
    Abstract: The H-bridge circuit with shoot through current prevention during power-up includes: a high side transistor; a low side transistor coupled in series with the high side transistor; pull down devices coupled to a control node of the high side transistor and to a control node of the low side transistor; and wherein the pull down devices are controlled by a pull down circuit including a Power On Reset circuit, monitoring the digital power supply such that the high side and low side transistors are OFF until the digital power supply has settled to a desired operating voltage.
    Type: Grant
    Filed: September 29, 2005
    Date of Patent: June 26, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Shanmuganand Chellamuthu, Brett E. Smith, Thomas A. Schmidt, Abidur Rahman
  • Adaptive screening in raster image processing of complex pages
    Patent number: 7236268
    Abstract: A method of data processing is described for generating a screened bitmap in an adaptive manner. The page being printed is subdivided into a plurality of smaller areas, and the optimal screening method is selected based on the content of the data being processed. Areas of the page that primarily comprise of graphic elements and/or fonts are screened as part of the rendering process, while areas that are primarily continuous tone elements are screened as a secondary step after the rendering process.
    Type: Grant
    Filed: July 30, 2003
    Date of Patent: June 26, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Pochiraju Srinivas Rao, James G. Bearss
  • Embedded symmetric multiprocessor system with arbitration control of access to shared resources
    Patent number: 7237071
    Abstract: A single chip, embedded symmetric multiprocessor (ESMP) having parallel multiprocessing architecture composed of identical processors includes a single program memory. Program access arbitration logic supplies an instruction to a single requesting central processing unit at a time. Shared memory access arbitration logic can supply data from separate simultaneously accessible memory banks or arbitrate among central processing units for access. The system may simulate an atomic read/modify/write instruction by prohibiting access to the one address by another central processing unit for a predetermined number of memory cycles following a read access to one of a predetermined set of addresses in said shared memory.
    Type: Grant
    Filed: September 27, 2002
    Date of Patent: June 26, 2007
    Assignee: Texas Instruments Incorporated
    Inventor: Steven R. Jahnke
  • Method of controlling slope and dead time in an integrated output buffer with inductive load
    Patent number: 7236021
    Abstract: A method and apparatus independently controls the increasing rate and the decreasing rate a P-channel power FET and an N-channel power FET driving an inductive load. Circuits inhibit turning ON the P-channel FET until the voltage on the gate of the N-channel FET falls below its turn-on voltage threshold, and turning ON the N-channel FET until the voltage on the gate of the P-channel FET falls below its turn-on voltage threshold.
    Type: Grant
    Filed: January 31, 2006
    Date of Patent: June 26, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Jim D. Childers, Pravin P. Patel
  • Structured adaptive frequency hopping
    Patent number: 7236511
    Abstract: The invention generally provides a method of intelligent frequency hopping such as in Bluetooth and Home RF networks. The method (100) includes the acts of sampling a plurality of channels in a frequency band and identifying each channel as a good channels or a bad channel (110), determining the size of a good window and the size of a bad window (120), and assigning a plurality of good channels to a good window (130) and a plurality of bad channels to a bad window (140). Accordingly, the method increases the reliability and throughput of wireless networks.
    Type: Grant
    Filed: November 2, 2001
    Date of Patent: June 26, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Anuj Batra, Jin-Meng Ho, Kofi Dankwa Anim-Appiah
  • Synchronising circuit
    Patent number: 7236556
    Abstract: In an integrated circuit receiving multiple serial data streams in parallel, a local clock is generated from each data stream and is synchronized with the data stream. Sometimes a data stream may have no transitions making it difficult to keep the clock synchronized with its data. A clock channel is provided, which always has edges. A circuit is provided for each data stream which measures the time elapsed since the data stream had an edge. After a certain period, the phase of the local clock is nudged towards that of the clock channel. Thereafter, the longer there are no edges on the data stream the more frequently nudges towards the phase of the clock channel are made.
    Type: Grant
    Filed: July 22, 2003
    Date of Patent: June 26, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Richard Ward, Giuseppe Surace, Andrew Joy
  • Method for selective solicitation of user assistance in the performance tuning process
    Patent number: 7237234
    Abstract: A compiler tool is provided to selectively solicit assistance from a programmer in order to improve optimization of code compiled by the compiler. As a program is being compiled, the compiler keeps track of the places where it could do better if it only knew certain information. The user is presented with one or more pieces of advice that each identify a problem that prevented the compiler from making a particular optimization due to not enough information and one or more suggestions as to how to provide additional information to the compiler. This list is generally filtered so that only a subset of missing information that has a high likelihood of leading to better performance is presented. Other missing information is not requested.
    Type: Grant
    Filed: December 12, 2002
    Date of Patent: June 26, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Elana D. Granston, Jonathan F. Humphreys, David H. Bartley
  • Transferring data directly between a processor and a spatial light modulator
    Patent number: 7236150
    Abstract: A method of loading data into a spatial light modulator, in which a software programmable processor stores binary values for the pixels of at least a portion of the (x,y) array of a spatial light modulator. The processor stores these values in its addressable memory, and accesses them by calculating bit positions in memory words (elements), as a function of x and y and other parameters of the processor and spatial light modulator. The same concepts may be applied to reading data out of a spatial light modulator.
    Type: Grant
    Filed: December 19, 2003
    Date of Patent: June 26, 2007
    Assignee: Texas Instruments Incorporated
    Inventor: Sue Hui
  • Semiconductive device fabricated using a substantially disassociated chlorohydrocarbon
    Publication number: 20070141853
    Abstract: The invention provides a method of fabricating a semiconductive device. In one aspect, the method comprises heating a gas mixture [225] comprising chlorohydrocarbon having a general formula of CxHxClx, wherein x=2, 3, or 4. The chlorohydrocarbon is heated in a first chamber 210 to a first temperature that substantially disassociates the chlorohydro-carbon. The substantially disassociated chlorohydrocarbon is used to form a film on a semiconductive substrate [235] that is located in a second chamber [215].
    Type: Application
    Filed: December 20, 2005
    Publication date: June 21, 2007
    Applicant: Texas Instruments Inc.
    Inventors: Jeff White, Jon Holt
  • Semiconductive device fabricated using subliming materials to form interlevel dielectrics
    Publication number: 20070141829
    Abstract: The invention provides a method of fabricating a semiconductive device [200]. In this embodiment, the method comprises depositing a hydrocarbon layer [294] over a semiconductive substrate, forming an interconnect structure [295, 297] within the hydrocarbon layer [294], and removing the hydrocarbon layer [294] by sublimation.
    Type: Application
    Filed: December 20, 2005
    Publication date: June 21, 2007
    Applicant: Texas Instruments, Incorporated
    Inventors: Deepak Ramappa, Richard Guldi, Asad Haider, Frank Poag