Patents Assigned to Texas Instruments
  • Patent number: 7224679
    Abstract: The present invention provides a system, method, and apparatus for providing improved quality of service in a wireless local area network transmission system, the network comprising at least two devices, the quality of services defined at least in part by data communicated by a first of the devices to other devices in the network through one or more quality of service parameters. In accordance with the present invention, a change indicator is initialized at the start of a monitoring period. Then, during the monitoring period, the stored parameters are monitored for changes in those of thee stored parameters that define the quality of service. When a change is detected, the change indicator is updated in response and other devices in the network are periodically notified of the current value of the change indicator. The other devices are operable to update locally stored quality of service parameters in response to detecting a change in the change indicator.
    Type: Grant
    Filed: May 10, 2003
    Date of Patent: May 29, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Eitan Solomon, Lior Ophir
  • Publication number: 20070115610
    Abstract: According to an aspect of the present invention, samples of an input signal are provided with reduced distortion, when the input signal is received from a lead terminal offering lead inductance on an input path. Such a feature is achieved by charging a energy storage element to a value proportional to the input signal using a portion of charging energy received through a path having less lead inductance compared to the path connecting the input signal to the energy storage element. Thus, the energy drawn through the lead impedance is reduced, thereby reducing the magnitude of the distortion caused.
    Type: Application
    Filed: November 16, 2006
    Publication date: May 24, 2007
    Applicant: Texas Instruments Incorporated
    Inventors: Sandeep Oswal, Visvesvaraya Pentakota, Abhaya Kumar
  • Publication number: 20070115059
    Abstract: an analog signal processing block with differential signal inputs and including a differential amplifier with differential inputs is disclosed which is configurable to operate either in a differential output mode or in a single-ended output mode without affecting the desired frequency and time characteristics as determined by the switched capacitor networks. The analog signal processing block includes a pair of switched capacitor networks each having one of the differential signal inputs, an input-sided terminal connected to one of the differential inputs of the differential amplifier and an output-sided terminal. The output-sided terminal of a first one of the switched capacitor networks is connected to an output of the differential amplifier.
    Type: Application
    Filed: October 30, 2006
    Publication date: May 24, 2007
    Applicant: Texas Instruments Deutschland G.m.b.H
    Inventor: Mikhail Ivanov
  • Patent number: 7221300
    Abstract: A system and method implement very high data rate baseband DACs suitable for wireless applications related to new standards (e.g. Ultra-Wide Band) using CMOS processes allowing an integrated solution with the deep-submicron CMOS digital baseband. A single CMOS block working at full speed is discarded in favor of several blocks, each working at a fraction of the original data rate.
    Type: Grant
    Filed: May 21, 2004
    Date of Patent: May 22, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Paul A. Fontaine, Ranjit Gharpurey, Anuj Batra, Jaiganesh Balakrishnan
  • Patent number: 7220606
    Abstract: A method for marking a semiconductor wafer 302 includes the steps of: providing a reticle 300 including liquid crystal pixels; positioning the semiconductor wafer in proximity to the reticle; directing radiation through a first plurality of the pixels onto a first location on the wafer; changing the relative positions of the semiconductor wafer and the reticle; and directing radiation through a second plurality of the pixels onto a second location on the wafer. The first plurality of pixels can be used to form a first mark and the second plurality of pixels can be used to form a second mark, wherein the second mark is different from the first mark. The marks can be made of a pattern of dots in order to save space. The pixels can be selected to form certain marks by using a computer 304 to turn on or off a transistor that may be associated with each pixel. Also described is a system for marking a semiconductor wafer.
    Type: Grant
    Filed: September 15, 2004
    Date of Patent: May 22, 2007
    Assignee: Texas Instruments Incorporated
    Inventor: Akira Matsunami
  • Patent number: 7221055
    Abstract: According to one embodiment of the invention, a method of die attach includes providing a chip, forming a heat conductive metal layer outwardly from a backside of the chip, and coupling the chip to a substrate. The heat conductive metal layer has a thickness of at least 0.5 mils.
    Type: Grant
    Filed: May 23, 2005
    Date of Patent: May 22, 2007
    Assignee: Texas Instruments Incorporated
    Inventor: Bernhard Lange
  • Patent number: 7221754
    Abstract: A method is provided for accomplishing asymmetric digital subscriber loop classification and the design of passive hybrid networks for each of the classes. The resulting hybrids are suitable for implementation in a switchable hybrid architecture.
    Type: Grant
    Filed: February 1, 2003
    Date of Patent: May 22, 2007
    Assignee: Texas Instruments Incorporated
    Inventor: Fernando A. Mujica
  • Patent number: 7222070
    Abstract: Linear predictive speech coding system with classification of frames and a hybrid coder using both waveform coding and parametric coding for different classes of frames. Phase alignment for a parametric coder aligns synthesized speech frames with adjacent waveform coder synthesized frames. Zero phase alignment of speech prior to waveform coding aligns synthesized speech frames of a waveform coder with frames synthesized with a parametric coder. Inter-frame interpolation of LP coefficients suppresses artifacts in resultant synthesized speech frames.
    Type: Grant
    Filed: September 22, 2000
    Date of Patent: May 22, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Jacek Stachurski, Alan V. McCree
  • Patent number: 7221498
    Abstract: Methods and apparatus for selectively updating memory cells of a memory cell array are provided. The memory cells of each row of the memory cell array are provided with a plurality of wordlines. Memory cells of the row are activated and updated by separated wordlines. In an application of display systems using memory cell arrays for controlling the pixels of the display system and pulse-width-modulation (PWM) technique for displaying grayscales, the pixels can be modulated by different PWM waveforms. The perceived dynamic-false-contouring artifacts are reduced thereby. In another application, the provision of multiple wordlines enables precise measurements of voltages maintained by memory cells of the memory cell array.
    Type: Grant
    Filed: November 12, 2004
    Date of Patent: May 22, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Peter W. Richards, Andrew Huibers
  • Patent number: 7220600
    Abstract: Methods (100) are provided for fabricating a ferroelectric capacitor structure including methods (128) for etching and cleaning patterned ferroelectric capacitor structures in a semiconductor device. The methods comprise etching (140, 200) portions of an upper electrode, etching (141, 201) ferroelectric material, and etching (142, 202) a lower electrode to define a patterned ferroelectric capacitor structure, and etching (143, 206) a portion of a lower electrode diffusion barrier structure. The methods further comprise ashing (144, 203) the patterned ferroelectric capacitor structure using a first ashing process, performing (145, 204) a wet clean process after the first ashing process, and ashing (146, 205) the patterned ferroelectric capacitor structure using a second ashing process directly after the wet clean process at a high temperature in an oxidizing ambient.
    Type: Grant
    Filed: December 17, 2004
    Date of Patent: May 22, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Scott R. Summerfelt, Lindsey H. Hall, Kezhakkedath R. Udayakumar, Theodore S. Moise, IV
  • Patent number: 7221190
    Abstract: A system and method is provided for extending the range of a common mode voltage of a differential comparator. In one embodiment, a differential comparator comprises an input stage with a negative voltage reference node, a first differential input coupled to a first differential pair transistor and operative to receive a first input signal, and a second differential input coupled to a second differential pair transistor and operative to receive a second input signal. The first input signal and the second input signal form a differential input signal. The differential comparator further comprises a common mode sensing circuit interconnected between the first differential input, the second differential input, and the negative voltage reference node. The common mode sensing circuit is operative to sense a common mode voltage of the differential input signal and set a voltage potential at the negative voltage reference node substantially equal to the sensed common mode voltage.
    Type: Grant
    Filed: March 14, 2005
    Date of Patent: May 22, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Anthony Sepehr Partow, Ricky Dale Jordanger
  • Publication number: 20070113059
    Abstract: A system and a method to identify a conditional branch instruction having a program counter and a target address, and increment a loop count each time the program counter and the target address equal a stored program counter and a target address. The system and method additionally includes assignment of a start loop pointer and an end loop pointer, based on an offset, when the loop count is equal to a threshold value, and capturing instructions for a loop, as defined by the start loop pointer and the end loop pointer, in an instruction queue.
    Type: Application
    Filed: November 14, 2005
    Publication date: May 17, 2007
    Applicant: Texas Instruments Incorporated
    Inventor: Thang Tran
  • Publication number: 20070110092
    Abstract: A device in a wireless LAN mesh network is disclosed. The device consists of a transceiver operable to send and receive a data packet in the mesh network and a component operable upon detection of a collision with a high priority data packet transmitted by the transceiver to add a small number of backoff times to a contention window associated with the high priority data packet and substantially randomly select a backoff time from the enlarged contention window, the component operable to promote retransmission of the high priority data packet during the selected backoff time after an interface spacing.
    Type: Application
    Filed: May 11, 2006
    Publication date: May 17, 2007
    Applicant: Texas Instruments Incorporated
    Inventors: Shantanu Kangude, Harshal Chhaya, Xiaolin Lu
  • Publication number: 20070113058
    Abstract: An apparatus comprising detection logic configured to detect a loop among a set of instructions, the loop comprising one or more instructions of a first type of instruction and a second type of instruction and a co-processor configured to execute the loop detected by the detection logic, the co-processor comprising an instruction queue. The apparatus further comprises fetch logic configured to fetch instructions; decode logic configured to determine instruction type; a processor configured to execute the loop detected by the detection logic, wherein the loop comprises one or more instructions of the first type of instruction, and an execution unit configured to execute the loop detected by the detection logic.
    Type: Application
    Filed: November 14, 2005
    Publication date: May 17, 2007
    Applicant: Texas Instruments Incorporated
    Inventors: Thang Tran, Muralidharan Chinnakonda
  • Patent number: 7218132
    Abstract: Methods and systems are provided for characterizing the negative temperature bias instability of a transistor. A bias voltage is maintained at a drain terminal of the transistor during a test period. A stress voltage is maintained at a gate terminal of the transistor during the test period, such that the stress voltage is applied concurrently with the bias voltage. At least one characteristic of the transistor is measured at periodic intervals during the stress period to determine a degradation of the at least one characteristic caused by the stress voltage until a termination event occurs.
    Type: Grant
    Filed: November 30, 2005
    Date of Patent: May 15, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Anand T. Krishnan, Srikanth Krishnan, Vijay Reddy, Cathy Chancellor
  • Patent number: 7218680
    Abstract: A desired bit sequence (x) can be communicated over a wireless communication link (15) by including the desired bit sequence in each of a plurality of transmissions over the wireless communication link. In response to each of the plurality of transmissions, a received bit sequence corresponding to the desired bit sequence can be produced at the receiving end. A determination of the desired bit sequence can be made based on the received bit sequences (r1–rN) and information (SNR1–SNRN, ?1–?N) indicative of communication quality associated with each of the plurality of transmissions.
    Type: Grant
    Filed: November 16, 2000
    Date of Patent: May 15, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Mohammed H. Nafie, Anand G. Dabak, Timothy M. Schmidl
  • Patent number: 7218692
    Abstract: The present invention provides an apparatus, system and method for removal of interference due to multi-path for multiple transmit antennas (hereinafter referred to as MTA-MPIC) for High Speed Downlink Packet Access (HSDPA) encoded for transmit diversity, such as Space-Time Transmit Diversity (STTD). For a single receive antenna, the signal is received (25) and each multi-path delayed signal is demodulated (21). The demodulation can include long code removal and despreading. Subsequently, each demodulated signal is received by the RAKE receiver (22) for determining the channel estimate and channel normalization for the total HSDPA signal, and for computing space-time decoding for the HSDPA signal. Following the space-time decoding, a data decision is made (23). Next, reconstructed interference signals are generated (24) and combined with the received signal (25). For other user signals, an interference estimate is made from the despreader (322) outputs without applying the RAKE/space-time coding operations.
    Type: Grant
    Filed: June 17, 2002
    Date of Patent: May 15, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Anand G. Dabak, Eko N. Onggosanusi, Timothy M. Schmidl, Aris Papasakellariou
  • Patent number: 7217322
    Abstract: A method of fabricating an epitaxial silicon-germanium layer for an integrated semiconductor device comprises the step of depositing an arsenic in-situ doped silicon-germanium layer, wherein arsenic and germanium are introduced subsequently into different regions of said silicon-germanium layer during deposition of said silicon-germanium layer. By separating arsenic from germanium any interaction between arsenic and germanium is avoided during deposition thereby allowing fabricating silicon-germanium layers with reproducible doping profiles.
    Type: Grant
    Filed: September 2, 2004
    Date of Patent: May 15, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Jeffrey A. Babcock, Scott Balster, Alfred Haeusler, Angelo Pinto, Manfred Schiekofer, Philipp Steinmann, Badih El-Kareh
  • Patent number: 7218439
    Abstract: A method for increasing the resonant frequency of a torsional hinged device having a reduced attaching area between the torsional hinges and the supporting anchors. The resonant frequency is increased by adding a material over the reduced area to stiffen the connection between the torsional hinges and the support anchors.
    Type: Grant
    Filed: September 16, 2005
    Date of Patent: May 15, 2007
    Assignee: Texas Instruments Incorporated
    Inventor: Andrew S Dewa
  • Patent number: 7218693
    Abstract: A method and apparatus for deriving the channel estimation within a packet based transmission system having a predetermined number of tones (N), wherein each channel has a channel order (L). A first method includes precomputing, from the long sequence (X) of a received signal, a channel estimation matrix (R?1) having a dimension of width and length equal to the channel order (L) and storing one fourth of the channel estimation matrix (R?1) since the channel estimation matrix (R?1) is centrosymmetric. Advantageously, precomputing and storing a fourth of the channel estimation matrix (R?1) saves time and complexity. In a second method, the bit-width requirement for fixed precision requirements regarding implementation in hardware is reduced wherein a channel estimation matrix (G) having dimension of width equal to the number of tones (N) and length equal to the channel order (L) is precomputed and stored.
    Type: Grant
    Filed: May 8, 2003
    Date of Patent: May 15, 2007
    Assignee: Texas Instruments Incorporated
    Inventor: Markos G. Troulis