Abstract: A process for producing an array of solid state radiation detectors includes depositing on a substrate one or more layers of silicon-based materials and then depositing a metal layer overlying silicon-based substance. The metal layer is formed into an array of metal layer regions, and then the metal layer is used as a mask to remove exposed adjacent silicon-based substance layers thereby forming an array of silicon-based substance layers that are aligned with the array of metal layers for forming an array of photosensitive sensing devices. The process of the present invention reduces the number of microlithography steps that are used in forming an array of layered amorphous silicon photosensitive devices.

Abstract: Generally, and in one form of the invention, an integrated circuit is disclosed for providing low-noise and high-power microwave operation comprising: an epitaxial material structure comprising a substrate 10, a low-noise channel layer 14, a low-noise buffer layer 16, a power channel layer 18, and a moderately doped wide bandgap layer 20; a first active region 24 comprising a first source contact 32 above the wide bandgap layer 22, a first drain contact 36 above the wide bandgap layer 22, wherein the first source contact 32 and the first drain contact 36 are alloyed and thereby driven into the material structure to make contact with the low-noise channel layer 14, and a first gate contact 28 to the low-noise buffer layer 16; and a second active region 26 comprising a second source contact 34 above the wide bandgap layer 22, a second drain contact 38 above the wide bandgap layer 22, wherein the second source contact 34 and the second drain contact 38 are alloyed and thereby driven into the material structure t

Abstract: A method for making a laser screen for a cathode-ray tube involves forming a partly transparent mirror of a material resistant to etching solutions on a polished side of a semiconductor member to cover a part of the surface area of the polished side of the semiconductor member surrounding an image forming area. A layer of the semiconductor member of a thickness of 20 to 50 .mu.m is etched off on this polished side to define a support surface surrounding the image forming area which is equally spaced from the outer surface of the partly transparent mirror. A transparent support member is cemented to the outer surface of the partly transparent mirror. The other side of the semiconductor member opposite to the support member is polished, and a reflecting mirror is formed on this surface.

Abstract: A pre-processed substrate structure for a semiconductor device. A subcollector layer is spaced apart from a substrate by a dielectric. A relatively small, lightly-doped epitaxial feed-through layer extends through the dielectric between the substrate and the subcollector. A transistor constructed over the subcollector has very low collector-to-substrate capacitance. A plurality of devices on a common substrate are electrically isolated from each other by channel stops formed in the substrate around each device.

Abstract: Process for the local passivation of a substrate by a hydrogenated amorphous carbon layer and process for producing thin film transistors on said passivated substrate. The local passivation process consists of producing photosensitive resin patterns (3) on the substrate (1), subjecting the structure obtained to a radio-frequency plasma essentially constituted by a hydrocarbon for thus depositing a hydrogenated amorphous carbon layer (6) on the structure and dissolving the resin patterns (3) in order to eliminate the amorphous carbon deposited on the resin, the amorphous carbon deposited on the substrate constituting the said passivation.

Abstract: A method of making a backside illuminated image includes forming a device on the frontside of thin device layer provided on an oxide layer which is mounted on a sacrificial substrate and bonding the front side of the device layer to a permanent silicon support substrate. Thereafter, the oxide layer and sacrificial layer are removed by chemical etching to expose the backside of the thin device layer.

Abstract: Various novel processes permit integrating thin film semiconductor materials and devices using lift off, alignment, and deposition onto a host substrate. As a result, three dimensional integrated circuits can be constructed. Three dimensional communication in an integrated circuit can be implemented via electromagnetic communication between emitters and detectors fabricated via the novel processes. Integrated circuit layers are transparent to the electromagnetic signals propagated from the emitter and received by the detector. Furthermore, arrays of optical detectors can be implemented to perform image processing with tremendous speed. Processing circuitry can be situated directly below the optical detectors to process in massive parallel signals from individual optical detectors.

Abstract: A method for generating platinum features on the surface of a substrate is disclosed. The method provides an inexpensive means for constructing small platinum features. The method utilizes a photoresist mask to define the platinum features. The problems associated with residue from the deposition of the photoresist mask are overcome by utilizing an etching step which removes any such residue. The etching step also allows the platinum features to be recessed into the substrate surface.

Abstract: The method includes only two masking levels. During the second masking, capacitative lines (LC) (dedicated or merged with the addressing lines) are defined which overlap the pixels so as to form the storage capacitors (Cs).Application for display on flat liquid crystal screens.

Abstract: This invention provides a bonded wafer of the n/n.sup.+ or p/p.sup.+ step junction or the SOI configuration possessing an outstanding getter effect by bonding two wafers thereby forming a n/n.sup.+ or p/p.sup.+ stage junction or a SOI configuration and, prior to the bonding, incorporating in one of the wafer surfaces an oxidation-induced stacking fault capable of producing a gettering effect. When a semiconductor device is produced by forming necessary components on the second semiconductor wafer surface side of the bonded wafer of this invention, therefore, the leak current across the pn junction of the semiconductor device is decreased, the life time of the carrier is improved, and the yield of the semiconductor device is notably enhanced without reference to the discrimination between the MOS type and the bipolar type.

Abstract: A process for fabricating a detector array in a layer of semiconductor material on one substrate and an integrated readout circuit in a layer of semiconductor material on a separate substrate in order to select semiconductor material for optimum performance of each structure, such as GaAs for the detector array and Si for the integrated readout circuit. The detector array layer is lifted off its substrate, laminated on the metallized surface of the integrated surface, etched with reticulating channels to the surface of the integrated circuit, and provided with interconnections between the detector array pixels and the integrated readout circuit through the channels. The adhesive material for the lamination is selected to be chemically stable to provide electrical and thermal insulation and to provide stress release between the two structures fabricated in semiconductor materials that may have different coefficients of thermal expansion.

Abstract: A BiCMOS method and device. The BiCMOS device achieves improved performance through the use of silicide contacts overlying doped polysilicon which extend fully up to and contact sidewall oxide formations. Silicide contacts in emitter regions and gate regions are separated from silicide contacts of base contacts and source and drain contacts only by the thickness of the sidewall oxides, which are adjacent the emitter region and gate regions.

Abstract: A high voltage MOS transistor includes a semiconductor substrate (1) of a first semiconductor type, a gate electrode (14) formed on the semiconductor substrate via a gate oxide layer (13), first and second diffusion regions (15, 16) formed in the semiconductor substrate on both sides of the gate electrode and being of a second semiconductor type opposite to the first semiconductor type, and an electrode (38) which is directly connected to the first diffusion region (15) and is made up of a conductor layer (49) including polysilicon. An impurity concentration of the conductor layer (49) including the polysilicon is higher than an impurity concentration of the first diffusion region (15).

Abstract: A process for supporting an image sensor wafer includes providing a support oxide layer on one surface of a support wafer and an etch resistant layer on the opposite surface. The support oxide layer is bonded to the image sensor oxide layer.

Abstract: A novel display screen structure and method of manufacturing such screens for use, for example, in large screen television displays. The process of the present invention is one which can be accomplished with no new materials, no critical geometric requirements such as critical separations and alignments and only low voltage drivers. The combination of these features results in a technology which can be easily scaled to large sizes to provide relatively low-cost large screens for televisions. An important step in a first embodiment of the present invention is the alignment of a large plurality of columnar-shaped light emitting diode slivers in an uncured optical epoxy by applying an electric field through a mixture of such slivers and epoxy and then curing the epoxy to effectively fix the light emitting diode slivers in that aligned configuration. In a second embodiment, the LED slivers are mixed with molten glass which is formed into elongated glass fibers.

Abstract: An insulated lead frame for a semiconductor packaged device and a method of manufacturing both the insulated lead frame and the semiconductor packaged device are disclosed. The insulated lead frame has a first plurality of lead fingers and a second plurality of lead fingers. It also has the face of a power supply bus lying between the pluralities of lead fingers. An insulator covers the face of the power supply bus. An example of an insulator is a cured liquid polyimide. In a semiconductor packaged device using a lead on chip lead frame, such as a dynamic random access memory, DRAM, wire bonding that connects the power supply busses of the lead frame may first occur and the liquid insulator may afterwards be applied to the power supply busses. Alternatively, by knowing where the wire bonds will bond to the power supply busses, the liquid insulator may be applied to the power supply busses before wire bonding occurs. The bonding spots on the power supply busses are not covered with the liquid insulator.

Abstract: A thin-film transistor in a semiconductor device is self-aligned and vertically oriented. In one form of the present invention, the semiconductor device (10) has a vertical wall trench (18) formed in a first dielectric layer (16) and having a predetermined depth. A first current electrode (26) is formed on a bottom surface of the trench while a second current electrode (28) overlies the first dielectric material, each current electrode preferably being formed of polysilicon. A channel region (30) connecting the first and second current electrodes lies along the vertical wall of the trench and has a length substantially equal to the predetermined depth. A control electrode (36) is located within the trench and is also preferably formed of polysilicon. The control electrode is electrically isolated from the first current electrode and the channel region by a second dielectric layer (32).

Abstract: A process for making a backside illuminated image sensor fabricated upon a thinned silicon layer bonded to a quartz wafer is described. A borosilicate glass (BSG) layer interposed between the thinned silicon device layer and quartz support serves as a doping source for the back-surface accumulating electrostatic potential and serves to minimize stress associated with the thermal expansion differences associated with quartz and silicon.

Abstract: A method of producing a semiconductor device of high integration density and high reliability with high yield, using self-alignment techniques, including forming a gate electrode on a semiconductor substrate of a first conductivity type with an insulating film arranged above and below it, forming a pair of first impurity regions of a second conductivity type mutually separated and self-aligned with the gate electrode in the substrate, forming a wall consisting of insulator on at least one side face of the gate electrode and the upper and lower insulating films, forming a second highly doped impurity region of second conductivity type at greater depth in the substrate than the first impurity region in a self-aligned manner with respect to the wall, forming an electrode layer connected to the second impurity region, with at least a portion of the electrode extending over the upper insulating film of the gate electrode, and selectively forming a wiring layer on the electrode layer.

Abstract: A method of manufacturing a transmitter optoelectronic integrated circuit (10) which comprises a double heterostructure optical emission device (11) and drive circuitry (16). The optical emission device (11) comprises a plurality of optical emission loci (21) distributed throughout an active layer (12) of the optical emission device (11). Drive circuit (16) comprises a plurality of first portions (17) and a second portion (18) wherein the plurality of first portions (17) are above the plurality of emission loci (21). Second portion (18) is integrated in a lateral orientation with respect to the plurality of first portions (17). The chemical composition of the plurality of first portions (17) are such that they are nonabsorbing to optical emissions from the optical emission device (11).