Patents Examined by Minh Trinh
  • Patent number: 7155815
    Abstract: A method for contacting printed conductors terminating at the edge of a circuit board with printed conductors of a MID component includes: on a panel which includes the circuit board, producing the printed conductors of the circuit board in a layout in which the printed conductors are extended past a partition line which defines the edge of the circuit board; providing the panel with through holes along the partition line in the region of the printed conductors; electroplating through the through holes; isolating the circuit board from the panel; and positioning the circuit board in relation to the MID component and soldering the printed conductors of the circuit board to the printed conductors of the MID component. Rear electrical contacting areas are provided on a back side of the panel near the partition line, and the printed conductors are connected to the rear electrical contacting areas via the through holes.
    Type: Grant
    Filed: June 3, 2004
    Date of Patent: January 2, 2007
    Assignee: Novar GmbH
    Inventors: Angelika Gernhardt, Thomas Goulet, Carsten Menzel, Waldemar Ollik
  • Patent number: 7155806
    Abstract: Method of producing superconducting cables by using cold plastic deformation operations only including the step of obtaining a bar-like semi-finished product of prefixed dimension through the steps of: forming round-section, mono- or multifilament, superconducting copper bars of relatively long length; assembling the bars about a cylindrical copper core of substantially the same length, using assembly templates, the templates having through holes arranged in a circle to support the bars, and a central through seat for supporting the core; tying the bars onto an outer lateral surface of the core; sliding onto one end of the bar/core assembly a number of metal supporting rings, while sliding the templates off the opposite end thereof; sliding a copper tube onto the bar/core assembly while cutting the ties in axial sequence and sliding off the supporting rings; and subjecting the assembly to a number of drawing operations.
    Type: Grant
    Filed: October 17, 2003
    Date of Patent: January 2, 2007
    Assignee: EMS-Europe Metalli Superconductors S.p.A.
    Inventor: Sergio Rossi
  • Patent number: 7152291
    Abstract: Improved method steps for terminating multilayer electronic components are disclosed. Monolithic components are formed with plated terminations whereby the need for typical thick-film termination stripes is eliminated or greatly simplified. Such termination technology eliminates many typical termination problems and enables a higher number of terminations with finer pitch, which may be especially beneficial on smaller electronic components. Electrode and dielectric layers are provided in an interleaved arrangement and selected portions of the electrode layers are exposed. Electrically isolated anchor tabs may optionally be provided and exposed in some embodiments. Termination material is then plated to the exposed portions of the electrode layers until exposed portions of selected such portions thereof are connected. A variety of different plating techniques and termination materials may be employed in the formation of the subject self-determining plated terminations.
    Type: Grant
    Filed: April 8, 2003
    Date of Patent: December 26, 2006
    Assignee: AVX Corporation
    Inventors: Andrew P. Ritter, Robert Heistand, II, John L. Galvagni, Sriram Dattaguru
  • Patent number: 7152309
    Abstract: The pair of press-connecting pliers mainly have a first handle provided with a press-connecting die block, the press-connecting die block at least has two set of press-connecting sections allowing diversion and position changing, while the second handle can drive a press-connecting head to move toward the press-connecting die block to press connect a set of wire and pin in cooperation with the two set of press-connecting sections capable of being opposite to the press-connecting head after diversion; and by the functions of diversion and position changing of the two set of press-connecting sections, the press-connecting pliers at least can do press connecting of pins and wires of two specifications.
    Type: Grant
    Filed: November 3, 2003
    Date of Patent: December 26, 2006
    Assignee: Hanlong Industrial Co., Ltd.
    Inventor: Chien-Chou Liao
  • Patent number: 7152312
    Abstract: A method for transmitting high-frequency current through a substrate is provided. The method comprises receiving the high-frequency current at a via passing through at least one conductive plane disposed within the substrate and coupled to the via with one or more tabs which span a gap between the at least one conductive plane and the via; and directing the high-frequency current along an uninterrupted path substantially on a surface of the via thereby bypassing the at least one conductive plane by conducting at least a portion of the high-frequency current between the one or more tabs.
    Type: Grant
    Filed: February 11, 2002
    Date of Patent: December 26, 2006
    Assignee: ADC DSL Systems, Inc.
    Inventor: Gary Gottlieb
  • Patent number: 7152310
    Abstract: A crimping installation with first and second crimping stations includes at each station a device platform with device stations and a crimp press. A cable is advanced by a tape drive whereby the leading cable end is taken over by a first grip arm arranged on a first swivel arm, which supplies the stripped cable end to the first crimping station. After the leading cable end is provided with a crimping contact, a first swivel arm moves backwards into an axis of the tape drive. Then the tape drive continues to advance the cable until the desired length of a cable section is reached. A separation and a stripping station separates the cable section from the cable and removes the insulation at the cable ends. The lagging cable end of the cable section is taken over by a second grip arm arranged on a second swivel arm which supplies the lagging cable end to the second crimping station for assembly with a crimping contact.
    Type: Grant
    Filed: March 17, 2005
    Date of Patent: December 26, 2006
    Assignee: Komax Holding AG
    Inventor: Alois Conte
  • Patent number: 7150098
    Abstract: In a method for forming an electrical cable connector having a voltage detection test point, an insulative shield is first molded from a thermoplastic and a conductive voltage detection test point terminal is inserted within the plastic insulative shield. After the pre-assembled insulative plastic shield and test point terminal are positioned adjacent the opening of the conductive outer shield, and after the conductive outer shield and an internal conductor are positioned within a mold cavity, an inner insulative housing is molded within the conductive outer shield and around the internal conductor.
    Type: Grant
    Filed: October 13, 2004
    Date of Patent: December 19, 2006
    Assignee: Thomas & Betts International, Inc.
    Inventors: Alan Borgstrom, John Knight
  • Patent number: 7150767
    Abstract: A method of producing an electrode for use in the manufacture of electrolytic capacitors for implantable cardioverter defibrillators comprises first coating the foil with a photoresist, second, applying a holographic image to the photoresist, third, removing a portion of the photoresist to expose a portion of the foil and create a pattern of photoresist on the foil and etching the foil. Alternatively, the method comprises applying an oxide or metal layer to the exposed foil surface, removing the pattern of photoresist to create a pattern of oxide or metal and etching the foil. The patterns of photoresist, oxide or metal all retard or prevent etching of the foil where the foil surface is covered. This results in a pattern of unetched foil with the remaining area being heavily etched. The resulting patterns stop crack propagation through the etched portions to yield foils with high gain and improved strength.
    Type: Grant
    Filed: November 3, 2003
    Date of Patent: December 19, 2006
    Assignee: Pacesetter, Inc.
    Inventors: Clinton W. Schneider, R. Jason Hemphill, Katherine E. Sudduth, Thomas V. Graham, Thomas F. Strange
  • Patent number: 7150094
    Abstract: A voice coil and actuator yoke assembly is fabricated by deforming the coil to exactly fit the inner perimeter and thickness of the yoke. The comb is placed in a tool that registers the comb with the yoke against the same flat surfaces that will squash the coil. The tooling is closed and placed in an appropriate loading device and the coils are squashed to the precise thickness of the yoke. This eliminates the in-plane tolerances of the current process for bonding a coil into the yoke. The coil perimeter expands as the coil is squashed to form an intimate press fit with the yoke. A low viscosity, high Tg adhesive is then applied to the coil. The low viscosity of the adhesive allows capillary action to fill the voids between the wires and bond the coil to the yoke.
    Type: Grant
    Filed: June 24, 2004
    Date of Patent: December 19, 2006
    Assignee: Hitachi Global Storage Technologies Netherlands, B.V.
    Inventor: A. David Erpelding
  • Patent number: 7146708
    Abstract: A method of making composite electric machine rotor assembly of a desired magnetic pattern. Magnetic segments and non-magnetic segments are separately formed to green strength, and then arranged adjacent to each other in a desired magnetic pattern. A small amount of powder material is added in-between the segments, and the whole assembly is then sintered to form a sinterbonded composite component of high structural integrity.
    Type: Grant
    Filed: September 9, 2004
    Date of Patent: December 12, 2006
    Assignee: Delphi Technologies, Inc.
    Inventors: Frederick B. Reiter, Jr., Tom L. Stuart
  • Patent number: 7146711
    Abstract: A method for forming a planar GMR read-head having a narrow read gap, a narrow track-width and being well insulated from its lower shield. The method requires the formation of a planarized bottom magnetic shield in which concave regions, symmetrically disposed about a track-width region, are filled with a layer of dielectric to provide added insulation. The dielectric filled shield is planarized and an additional planar dielectric layer, a thin planar GMR sensor layer and a planar PMGI layer of uniform thickness is formed on it. A layer of photoresist is deposited on the PMGI layer and a bi-layer lift-off stencil of uniform height above the GMR layer and symmetric overhang regions is formed. The uniformity of the lift-off stencil, which is a result of the planarity of the layers on which it is formed, allows the deposition of conductive lead and biasing layers with controlled overspread.
    Type: Grant
    Filed: December 13, 2002
    Date of Patent: December 12, 2006
    Assignee: Headway Technologies, Inc.
    Inventors: Cherng Chyi Han, Mao-Min Chen, Jiun-Ting Lee
  • Patent number: 7146720
    Abstract: A method for forming a fiducial and pin one indicator that utilizes a single solder resist opening in a die mounting substrate to perform the combined functions of prior art fiducials and pin one indicators. Methods of fabricating a carrier substrate using the combination pin one indicator and alignment fiducial are also described.
    Type: Grant
    Filed: October 31, 2002
    Date of Patent: December 12, 2006
    Assignee: Micron Technology, Inc.
    Inventors: Brad D. Rumsey, Matt E. Schwab
  • Patent number: 7146709
    Abstract: A superconducting material useful for forming electrolytic devices is made by establishing multiple niobium or tantalum components in a primary billet of a ductile material; working the primary billet through a series of reduction steps to form the niobium or tantalum components into elongated elements; cutting and restacking the resulting elongated elements with a porous confining layer to form a secondary billet, working the secondary billet through a series of reduction steps including twisting and final rolling to thin ribbon cross-sections with greater than 5:1 Aspect Ratios; cutting the resulting elongated billet into sections; and leaching the core and sheath at least in part.
    Type: Grant
    Filed: December 16, 2003
    Date of Patent: December 12, 2006
    Assignee: Composite Materials Technology, Inc.
    Inventor: James Wong
  • Patent number: 7143507
    Abstract: A magnetic field generator comprises a pair of plate yokes connected by a column yoke. The pair of plate yokes has a pair of opposed surfaces each provided with a permanent magnet including a plurality of neodymium magnets. In a method in which the neodymium magnets are demagnetized and adhesive is ground, the magnetic field generator is heated to 200° C.˜350° C. After the neodymium magnets are demagnetized, the adhesive is removed and the neodymium magnets are removed and collected from the magnetic field generator. In a method in which the adhesive is carbonized, the magnetic field generator is heated to 350° C.˜1000° C. After carbonizing the adhesive, the neodymium magnets are removed and collected. Surfaces of the collected neodymium magnets are polished and the neodymium magnets are reused. Further, the collected neodymium magnets are re-aged and reused.
    Type: Grant
    Filed: March 31, 2006
    Date of Patent: December 5, 2006
    Assignee: Neomax Co., Ltd.
    Inventors: Masaaki Aoki, Shigeo Hashimoto
  • Patent number: 7140101
    Abstract: A method for fabricating an anisotropic conductive substrate is disclosed. A back holder has metal pins on a surface thereof. A liquid compound is formed on the surface of the back holder with metal pins. The liquid compound is pressed to deform the metal pins into electrodes in the liquid compound. The thickness between upper surface and lower surface of the liquid compound is between 25 ?m and 250 ?m. The electrodes have upper ends and lower ends exposed from upper surface and lower surface of the liquid compound to provide electrical contact of anisotropic conduction.
    Type: Grant
    Filed: September 29, 2003
    Date of Patent: November 28, 2006
    Assignees: ChipMOS Technologies (Bermuda) Ltd., ChipMOS Technologies Inc.
    Inventors: Shih-Jye Cheng, An-Hong Liu, Yeong-Her Wang, Yuan-Ping Tseng, Yao-Jung Lee
  • Patent number: 7137193
    Abstract: Methods for fabricating semiconductor device components include use of programmed material consolidation processes to form the substrates or conductive elements thereof. The features that are formed by such processes may include multiple adjacent, mutually adhered regions. A machine vision system may be used so that the programmed material consolidation system may recognize the position, orientation, and features of a semiconductor device assembly, semiconductor die, or other substrate on which an element is to be fabricated.
    Type: Grant
    Filed: July 20, 2004
    Date of Patent: November 21, 2006
    Assignee: Micron Technology, Inc.
    Inventor: Vernon M. Williams
  • Patent number: 7134181
    Abstract: A superfine multi-core Nb3Al superconductive wire is produced by getting a Nb3Al superconductive wire ready which was obtained by subjecting a precursor wire having a superfine multi-core structure in which a plurality of Nb/Al complex cores are embedded in Nb, Ta, a Nb based dilute alloy, or a Ta based dilute alloy as the matrix to a rapid heating and quenching treatment comprising rapidly heating to a temperature range near 2,000° C. in 2 seconds, (A) coating the Nb3Al superconductive wire with Cu or Ag as the stabilizing material; then (B) subjecting to a hot isostatic press (HIP) process for 10 minutes or more in a inert gas environment with a pressure of 40 atmospheres or more; and then (C) subjecting heat treatment for 1–200 hours in temperature range of 680–850° C.
    Type: Grant
    Filed: December 25, 2003
    Date of Patent: November 14, 2006
    Assignee: National Institute for Materials Science
    Inventors: Kiyoshi Inoue, Akihiro Kikuchi, Yasuo Iijima, Takao Takeuchi
  • Patent number: 7134195
    Abstract: A method of production of a multilayer circuit board comprised of a multilayer structure circuit formed by a plurality of interconnect layers and insulation layers stacked together and a semiconductor chip included therein, including the steps of placing a semiconductor chip having a polished back surface, with its active surface facing downward, on an already formed lower interconnect layer and forming an insulation layer over the layer on which the semiconductor chip has been placed, the method further including the step of treating the polished back surface of the semiconductor chip to improve its bondability with the insulation layer before the step for formation of the insulation layer.
    Type: Grant
    Filed: March 10, 2004
    Date of Patent: November 14, 2006
    Assignee: Shinko Electric Indutries Co., Ltd.
    Inventors: Masahiro Sunohara, Kei Murayama, Mitsutoshi Higashi
  • Patent number: 7131192
    Abstract: This invention is a method of manufacturing printed circuit boards using a contact block packaging to provide and support electrical contact blocks relative to a printed circuit board panel. The contact block packaging is situated adjacent to the printed circuit board panel, so that electrical contact blocks of the contact block packaging are aligned with circuit boards of the printed circuit board panel, but breakaway stems supporting the electrical contact blocks are offset from webbing of the printed circuit board panel. The electrical contact blocks are then soldered to the printed circuit boards. Thereafter, the breakaway stems of the contact block packaging and the webs of the printed circuit board panel are broken, so that the electronic contact blocks are decoupled from the rest of the contact block packaging and the printed circuit boards are decoupled from the rest of the printed circuit board panel.
    Type: Grant
    Filed: June 5, 2004
    Date of Patent: November 7, 2006
    Assignee: Motorola, Inc.
    Inventor: Robert Stanford
  • Patent number: 7127805
    Abstract: A system and apparatus are described for a flexible tape constructed of a material suitable to convey electronic devices through an entire manufacturing process without removing the electronic packages from the tape. According to one embodiment, part receiving areas are located within the tape. Each part receiving area is suitable to hold an electronic device. A retention channel encompasses each part receiving area. The retention channel extends substantially an entire length along each edge of each part receiving area. The retention channel comprises an upper tab and a lower tab wherein the upper tab is flush with an upper surface of the flexible tape and extends into the part receiving area and the lower tab extends below a lower surface of the flexible tape and into the part receiving area.
    Type: Grant
    Filed: November 20, 2002
    Date of Patent: October 31, 2006
    Assignee: Intel Corporation
    Inventor: Jeffrey Watson