Abstract: The present invention is a field effect transistor having a strained semiconductor substrate and Schottky-barrier source and drain electrodes, and a method for making the transistor. The bulk charge carrier transport characteristic of the Schottky barrier field effect transistor minimizes carrier surface scattering, which enables the strained substrate to provide improved power and speed performance characteristics in this device, as compared to conventional devices.

Abstract: Titanium-containing films exhibiting excellent uniformity and step coverage are deposited on semiconductor wafers in a cold wall reactor which has been modified to discharge plasma into the reaction chamber. Titanium tetrabromide, titanium tetraiodide, or titanium tetrachloride, along with hydrogen, enter the reaction chamber and come in contact with a heated semiconductor wafer, thereby depositing a thin titanium-containing film on the wafer's surface. Step coverage and deposition rate are enhanced by the presence of the plasma. The use of titanium tetrabromide or titanium tetraiodide instead of titanium tetrachloride also increases the deposition rate and allows for a lower reaction temperature. Titanium silicide and titanium nitride can also be deposited by this method by varying the gas incorporated with the titanium precursors.

Abstract: A method for forming a wafer package includes forming a die structure, wherein the die structure includes a first wafer, a device mounted on the first wafer, a second wafer mounted atop the first wafer with a first seal ring around the device and a second seal ring around a via contact. The method further includes forming a trench in the second wafer around the first seal ring, filling the trench and the via contact with a sealing agent, patterning a topside of the second wafer to removed the excessive sealing agent and to expose a contact pad of the via contact, and singulating a die around the first seal ring.

Abstract: A method of forming sub-lithographic sized contact holes in semiconductor material, which includes forming layers of etch mask materials, and forming intersecting first and second trenches in the etch mask layers, where through-holes are formed completely through the etch mask layers only where the first and second trenches intersect. The first and second trenches are made by the formation and subsequent removal of very thin vertical layers of material. The width dimensions of the trenches, and therefore of the through-holes, are sub-lithographic because they are dictated by the thickness of the thin vertical layers of material, and not by conventional photo lithographic processes used to form those vertical layers of material. The sub-lithographic through-holes are then used to etch sub-lithographic sized contact holes in underlying semiconductor materials.

Abstract: Methods are disclosed for manufacturing semiconductor devices with silicide metal gates, wherein a single-step anneal is used to react a metal such as cobalt or nickel with substantially all of a polysilicon gate structure while source/drain regions are covered. A second phase conductive metal silicide is formed consuming substantially all of the polysilicon and providing a substantially uniform work function at the silicide/gate oxide interface.

Abstract: Disclosed are a liquid crystal display device and a method for manufacturing the same, in which wirings connected between pads and an integrated circuit is protected from being corroded. A pixel array is formed on a display region of a substrate. A plurality of pads are formed on a non-display region of the substrate. An integrated circuit is formed on the non-display region of the substrate and connected to the pads to generate a signal for operating the pixel array. Conductive barrier layers separated from each of the pads are formed on peripheral portions of the pads connected to the integrated circuit. The conductive barrier layers have electric potential equivalent to that of each of the pads in accordance with internal connections of the integrated circuit. When bumps of the integrated circuit and the pads are attached to each other, the conductive barrier layers prevent the pads and the wirings connected to the pads from being corroded.

Abstract: A method is disclosed for removing liquids from a semiconductor substrate by contacting the liquid on the substrate with a liquid which attracts the liquid on the substrate, separating the liquids from the substrate, and inducing a phase transition in a layer on the substrate. In particular, the method is applicable to removing water from a water-containing layer on the substrate by contacting the layer with a hygroscopic liquid. Trenches on a substrate can be isolated by filling the trenches with a water-containing gel formed by reacting silane and hydrogen peroxide. The gel is contacted with sulfuric acid to remove a portion of the water from the gel before annealing to form silica in the trenches. Unlike filled trenches formed by conventional technology, there are no voids in the bottom of the trenches. The method is also applicable to forming dielectric layers which cover metal lines, low-dielectric layers, and interlayer dielectric layers.

Abstract: A method of treating a silicon surface of a substrate that includes heating the substrate in a process chamber to a temperature, exposing a first area adjacent to the silicon surface to a first gas mixture comprising an etchant, a silicon source gas, and a carrier, exposing a second area adjacent to the silicon surface to a second gas mixture, wherein the second gas mixture is different from the first gas mixture.

Abstract: A method for forming an epitaxial layer involves depositing a buffer layer on a substrate by a first deposition process, followed by deposition of an epitaxial layer by a second deposition process. By using such a dual process, the first and second deposition processes can be optimized, with respect to performance, growth rate, and cost, for different materials of each layer. A semiconductor heterostructure prepared by a dual deposition process includes a buffer layer formed on a substrate by MOCVD, and an epitaxial layer formed on the buffer layer, the epitaxial layer deposited by hydride vapor-phase deposition.

Abstract: A structure and method of making an NPN heterojunction bipolar transistor (100) includes a semiconductor substrate (11) with a first region (82) containing a dopant (86) for forming a base region of the transistor. A second region (84) adjacent to the first region is used to form an emitter region of the transistor. An interstitial trapping material (81) reduces diffusion of dopants in the base region during subsequent thermal processing.

Abstract: A semiconductor device comprises a first conductor formed inside or on the top surface of a semiconductor substrate; an insulating film formed on the top surface of said semiconductor substrate or on the top surface of said first conductor; contact holes penetrating said insulating layer to reach said first conductor; a second conductor filled inside said contact holes and electrically connected to said first conductor; and an interconnection extending across contact regions on a top surface region of said insulating layer where said contact holes are formed respectively, and having opposite sides at least one of which is in contact with said second conductor inside said contact regions.

Abstract: The semiconductor device includes: a conducting layer including: a channel region; a source region and a drain region sandwiching the channel region; and a body region connected to the channel region and being adjacent to the source region and the drain region; a gate electrode formed above the channel region interposing a gate insulation film therebetween; a dummy electrode formed on the body region near the interface between at least the drain region and the body region, and electrically insulated with the gate electrode; and a body contact region formed in the body region except a region where the dummy electrode is formed. The gate electrode and the dummy electrode are electrically insulated with each other, whereby the semiconductor device having body contacts can have a gate capacitance much decreased. Accordingly, deterioration of the speed performance of the transistors can be suppressed.

Abstract: A method for moving resist stripper across the surface of a semiconductor substrate. The method includes applying a wet chemical resist stripper, such as an organic or oxidizing wet chemical resist stripper, to at least a portion of a photomask positioned over the semiconductor substrate. A carrier fluid, such as a gas, is then directed toward the semiconductor substrate so as to move the resist stripper across the substrate. The carrier fluid may be directed toward the substrate as the resist stripper is being applied thereto or following application of the resist stripper. A system for effecting the method is also disclosed.

Abstract: An apparatus for and a method of heat-treating a wafer for use in producing a semiconductor device ensures a desired distribution of surface temperatures across the wafer. Spacers are used to space the wafer above a heat transfer plate. The spacers can be used to adjust the spacing and inclination of the wafer relative to the heat transfer plate by predetermined amounts determined in advance to produce the desired distribution of surface temperatures across the wafer during heat-treatment. With the present invention, wafers can be heat-treated during production using a plurality of bake units disposed in parallel because each of the bake units can be precisely adjusted using the spacers to produce surface temperature distributions similar to a standard surface temperature distribution. Accordingly, the productivity of the semiconductor manufacturing process can be markedly enhanced.

Abstract: A semiconductor device package interposer including a receptacle extending substantially therethrough. Methods for assembling the interposer with one or more semiconductor devices are also disclosed. A film may be secured to a bottom surface of the interposer so as to at least partially cover a bottom end of the receptacle. One or more semiconductor devices are positioned within the receptacle, on the film. Each semiconductor device within the receptacle may then be electrically connected to the interposer. An encapsulant material, which is introduced into the receptacle, extends at least between portions of the outer periphery of each semiconductor device within the receptacle and a peripheral edge of the receptacle. Upon curing, setting, or hardening, the encapsulant material retains each semiconductor device within the receptacle and maintains a lateral position of each semiconductor device with respect to the interposer. Semiconductor device packages and multi-chip modules are also disclosed.

Abstract: A surface-emitting semiconductor laser device having reduced device resistance, a method for fabricating the device and a surface-emitting semiconductor laser array employing the device are provided. The laser device comprises a lower reflector layer structure and an upper reflector layer structure, formed on a p-type semiconductor substrate. An etching blocking layer, a current confinement layer, and an active layer are formed in that order from below between the lower and upper reflector layer structures. The portion over the etching blocking layer is formed into a mesa shape.

Abstract: A method of manufacturing a semiconductor device is obtained which is capable of evading generation of a short circuit between wirings in an upper wiring layer even if a part of an upper surface of an FSG film is exposed by variations in a production step. After a USG film (4) is deposited to a thickness of 1 &mgr;m over an entire surface of an FSG film (3), the USG film (4) is polished and removed by a thickness of 900 nm from an upper surface thereof by the CMP method. At this time, a part of an upper surface of the FSG film (3) is exposed by variations in a production step. Next, the surface of the interlayer dielectric film (50) is cleaned with a cleaning liquid whose etching rate to the FSG film (3) and etching rate to the USG film (5) are substantially the same. Such a cleaning liquid may be, for example, an ammonia hydrogen peroxide mixture of NH4OH:H2O2:H2O=1:1:20. The structure shown in FIG.

Abstract: A method of fabrication used for semiconductor integrated circuit devices to define a thin copper fuse at a top via opening, in a partial etch, dual damascene integration scheme, efficiently reducing top metal thickness in a fusible link, for the purpose of laser ablation. Some advantages of the method are: (a) avoids copper fuse contact to low dielectric material, which is subject to the thermal shock of laser ablation, (b) increases insulating material thickness over the fuse using better thickness control, and most importantly, (c) reduces the copper fuse thickness, for easy laser ablation of the copper fuse, and finally, (d) uses USG, undoped silicate glass to avoid direct contact with low dielectric constant materials.

Abstract: The present invention is a film forming method of forming a film of a treatment solution on the front face of a substrate in a treatment chamber including the steps of: supplying the treatment solution to the substrate mounted on a holding member in the treatment chamber in states of gas being supplied into the treatment chamber and of an atmosphere in the treatment chamber being exhausted; and measuring the temperature of the front face of the substrate before the supply of the treatment solution. The measurement of the temperature of the front face of the substrate before the supply of the treatment solution enables the check of the temperature of the front face of the substrate and the temperature distribution. Then, the measured result is compared with a previously obtained ideal temperature distribution for the formation of a film with a uniform thickness, thereby predicting the film thickness of the film which will be formed in the following processing.

Abstract: A method of fabricating a film of active devices is provided. First damaged regions are formed, in a substrate, underneath first areas of the substrate where active devices are to be formed. Active devices are formed onto the first areas. Second damaged regions are formed, in the substrate, between the first damaged regions. The film is caused to detach from a rest of the substrate at a location where the first and second damaged regions are formed.