Patents by Inventor Chang-An Hsieh

Chang-An Hsieh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8198118
    Abstract: A mask and method for forming the same including carrying out a photolithographic patterning process the method including providing a substantially light transparent portion; forming a substantially light shielding layer disposed over the substantially light transparent portion; forming at least one barrier layer disposed over the substantially light shielding layer; forming a resist layer disposed over the at least one barrier layer; patterning the resist layer for producing a circuitry pattern; and, carrying out an etching process according to the circuitry pattern to expose a portion of the substantially light transparent portion to form a mask.
    Type: Grant
    Filed: October 31, 2006
    Date of Patent: June 12, 2012
    Assignee: Taiwan Semiconductor Manufacturing Co.
    Inventors: Ken Wu, Hung-Chang Hsieh, Chang-Cheng Hung, Luke Hsu, Ren-Guey Hsieh, Hsin-Chang Lee, Chia-Jen Chen
  • Publication number: 20120128169
    Abstract: An earphone plug with a mode switching function is presented. The earphone plug includes a terminal and a switching device. The terminal has a plurality of electrodes to transmit signals. The switching device is combined with the terminal, and is capable of switching between a first mode and a second mode, and part of the electrodes of the terminal are electrically connected together, so as to achieve mode switching to perform processing on different transmission signals.
    Type: Application
    Filed: November 18, 2010
    Publication date: May 24, 2012
    Inventors: Chiu-Yun Tung, Fang-Chang Hsieh, Yuan-Hsing Wu, Chiung-Wen Yeh
  • Patent number: 8175106
    Abstract: The present invention applies management frame defined in IEEE 802.11 standard to a wireless distribution system (WDS) mode by adding an information element (IE) into the management frame, which enables any access point (AP) in WDS to maintain IE based on its own setting and state, then send IE via the management frame for providing state of the AP under WDS mode, determine whether a physical link (i.e., a wireless link between APs) should be established therewith based on received IE, and maintain the established physical link through the wireless management frame in a real time manner. Thus, the existence and necessity of the physical link between different APs in WDS can be determined correctly.
    Type: Grant
    Filed: May 4, 2010
    Date of Patent: May 8, 2012
    Assignee: Alpha Networks Inc.
    Inventors: Ming-Wang Guo, Jen-Sheng Huang, Chun-Fu Wang, Ying-Yung Chen, Shang-I Huang, Yao-Chang Hsieh, Yi-Hsien Cho
  • Publication number: 20120082940
    Abstract: Provided is a non-transitory computer readable medium including instructions to generate a level sensor map and create a compensation map from the level sensor map. The level sensor map includes a first determination of a first height above a reference plane of a feature disposed on a semiconductor substrate, and a second determination of a second height above the reference plane of a second feature disposed on a semiconductor substrate. The first and second feature are in a single exposure field. The compensation map includes a determination of at least one parameter to be used during exposure of a single field during an exposure process for the semiconductor substrate.
    Type: Application
    Filed: December 14, 2011
    Publication date: April 5, 2012
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd., ("TSMC")
    Inventors: Vincent Yu, Hsien-Cheng Wang, Hung-Chang Hsieh
  • Patent number: 8142608
    Abstract: An atmospheric pressure plasma reactor includes a high-voltage electrode, a common grounded electrode, a bias electrode and at least one dielectric layer. The high-voltage electrode is connected to a high-voltage power supply. The common grounded electrode is used with the high-voltage electrode to discharge and therefore produce planar atmospheric plasma from reactive gas. The bias electrode is used to generate bias for attracting the ions of the planar atmospheric pressure plasma. The dielectric layer is used to suppress undesirable arc discharge during the discharging.
    Type: Grant
    Filed: September 11, 2007
    Date of Patent: March 27, 2012
    Assignee: Atomic Energy Council—Institute of Nuclear Energy Research
    Inventors: Chi-fong Ai, Mien-Win Wu, Cheng-Chang Hsieh
  • Publication number: 20120069241
    Abstract: A display includes a display panel and an image capture apparatus. The display panel has a display region, a peripheral region surrounding the display region, and a through hole located in the peripheral region. The image capture apparatus is assembled to the display panel. The image capture apparatus includes a signal transmission device and an image capture device located in the through hole, and the image capture device is connected to the signal transmission device.
    Type: Application
    Filed: December 17, 2010
    Publication date: March 22, 2012
    Applicant: AU OPTRONICS CORPORATION
    Inventors: Yi-Hau Shiau, Wen-Chang Hsieh
  • Patent number: 8098364
    Abstract: Provided is an exposure apparatus including a variable focusing device. The variable focusing device may include a transparent membrane that may be deformed in the presence of an electric field. The deformation of the transparent membrane may allow the focus length of a radiation beam to be modified. In an embodiment, the variable focusing device may be modulated such that a radiation beam having a first focus length is provided for a first position on an exposure target and a radiation beam having a second focus length is provided for a second position on the exposure target. A method and computer-readable medium are also provided.
    Type: Grant
    Filed: October 19, 2007
    Date of Patent: January 17, 2012
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Vinvent Yu, Hsien-Cheng Wang, Hung-Chang Hsieh
  • Patent number: 8087320
    Abstract: A special path generating device includes a base, a first axis slide assembly, a second axis slide assembly, a working portion, a driving portion, a first cam and a second cam. This first axis slide assembly includes a first bar and a first slide. The second axis slide assembly includes a second bar and a second slide. This working portion is mounted on the second slide that has two contacting portions. The driving portion is mounted on the base. When the driving portion drives the driving shaft rotating, the first cam and the second cam rotate accordingly and makes the working portion generating a special path. It can generate a constant-speed circular movement. It is easy to control. In addition, its volume is small.
    Type: Grant
    Filed: August 14, 2008
    Date of Patent: January 3, 2012
    Assignee: National Formosa University
    Inventors: Long-Chang Hsieh, Yao-Lin Peng
  • Publication number: 20110275477
    Abstract: A planetary gear speed reducer includes a gear bracket having a center hole and first, second and third locating portions arranged in parallel along the center hole, a sun gear mounted in the center hole of the gear bracket, first gears rotatably mounted in between the first and second locating portions of the gear bracket and meshed with the sun gear, second gears rotatably mounted in between the second and third locating portions of the gear bracket and meshed with the sun gear, and two annular gears respectively meshed with the first gears and the second gears. Enabling the two annular gears to mesh with the first and second gears respectively avoids installation inconvenience due to phase difference between the first and second gears and eliminates interference during rotation of the two annular gears. By means of changing the number of teeth of each gear, the planetary gear speed reducer can provide a low, medium or high reduction ratio.
    Type: Application
    Filed: July 21, 2010
    Publication date: November 10, 2011
    Applicant: NATIONAL FORMOSA UNIVERSITY
    Inventors: Long-Chang Hsieh, An-Chen Lee, Tzu-Hsia Chen, Hsiu-Chen Tang
  • Publication number: 20110254252
    Abstract: A folding bicycle with a telescopic rod includes a bicycle body, a folding switch and the telescopic rod. The bicycle body includes front and rear frames that are foldable against each other. The telescopic rod has two ends respectively and pivotally connected to the front and rear frames, and has an engaging position thereof. The folding switch is disposed on a lateral side of the bicycle body to fix the front and rear frames together or release from each other. When the bicycle body is unfolded, the telescopic rod is driven to extend, and the folding switch fixes the front and rear frames together. When the bicycle body is folded in half, the telescopic rod is driven to retract and fixed in the engaging position. Thus, the present invention has advantages of enhanced rigidity of the bicycle body, easily movability, auxiliary positioning, simply rapid folding and lower costs.
    Type: Application
    Filed: August 5, 2010
    Publication date: October 20, 2011
    Applicant: National Formosa University
    Inventors: LONG-CHANG HSIEH, Tzu-Hsia Chen, Chien-Lin Chen
  • Publication number: 20110241179
    Abstract: The present disclosure provides a method of making an integrated circuit (IC) device. The method includes forming a first IC feature and a second IC feature in a semiconductor substrate, the first and second IC features being spaced from each other and separated by a scribe region; forming, in the semiconductor substrate, a doped routing feature at least partially within the scribe region and configured to connect the first and second IC features; forming a multilayer interconnect (MLI) structure and an interlayer dielectric (ILD) on the semiconductor substrate, wherein the MLI is configured to be absent within the scribe region; and etching the ILD and the semiconductor substrate within the scribe region to form a scribe-line trench.
    Type: Application
    Filed: June 20, 2011
    Publication date: October 6, 2011
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ming-Chang Hsieh, Hung-Lin Chen, Hsiu-Mei Yu, Chin Kun Lan, Dong-Lung Lee
  • Patent number: 8010724
    Abstract: I2C/SMBus ladders and ladder enabled ICs (devices) to enable daisy-chained I2C/SMBus communication. The devices are particularly useful in monitoring and/or servicing high-voltage battery stacks and other voltage stacks. The devices are powered from a respective voltage increment in the voltage stack, and include level shifting circuitry so as to be operative with an input voltage up to the breakdown voltage of the level shifting circuitry. Various features are disclosed, including but not limited to a unique data line drive, capacitive coupling between devices in a daisy chain with line clamps for circuitry protection and capacitive coupling charge wiping, and clock stretching to accommodate chain latency.
    Type: Grant
    Filed: October 6, 2009
    Date of Patent: August 30, 2011
    Assignee: Maxim Integrated Products, Inc.
    Inventors: Jason Allen Wortham, Urs H. Mader, Yi-Chang Hsieh
  • Patent number: 7999910
    Abstract: The present disclosure provides a system and method for manufacturing a mask for semiconductor processing. In one example, the system includes at least one exposure unit configured to select a recipe for a later baking process in a post treatment unit, a buffer unit coupled to the exposure unit and configured to move the mask substrate from the exposure unit to the post treatment unit without exposing the mask substrate to the environment; and the post treatment unit coupled to the buffer unit and the exposure unit and configured to perform a baking process on the mask substrate using baking parameters associated with the recipe selected by the exposure unit.
    Type: Grant
    Filed: April 27, 2005
    Date of Patent: August 16, 2011
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Jen Chen, Hsin-Chang Lee, Sheng-Chi Chin, Hung Chang Hsieh, Burn Jeng Lin
  • Publication number: 20110192348
    Abstract: An RF hollow cathode plasma source consists of a vacuum chamber, a pipe, a hollow cathode, at least two compartments, a conduit and input electrodes. The pipe is inserted into the chamber for introducing working gas into the chamber. The hollow cathode is disposed in the chamber and formed with a large number of apertures. At least two compartments are located below the hollow cathode. Each of the compartments includes small apertures for uniformly spreading the working gas into the apertures of the hollow cathode. The conduit is disposed along two sides of the hollow cathode to circulate cooling water around the hollow cathode. The plural input power leads are arranged near the hollow cathode. The input power leads, the pipe and the conduits are connected to the hollow cathode though the electrically-insulated walls of the grounded vacuum chamber.
    Type: Application
    Filed: February 5, 2010
    Publication date: August 11, 2011
    Applicant: ATOMIC ENERGY COUNCIL-INSTITUTE OF NUCLEAR ENERGY RESEARCH
    Inventors: Ching-Pei Tseng, Cheng-Chang Hsieh, Chi-Fong Ai, Chia-Cheng Lee, Deng-Lain Lin
  • Patent number: 7972163
    Abstract: An electrical connector includes a plurality of pins, an isolation body and a latching mechanism. The isolation body includes a receiving part. The receiving part is arranged at a front edge of the isolation body and has a first engaging element. The latching mechanism has a second engaging element engaged with the first engaging element, so that the latching mechanism is fixed onto the isolation body.
    Type: Grant
    Filed: June 23, 2009
    Date of Patent: July 5, 2011
    Assignee: Delta Electronics, Inc.
    Inventors: Hung-Chuan Chen, Chin-Hsing Lin, Hung-Chang Hsieh
  • Patent number: 7968431
    Abstract: The present disclosure provides a method of making an integrated circuit (IC) device. The method includes forming a first IC feature and a second IC feature in a semiconductor substrate, the first and second IC features being spaced from each other and separated by a scribe region; forming, in the semiconductor substrate, a doped routing feature at least partially within the scribe region and configured to connect the first and second IC features; forming a multilayer interconnect (MLI) structure and an interlayer dielectric (ILD) on the semiconductor substrate, wherein the MLI is configured to be absent within the scribe region; and etching the ILD and the semiconductor substrate within the scribe region to form a scribe-line trench.
    Type: Grant
    Filed: July 15, 2008
    Date of Patent: June 28, 2011
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ming-Chang Hsieh, Hung-Lin Chen, Hsiu-Mei Yu, Chin Kun Lan, Dong-Lung Lee
  • Patent number: 7967667
    Abstract: An automatic apparatus includes an input platform, a creature shaking mechanism, a flushing unit and an output platform. The input platform has a transporting unit. A creature container containing at least one creature is placed on the input platform. The creature shaking mechanism is connected to the input platform. When the creature container is transported to a positioning region of the creature shaking mechanism, the creature container is subject to a shaking operation in response to a power source, thereby turning over the creature and exposing different surfaces of the at least one creature. The flushing unit generates a spout of water to flush the different surfaces of the at least one creature so as to sufficiently shed superficial adherent substances off the at least one creature. The output platform is connected to the creature shaking mechanism for receiving the creature container that is departed from the positioning region.
    Type: Grant
    Filed: December 9, 2008
    Date of Patent: June 28, 2011
    Assignee: Tianyuan Top Quality Industrial Co., Ltd.
    Inventors: Chin-Chang Hsieh, Ming-Chiu Hsu
  • Publication number: 20110112428
    Abstract: A body composition measuring apparatus using a bioelectric impedance analysis and a neural network algorithm for obtaining two or more anthropometry variables from testees and then inputting the anthropometry variables into the internal processing unit that has a built-in back propagation-artificial neural network that has one input layer, 1-10 hidden layers each having 1-15 hidden neurons and one output layer having one output neuron. By means of the aforesaid artificial neural network, the invention accurately predict the fat free mass of the testee so as to further obtain the amount of body fat, showing higher accuracy than conventional linear regression equation (LRE).
    Type: Application
    Filed: January 21, 2010
    Publication date: May 12, 2011
    Applicant: CHARDER ELECTRONIC CO., LTD.
    Inventors: Kuen-Chang Hsieh, Liao-Chuan Chang, Chih-Cheng Chao
  • Publication number: 20110106315
    Abstract: A method and an apparatus for estimating temperature are provided for estimating a temperature of a test point in a space with an air conditioner. In the method, a first and a second sensor device are deployed in the space, wherein the second sensor device is deployed at the test point. Then, state parameters and temperature transformation functions are defined according to temperatures detected by the first and the second sensor devices and a state of the air conditioner during a predetermined time period. After the second sensor device is removed, a current state of the air conditioner is determined by reference temperatures detected by the first sensor device and the state parameters. One of the temperature transformation functions is selected according to the current state, and a current temperature of the test point is estimated by using the selected temperature transformation function and the reference temperatures.
    Type: Application
    Filed: November 24, 2009
    Publication date: May 5, 2011
    Applicant: INSTITUTE FOR INFORMATION INDUSTRY
    Inventors: Kun-Cheng Tsai, Chang-An Hsieh, Pei-Lin Hou, Chia-Shin Yen
  • Publication number: 20110084391
    Abstract: An integrated circuit structure includes a semiconductor substrate; a first titanium layer over the semiconductor substrate, wherein the first titanium layer has a first thickness less than 130 ?; a first titanium nitride layer over and contacting the first titanium layer; and an aluminum-containing layer over and contacting the first titanium nitride layer.
    Type: Application
    Filed: July 23, 2010
    Publication date: April 14, 2011
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shyh-Wei Cheng, Pin-Shyne Chin, Kuo-Chio Liu, Che-Jung Chu, Ming-Chang Hsieh, Hung-Lin Chen, Tian Sheng Lin