Patents by Inventor Chang-An Hsieh

Chang-An Hsieh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110081034
    Abstract: An earphone device with a bass adjusting function is provided. The earphone device includes an accommodating portion and an extension segment. The accommodating portion has an inner chamber for accommodating a speaker. The extension segment which is hollow-shaped and has a first space and a second space therein, and the first space is in communication with the inner chamber of the accommodating portion, and when a portion of the extension segment is adjusted from a first position to a second position, the first space, the second space, and the inner chamber of the accommodating portion are in communication, so as to increase a volume of the back chamber of the speaker.
    Type: Application
    Filed: October 4, 2010
    Publication date: April 7, 2011
    Inventors: Chiu-Yun TUNG, Fang-Chang Hsieh, Yuan-Hsing Wu, Chung-Yi Huang
  • Publication number: 20110082955
    Abstract: I2C/SMBus ladders and ladder enabled ICs (devices) to enable daisy-chained I2C/SMBus communication. The devices are particularly useful in monitoring and/or servicing high-voltage battery stacks and other voltage stacks. The devices are powered from a respective voltage increment in the voltage stack, and include level shifting circuitry so as to be operative with an input voltage up to the breakdown voltage of the level shifting circuitry. Various features are disclosed, including but not limited to a unique data line drive, capacitive coupling between devices in a daisy chain with line clamps for circuitry protection and capacitive coupling charge wiping, and clock stretching to accommodate chain latency.
    Type: Application
    Filed: October 6, 2009
    Publication date: April 7, 2011
    Applicant: MAXIM INTEGRATED PRODUCTS, INC.
    Inventors: Jason Allen Wortham, Urs H. Mader, Yi-chang Hsieh
  • Publication number: 20110070812
    Abstract: A circular path generating device comprises a base, a sliding stage, a working portion, and a driving device. The sliding stage is movable on the base along a first axial direction while the working portion is movable on the sliding stage along a second axial direction. The driving device has a driving portion and a crank portion, wherein the driving portion is configured for driving the crank portion to rotate, and the crank portion is connected to the working portion. When the driving portion drives the crank portion to rotate, the working portion is driven by the crank portion to move along a circular path. Thus the circular path generating device according to the present invention advantageously owns a mechanism of one degree of freedom and a simple structure, is capable of performing uniform circular motions, and can be easily controlled.
    Type: Application
    Filed: July 21, 2010
    Publication date: March 24, 2011
    Applicant: National Formosa University
    Inventors: LONG-CHANG HSIEH, Chien-Lin Chen
  • Patent number: 7906252
    Abstract: A PSM blank and method for forming a PSM using the PSM blank, the PSM blank including a light transmitting portion; an uppermost anti-reflection portion; a photosensitive layer stack on the anti-reflection portion comprising at least two photosensitive layers; wherein each photosensitive layer has a lower radiant energy exposure sensitivity compared to an underlying layer.
    Type: Grant
    Filed: March 6, 2006
    Date of Patent: March 15, 2011
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hsin-Chang Lee, Chia-Jen Chen, Hong-Chang Hsieh, Lee-Chih Yeh
  • Patent number: 7897297
    Abstract: Disclosed is a method and a system for optimizing intra-field critical dimension of an integrated circuit. A first mask for an integrated circuit is provided comprising at least one device region. A second mask is provided by copying the first mask and a lithography operation is provided to the integrated circuit using the first and second masks, wherein the critical dimension of the integrated circuit is optimized using the second mask. The second mask comprises a plurality of sacrificial patterns, which may be a plurality of flat patterns or a plurality of grating patterns.
    Type: Grant
    Filed: June 14, 2007
    Date of Patent: March 1, 2011
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Ming Ke, Tsai-Sheng Gau, Shinn-Sheng Yu, Hung-Chang Hsieh
  • Publication number: 20110041766
    Abstract: A plasma source comprises a vacuum chamber, a plurality of discharge tubes, a plurality of permanent magnets, a plurality of RF antennas, and an RF power distribution circuit. The RF power distribution circuit is electrically coupled to an RF power supply and each of the plurality of RF antennas. The lengths of the transmission paths between each of the plurality of RF antennas and the RF power supply are the same, so that the RF power supply can provide each of discharge tubes with the same RF power.
    Type: Application
    Filed: March 26, 2010
    Publication date: February 24, 2011
    Applicant: Institute of Nuclear Energy Research Atomic Energy Council, Executive Yuan
    Inventors: Shih-Cheng Tseng, Cheng-Chang Hsieh, Ming-Chung Yang, Der-Jun Jan, Chi-Fong Ai
  • Patent number: 7888899
    Abstract: A substrate splitting apparatus and a method for splitting a substrate using the substrate splitting apparatus are provided. The substrate splitting apparatus includes a servo motor, a transmission device, a substrate breaking bar, and a stage. One end of the transmission is directly or indirectly coupled to the servo motor while the other end is coupled with the breaking bar. The stage has a load-lock surface and the load-lock surface faces the breaking bar. The servo motor drives the transmission device to move the breaking bar toward the load-lock surface. A substrate with a pre-crack on the bottom is disposed on the load-lock surface. The servo motor drives the substrate breaking bar to move towards or away from the pre-crack. The method of splitting includes the following steps: forming a pre-crack on the substrate; controlling the servo motor to drive the breaking bar to move towards the substrate; and controlling the breaking bar to press the substrate at the pre-crack.
    Type: Grant
    Filed: March 25, 2008
    Date of Patent: February 15, 2011
    Assignee: Au Optronics Corporation
    Inventors: Li-Ya Yeh, Chih-Wei Chu, Shu-Chih Wang, Wen-Chang Hsieh
  • Publication number: 20110011737
    Abstract: A magnetron sputtering apparatus suitable for coating on a workpiece is provided. The magnetron sputtering apparatus includes a vacuum chamber, a holder, a magnetron plasma source and a high-power pulse power supply set, wherein the magnetron plasma source includes a base, a magnetron controller and a target. A reactive gas is inputted into the vacuum chamber, and the holder supporting the workpiece is disposed inside the vacuum chamber. The magnetron plasma source is disposed opposite to the workpiece, wherein the magnetron controller is disposed in the base, and the target is disposed on the base. The high-power pulse power supply set is coupled to the vacuum chamber, the magnetron plasma source and the holder, and a high voltage pulse power is inputted to the magnetron plasma source to generate plasma to coat a film on the surface of the workpiece.
    Type: Application
    Filed: July 17, 2009
    Publication date: January 20, 2011
    Applicant: Institute of Nuclear Energy Research Atomic Energy Council, Executive Yuan
    Inventors: Jin-Yu Wu, Wen-Lung Liung, Ming-Jui Tsai, Der-Jun Jan, Cheng-Chang Hsieh, Shin-Wu Wei, Chia-Cheng Lee, Chi-Fong Ai
  • Publication number: 20110014782
    Abstract: Disclosed is a method for growing a microcrystalline silicon film on a substrate. The method includes the step of disposing the substrate in a chamber, the step of vacuuming the chamber and heating the substrate, the step of introducing reacting gas into the chamber as a precursor and keeping the pressure in the chamber at a predetermined value and the step of using RF energy in the chamber to dissociate the reacting gas to form plasma for growing the microcrystalline silicon film on the substrate. The reacting gas includes SiH4/Ar mixture and H2. The ratio of SiH4/Ar mixture over H2 is 1:1 to 1:20.
    Type: Application
    Filed: February 21, 2009
    Publication date: January 20, 2011
    Applicant: ATOMIC ENERGY COUNCIL-INSTITUTE OF NUCLEAR ENERGY RESEARCH
    Inventors: Shih-Cheng TSENG, Cheng-Chang Hsieh, Der-Jun Jan, Chi-Fong Ai
  • Patent number: 7861070
    Abstract: The present invention proposed a trace compression method for a debug and trace interface of a microprocessor, in which the debug and trace interface is associated with a plurality of registers for storing data. The trace compression method comprises the steps of: (1) finding register content of each of the registers in a first cycle and register content of each of the registers in a second cycle, in which the second cycle is next to the first cycle; (2) calculating difference of the register content of each of the registers in the second cycle and the register content of each of the registers in the first cycle; and (3) packing the differences of the register contents into data trace packets, in which the differences of the register contents of adjacent registers are condensed into a single data trace packet when the differences of the register contents of the adjacent registers are zeroes.
    Type: Grant
    Filed: June 12, 2008
    Date of Patent: December 28, 2010
    Assignee: National Tsing Hua University
    Inventors: Chih Tsun Huang, Yen Ju Ho, Ming Chang Hsieh
  • Publication number: 20100279234
    Abstract: A hard mask layer and a developable bottom anti-reflective coating (dBARC) layer are formed over a dielectric layer of a substrate. A first photosensitive layer is formed above the dBARC layer, exposed, and developed to form a first pattern. The dBARC layer is developed. The first pattern is etched into the hard mask layer to form a first pattern of openings in the hard mask layer. Following removal of the first photosensitive layer, a second photosensitive layer is formed within the first pattern of openings. The second photosensitive layer is exposed and developed to form a second pattern. The dBARC layer is developed. The second pattern is etched into the hard mask layer to form a second pattern of openings in the hard mask layer. Following the removal of the second photosensitive layer and the dBARC layer, the first and the second patterns are etched into the dielectric layer.
    Type: Application
    Filed: April 1, 2010
    Publication date: November 4, 2010
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Vincent YU, Chih-Yang YEH, Hung Chang HSIEH
  • Publication number: 20100271785
    Abstract: A heat-dissipating and fixing mechanism of an electronic component includes a heat-dissipating element, a circuit board and a thermally-conductive adhesive interface. The circuit board has multiple insertion holes. The pins of the electronic component are inserted into corresponding insertion holes of the circuit board. The thermally-conductive adhesive interface has a first surface bonded with the heat-dissipating element and a second surface bonded with the electronic component. As a consequence, the electronic component is fixed on the heat-dissipating element through the thermally-conductive adhesive interface, and the heat generated by the electronic component is transmitted to the heat-dissipating element through the thermally-conductive adhesive interface.
    Type: Application
    Filed: June 22, 2009
    Publication date: October 28, 2010
    Inventors: Hung-Chang Hsieh, Chi-Sheng Chen, Ren-Shen Huang
  • Publication number: 20100255679
    Abstract: Provided is a lithography system operation to include a first aperture or a second aperture. Each of the first and second apertures has two pairs of radiation-transmitting regions where one pair of radiation-transmitting regions are larger than a second pair. For an aperture, each pair of radiation-transmitting regions are on different diametrical axis. In an embodiment, one aperture is used for x-dipole illumination and the second aperture is used for y-dipole illumination.
    Type: Application
    Filed: April 2, 2009
    Publication date: October 7, 2010
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsien-Cheng Wang, Hung Chang Hsieh, Shih-Che Wang, Ping Chieh Wu, Wen-Chun Huang, Ming-Chang Wen
  • Publication number: 20100225234
    Abstract: A hollow-cathode plasma generator includes a plurality of hollow cathodes joined together and connected to a power supply for generating plasma in vacuum. Each of the hollow cathodes includes at least one fillister defined therein, a fin formed on a side of the fillister, an air-circulating tunnel in communication with the fillister and a coolant-circulating tunnel defined therein. The fillister is used to contain working gas. The fin receives negative voltage from the power supply for ionizing the working gas to generate the plasma and spread the plasma in a single direction. The working gas travels into the fillister from the air-circulating tunnel. The coolant-circulating tunnel is used to circulate coolant for cooling the hollow cathode.
    Type: Application
    Filed: September 4, 2007
    Publication date: September 9, 2010
    Applicant: ATOMIC ENERGY COUNCIL - INSTITUTE OF NUCLEAR ENERGY RESEARCH
    Inventors: Ching-Pei Tseng, Cheng-Chang Hsieh, Chi-Fong Ai, Chia-Cheng Lee, Tien-Hsiang Hsueh, Chun-Han Wang
  • Publication number: 20100218896
    Abstract: An atmospheric pressure plasma reactor includes a high-voltage electrode, a common grounded electrode, a bias electrode and at least one dielectric layer. The high-voltage electrode is connected to a high-voltage power supply. The common grounded electrode is used with the high-voltage electrode to discharge and therefore produce planar atmospheric plasma from reactive gas. The bias electrode is used to generate bias for attracting the ions of the planar atmospheric pressure plasma. The dielectric layer is used to suppress undesirable arc discharge during the discharging.
    Type: Application
    Filed: September 11, 2007
    Publication date: September 2, 2010
    Applicant: ATOMIC ENERGY COUNCIL - INSTITUTE OF NUCLEAR ENERGY RESEARCH
    Inventors: Chi-fong Ai, Mien-Win Wu, Cheng-Chang Hsieh
  • Publication number: 20100214961
    Abstract: The present invention applies management frame defined in IEEE 802.11 standard to a wireless distribution system (WDS) mode by adding an information element (IE) into the management frame, which enables any access point (AP) in WDS to maintain IE based on its own setting and state, then send IE via the management frame for providing state of the AP under WDS mode, determine whether a physical link (i.e., a wireless link between APs) should be established therewith based on received IE, and maintain the established physical link through the wireless management frame in a real time manner. Thus, the existence and necessity of the physical link between different APs in WDS can be determined correctly.
    Type: Application
    Filed: May 4, 2010
    Publication date: August 26, 2010
    Applicant: ALPHA NETWORKS INC.
    Inventors: Ming-Wang GUO, Jen-Sheng Huang, Chun-Fu Wang, Ying-Yung Chen, Shang-I Huang, Yao-Chang Hsieh, Yi-Hsien Cho
  • Patent number: 7780481
    Abstract: A power supply apparatus includes a main body, a power input device, a first power output device and a second power output device. The first power output device includes a first cable and a first connector. The first cable is connected to a first surface of the first connector and includes at least a stop block and at least a fastening element. The second power output device includes a second cable and a second connector. The second cable is connected to a first surface of the second connector and includes an extension part and a retaining wall. An edge of the retaining wall is confined by the stop block and the extension part is clamped by the fastening element so as to selectively combine the first connector with the second connector as a composite connector assembly and facilitate securely fixing the composite connector assembly in a common power socket.
    Type: Grant
    Filed: December 4, 2007
    Date of Patent: August 24, 2010
    Assignee: Delta Electronics, Inc.
    Inventors: Hung-Chuan Chen, Hung-Chang Hsieh
  • Patent number: 7759136
    Abstract: A method for patterning a substrate includes forming a material layer on the substrate; performing a first etching on the material layer to form a pattern; measuring the pattern of the material layer using an optical spectrum metrology tool; determining whether the measuring indicates that the etching step achieved a predefined result; and producing an etching recipe and performing a second etching of the material layer using the etching recipe if the predefined result was not achieved.
    Type: Grant
    Filed: September 8, 2006
    Date of Patent: July 20, 2010
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chang-Cheng Hung, Hung Chang Hsieh, Shih-Ming Chang, Wen-Chuan Wang, Chi-Lun Lu, Allen Hsia, Yen-Bin Huang
  • Publication number: 20100164674
    Abstract: The invention discloses a combined transformer. The combined transformer includes a first core, a second core, a first primary coil, a first secondary coil, a second primary coil, and a second secondary coil. The first core includes a first side pillar and a second side pillar. The second core includes a third side pillar and fourth side pillar. The first primary coil winds around the first side pillar. The first secondary coil winds around the third side pillar which corresponds to the first primary coil. The second primary coil winds around the second side pillar. The second secondary coil winds around the fourth side pillar which corresponds to the second primary coil. The first core and the second core form a first magnetic path and a second magnetic path. The first primary coil, the first secondary coil, and the first magnetic path form a first transformer. The second primary coil, the second secondary coil, and the second magnetic path form a second transformer.
    Type: Application
    Filed: June 16, 2009
    Publication date: July 1, 2010
    Applicant: Darfon Electronics Corp.
    Inventors: Ming Yen Wu, Ching Chang Hsieh
  • Publication number: 20100157609
    Abstract: A brightness enhancement film includes a substrate, a plurality of light-gathering units, and a plurality of micro-lenses. The substrate includes a first surface and a second surface that is opposite the first surface. The light-gathering units are mounted on the first surface, with the light-gathering units being aligned and spaced from each other in a first direction to form columns of the light-gathering units and the columns being arranged in a second direction to form a matrix of the light-gathering units, with each of the light-gathering units including a top face and a plurality of stepped portions on a peripheral surface of the light-gathering unit between the top face and the first surface. And the micro-lenses mounted on the first surface, with each of the micro-lenses being located between two adjacent light-gathering units in the first direction and between another two adjacent light-gathering units in the second direction.
    Type: Application
    Filed: December 24, 2008
    Publication date: June 24, 2010
    Inventors: Yii-Der WU, Chi-Chang Hsieh