Patents by Inventor Chang-An Hsieh

Chang-An Hsieh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • ELECTRICAL CONNECTOR HAVING LATCHING MECHANISM
    Publication number: 20080032539
    Abstract: An electrical connector includes a plurality of pins, an isolation body and a latching mechanism. The isolation body has a specified side including a first portion, a second portion and an indentation. The second portion is higher than the first portion. The indentation is formed in the first portion and the second portion. The latching mechanism has an end fixed onto the second portion and extended above a bottom surface of the indentation, wherein the latching mechanism includes at least a fastening part.
    Type: Application
    Filed: September 21, 2006
    Publication date: February 7, 2008
    Applicant: DELTA ELECTRONICS, INC.
    Inventors: Hung-Chuan Chen, Szu-Lu Huang, Hung-Chang Hsieh
  • Thin key structure for generating dazzling light
    Publication number: 20080026189
    Abstract: A thin key structure for generating dazzling light includes a thin film layer, a protective layer, a stripe layer, and a flexible layer. The thin film layer has a thickness is between 0.05˜0.4 mm. The protective layer is disposed on a top side of the thin film layer. The stripe layer is disposed on a bottom side of the thin film layer. The flexible layer is disposed on a bottom side of the stripe layer. The thin key structure is made of a complex material that has different materials and color, and is formed integratedly via a way of an extrusion molding. Hence, the appearance of the key structure has a multi-layer variation and has a good reliability.
    Type: Application
    Filed: July 27, 2006
    Publication date: January 31, 2008
    Inventors: Chun-Wei Lin, Ching-Chang Hsieh, Chien-Chang Chen
  • System and method for processing masks with oblique features
    Patent number: 7314689
    Abstract: A method and system is disclosed for processing one or more oblique features on a mask or reticle substrate. After aligning the mask or reticle substrate with a predetermined reference system, an offset angle of a feature to be processed on the mask or reticle substrate with regard to either the horizontal or vertical reference direction of the predetermined reference system is determined. The mask or reticle substrate is rotated in a predetermined direction by the offset angle; and the feature on the mask or reticle substrate is processed using the predetermined reference system wherein the feature is processed in either the horizontal or vertical reference direction thereof.
    Type: Grant
    Filed: January 27, 2004
    Date of Patent: January 1, 2008
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Burn Jeng Lin, Ping Yang, Hong Chang Hsieh, Yao Ching Ku, Chin Hsian Lin, Chiu Shan Yoo
  • METHOD AND SYSTEM FOR OPTIMIZING INTRA-FIELD CRITICAL DIMENSION UNIFORMITY USING A SACRIFICIAL TWIN MASK
    Publication number: 20070292774
    Abstract: Disclosed is a method and a system for optimizing intra-field critical dimension of an integrated circuit. A first mask for an integrated circuit is provided comprising at least one device region. A second mask is provided by copying the first mask and a lithography operation is provided to the integrated circuit using the first and second masks, wherein the critical dimension of the integrated circuit is optimized using the second mask. The second mask comprises a plurality of sacrificial patterns, which may be a plurality of flat patterns or a plurality of grating patterns.
    Type: Application
    Filed: June 14, 2007
    Publication date: December 20, 2007
    Inventors: Chih-Ming Ke, Tsai-Sheng Gau, Shinn-Sheng Yu, Hung-Chang Hsieh
  • METHOD AND APPARATUS FOR COMPENSATED ILLUMINATION FOR ADVANCED LITHOGRAPHY
    Publication number: 20070291244
    Abstract: Disclosed is a lithography system. The lithography system includes a source designed to provide energy; an imaging system configured to direct the energy onto a substrate to form a predefined image thereon, and defining an optical axis; and an aperture incorporated with the imaging system, the aperture having a plurality of transmitting regions defined along radial axis not parallel to the optical axis, and each transmitting region operable to transmit the energy with adjustable intensity.
    Type: Application
    Filed: June 14, 2006
    Publication date: December 20, 2007
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shih-Ming CHANG, Wen-Chuan WANG, Chih-Cheng CHIN, Chi-Lun LU, Sheng-Chi CHIN, Hung Chang Hsieh
  • Method and system for optimizing intra-field critical dimension uniformity using a sacrificial twin mask
    Publication number: 20070292771
    Abstract: Disclosed is a method and a system for optimizing intra-field critical dimension of an integrated circuit. A first mask for an integrated circuit is provided comprising at least one device region. A second mask is provided by copying the first mask and a lithography operation is provided to the integrated circuit using the first and second masks, wherein the critical dimension of the integrated circuit is optimized using the second mask. The second mask comprises a plurality of sacrificial patterns, which may be a plurality of flat patterns or a plurality of grating patterns.
    Type: Application
    Filed: June 20, 2006
    Publication date: December 20, 2007
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Ming Ke, Tsai-Sheng Gau, Shinn-Sheng Yu, Hung-Chang Hsieh
  • POWER SUPPLY APPARATUS HAVING MULTIPLE POWER OUTPUT DEVICES
    Publication number: 20070270003
    Abstract: A power supply apparatus includes a main body, a power input device, a first power output device and a second power output device. The power input device is coupled to an input terminal of the main body. The first power output device includes a first cable and a first connector. The first cable is interconnected between a first output terminal of the main body and a first surface of the first connector. An extension part is extended from the first surface of the first connector. The second power output device includes a second cable and a second connector. A first surface of the second connector is suppressed by the extension part of the first connector to facilitate securely fixing the first connector and the second connector in a power socket, so that a regulated output voltage is outputted from the first and second output devices to the power socket.
    Type: Application
    Filed: September 21, 2006
    Publication date: November 22, 2007
    Applicant: DELTA ELECTRONICS, INC.
    Inventors: Wen-Hsiang Lin, Szu-Lu Huang, Hung-Chang Hsieh
  • Double-decker mask-pellicle assembly
    Publication number: 20070264582
    Abstract: A mask-pellicle assembly is disclosed. The mask-pellicle assembly includes a mask substrate having an absorber pattern and a hard pellicle attached to the mask substrate by exterior gas pressure.
    Type: Application
    Filed: May 9, 2006
    Publication date: November 15, 2007
    Inventors: Shih-Ming Chang, Hong-Chang Hsieh, Burn-Jeng Lin
  • Button structure for displaying a multi-layered appearance
    Publication number: 20070262692
    Abstract: A button structure for displaying a multi-layered appearance includes a first flexible body, a film layer, a first color layer, a second flexible body, a second color layer, and a third color layer. The film layer is disposed on a top surface of the first flexible body. The first color layer is disposed between the first flexible body and the film layer. The second flexible body is disposed on a top surface of the film layer. The second color layer is disposed between the second flexible body and the film layer. The third color layer is disposed on a top surface of the second flexible body. Hence, the above-mentioned layers are integratedly formed together to display a multi-layered appearance.
    Type: Application
    Filed: May 15, 2006
    Publication date: November 15, 2007
    Inventors: Chun-Wei Lin, Ching-Chang Hsieh
  • System and method for examining mask pattern fidelity
    Publication number: 20070250805
    Abstract: A method and system is disclosed for examining mask pattern fidelity. A mask picture is generated from a first mask with a first OPC model applied to a mask design. The mask picture is converted into a mask based simulation file. A first simulation is conducted under a first set of predetermined lithography processing conditions using the converted simulation file to generate one or more files of a first set representing wafer photo resist profile thereof. The first OPC model is applied to the mask design in the database mask file. A second simulation is conducted under the first set of predetermined lithography processing conditions using the OPCed mask design to generate one or more files of a second set representing wafer photo resist profile thereof. The first and second sets of files are evaluated for inspecting mask fidelity.
    Type: Application
    Filed: April 13, 2007
    Publication date: October 25, 2007
    Inventors: Wen-Chuan Wang, Shih-Ming Chang, Chih-Cheng Chin, Chi-Lun Lu, Sheng-Chi Chin, Hung-Chang Hsieh
  • Method of preventing photoresist residues
    Patent number: 7279428
    Abstract: A method to prevent photoresist residues formed in an aperture is provided. The method includes using a halogen-containing plasma treatment before the aperture is filled with a photoresist. Due to the halogen-containing plasma treatment, amine components on the sidewalls of a via or contact hole or trench opening can be efficiently removed. Accordingly, photoresist residues or via poison can be avoided.
    Type: Grant
    Filed: December 16, 2003
    Date of Patent: October 9, 2007
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Shang Wei Lin, Hung Chang Hsieh
  • NOVEL CRITICAL DIMENSION (CD) CONTROL BY SPECTRUM METROLOGY
    Publication number: 20070231935
    Abstract: A method for patterning a substrate includes forming a material layer on the substrate; performing a first etching on the material layer to form a pattern; measuring the pattern of the material layer using an optical spectrum metrology tool; determining whether the measuring indicates that the etching step achieved a predefined result; and producing an etching recipe and performing a second etching of the material layer using the etching recipe if the predefined result was not achieved.
    Type: Application
    Filed: September 8, 2006
    Publication date: October 4, 2007
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chang-Cheng HUNG, Hung Chang HSIEH, Shih-Ming CHANG, Wen-Chuan WANG, Chi-Lun LU, Allen HSIA, Yen-Bin HUANG
  • Multiple resist layer phase shift mask (PSM) blank and PSM formation method
    Publication number: 20070207391
    Abstract: A PSM blank and method for forming a PSM using the PSM blank, the PSM blank including a light transmitting portion; an uppermost anti-reflection portion; a photosensitive layer stack on the anti-reflection portion comprising at least two photosensitive layers; wherein each photosensitive layer has a lower radiant energy exposure sensitivity compared to an underlying layer.
    Type: Application
    Filed: March 6, 2006
    Publication date: September 6, 2007
    Inventors: Hsin-Chang Lee, Chia-Jen Chen, Hong-Chang Hsieh, Lee-Chih Yeh
  • Method and apparatus for glow discharge plasma treatment of flexible material at atmospheric pressure
    Publication number: 20070154650
    Abstract: Abstract of the disclosure The present invention provides a method and an apparatus for a glow discharge plasma surface treatment of flexible sheet materials under atmospheric pressure. The apparatus comprises electrodes, a single plasma-gas flow channel, uniform gas inlet-and-outlet devices, gas-seal devices for the horizontal movements of sheet materials and reel devices, so as to attain an uniform distribution of plasma gases in the gap between electrodes. As a result, not only a great amount of expensive plasma gas is saved, but also an uniform glow discharge plasma is generated at the lowest input power to obtain a good quality of uniform plasma treatment with continuous processing and high production.
    Type: Application
    Filed: December 30, 2005
    Publication date: July 5, 2007
    Inventors: Mien-Win Wu, Cheng-Chang Hsieh, Chi-Fong Ai, Kuo-Chuan Cheng, Tien-Hsiang Hsuch
  • Dust detection device for air filter and projector utilizing the same
    Patent number: 7234818
    Abstract: A projector and a dust detection device for an air filter thereof. The projector comprises a lamp, a fan, an filter, and a dust detection device. The lamp comprises a housing with an inlet and an exit. The fan is disposed in front of the inlet of the housing, and generates airflow to dissipate heat produced by the lamp. The air filter is disposed in front of the exit of the housing, and filters the airflow passing around the lamp. The dust detection device is disposed behind the air filter, and detects the state of the filtered airflow.
    Type: Grant
    Filed: December 17, 2004
    Date of Patent: June 26, 2007
    Assignee: BENQ Corporation
    Inventor: Chia-Chang Hsieh
  • In-situ overlay alignment
    Patent number: 7218400
    Abstract: A semiconductor wafer is disclosed that includes a plurality of fields, including a plurality of alignment fields. Each alignment field includes a plurality of intra-field small scribe lane primary mark (SSPM) overlay mark pairs there around. The SSPM mark pairs allow for in-situ, non-passive intra-field alignment correction. In one embodiment, there may be between two and four alignment fields, and between two and four SSPM mark pairs around each alignment field. The SSPM marks of each mark pair may be extra scribe-lane marks.
    Type: Grant
    Filed: March 3, 2004
    Date of Patent: May 15, 2007
    Assignee: Taiwan Semiconductor Manufacturing Company Ltd.
    Inventors: Grace H. Ho, Ming-Che Wu, Li-Heng Chou, Hung-Chang Hsieh, Jung Ting Chen, Yao-Ching Ku
  • Receptacle closure device having hand grip
    Publication number: 20070062944
    Abstract: A receptacle closure device includes a receptacle having an open upper end, and a closure having a top wall and a marginal flange portion bent downwardly from the top wall for engaging onto the upper end of the receptacle. The closure includes one or more hand grips extended from the marginal flange portion of the closure, and each has two ends secured to the marginal flange portion of the closure with connectors, for allowing the hand grip to be folded relative to the closure to carry and lift the closure and the receptacle. The closure includes one or more hinge connectors coupled between the hand grip and the marginal flange portion of the closure, and breakable by users.
    Type: Application
    Filed: September 27, 2004
    Publication date: March 22, 2007
    Inventor: Hsien-Chang Hsieh
  • VIDEO DISPLAY AND DISPLAYING METHOD THEREOF
    Publication number: 20070050723
    Abstract: A video display device including a plurality of keys, a microprocessor and a display panel is disclosed. The keys are disposed on an outer surface of the display device, and the microprocessor is disposed inside the display device. The microprocessor is electrically coupled with the keys. The display panel is used for displaying an image. When one of the keys is pressed or touched, the display panel displays a menu. The menu includes multiple instructions corresponding to the function of the keys. Each instruction of the menu corresponds to the sequence and arrangement of each key.
    Type: Application
    Filed: August 23, 2006
    Publication date: March 1, 2007
    Applicant: BENQ CORPORATION
    Inventor: Chia-Chang Hsieh
  • Resist protect oxide structure of sub-micron salicide process
    Patent number: 7183150
    Abstract: In accordance with the objectives of the invention a new method is provided for the creation of a layer of a Resistance Protective Oxide (RPO) layer. A layer of ONO is deposited that is to function as the layer of RPO. The deposited layer of ONO is patterned and wet etched, removing the upper or first layer of silicon dioxide. The patterned and etch upper of first layer of silicon dioxide is used as a hardmask to remove the central layer of silicon nitride applying a wet etch. A wet etch is then applied to remove the remaining lower of second layer of silicon dioxide, completing the patterning of the layer of RPO.
    Type: Grant
    Filed: September 21, 2004
    Date of Patent: February 27, 2007
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ming-Chang Hsieh, Hsun-Chih Tsao, Hung-Chih Tsai, Pin-Shyne Chin
  • Method of accessing distributed field equipments by a host through a plurality of intelligent network gateways
    Patent number: 7181515
    Abstract: A method of accessing data from distributed field equipments by a host through a set of intelligent network gateways is disclosed. The intelligent network gateways link the host on a local area network to the field equipments that are connected to a control network. Initially, configuration software residing in the host is employed to install the intelligent network gateways and the field equipments as a set of virtual equipment data servers, which are capable of continuously accessing, updating, and storing data from the field equipments. The virtual equipment data servers always possess the field equipments' most recent data and are able to communicate to any application program with a standard communication protocol. The method and apparatus facilitate the integration of a variety of field equipments with high-speed data links in a factory environment.
    Type: Grant
    Filed: January 24, 2003
    Date of Patent: February 20, 2007
    Assignee: Industrial Technology Research Institute
    Inventors: Chang-Min Lin, Jia-Cheng Ke, Chang-Hsieh Wu, Che-Lung Wang