Patents by Inventor Trung (Tim) Trinh

Trung (Tim) Trinh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7279725
    Abstract: A method of making a vertical diode structure is provided, the vertical diode structure having associated therewith a diode opening extending through an insulation layer and contacting an active region on a silicon wafer. A titanium silicide layer covers the interior surface of the diode opening and contacts the active region. The diode opening is initially filled with an amorphous silicon plug that is doped during deposition and subsequently recrystallized to form large grain polysilicon. The silicon plug has a top portion that is heavily doped with a first type dopant and a bottom portion that is lightly doped with a second type dopant. The top portion is bounded by the bottom portion so as not to contact the titanium silicide layer. For one embodiment of the vertical diode structure, a programmable resistor contacts the top portion of the silicon plug and a metal line contacts the programmable resistor.
    Type: Grant
    Filed: August 24, 2005
    Date of Patent: October 9, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Fernando Gonzalez, Tyler A. Lowrey, Trung Tri Doan, Raymond A. Turi, Graham R. Wolstenholme
  • Patent number: 7279041
    Abstract: An atomic layer deposition method includes positioning a plurality of semiconductor wafers into an atomic layer deposition chamber. Deposition precursor is emitted from individual gas inlets associated with individual of the wafers received within the chamber effective to form a respective monolayer onto said individual wafers received within the chamber. After forming the monolayer, purge gas is emitted from individual gas inlets associated with individual of the wafers received within the chamber. An atomic layer deposition tool includes a subatmospheric load chamber, a subatmospheric transfer chamber and a plurality of atomic layer deposition chambers. Other aspects and implementations are disclosed.
    Type: Grant
    Filed: June 30, 2005
    Date of Patent: October 9, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Gurtej S. Sandhu, Trung Tri Doan
  • Patent number: 7279398
    Abstract: The present disclosure provides methods and apparatus useful in depositing materials on batches of microfeature workpieces. One implementation provides a method in which a quantity of a first precursor gas is introduced to an enclosure at a first enclosure pressure. The pressure within the enclosure is reduced to a second enclosure pressure while introducing a purge gas at a first flow rate. The second enclosure pressure may approach or be equal to a steady-state base pressure of the processing system at the first flow rate. After reducing the pressure, the purge gas flow may be increased to a second flow rate and the enclosure pressure may be increased to a third enclosure pressure. Thereafter, a flow of a second precursor gas may be introduced with a pressure within the enclosure at a fourth enclosure pressure; the third enclosure pressure is desirably within about 10 percent of the fourth enclosure pressure.
    Type: Grant
    Filed: January 6, 2006
    Date of Patent: October 9, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Cem Basceri, Trung T. Doan, Ronald A. Weimer, Kevin L. Beaman, Lyle D. Breiner, Lingyi A. Zheng, Er-Xuan Ping, Demetrius Sarigiannis, David J. Kubista
  • Publication number: 20070228404
    Abstract: A vertical light emitting diode (LED) includes a metal substrate; a p-electrode coupled to the metal substrate; a p-contact coupled to the p-electrode; a p-GaN portion coupled to the p electrode; an active region coupled to the p-GaN portion; an n-GaN portion coupled to the active region; and a phosphor layer coupled to the n-GaN.
    Type: Application
    Filed: March 27, 2007
    Publication date: October 4, 2007
    Inventors: Chuong Tran, Trung Doan
  • Publication number: 20070231963
    Abstract: Systems and methods for fabricating a light emitting diode include forming a multilayer epitaxial structure above a carrier substrate; depositing at least one metal layer above the multilayer epitaxial structure; removing the carrier substrate.
    Type: Application
    Filed: June 5, 2007
    Publication date: October 4, 2007
    Inventors: Trung Doan, Chen-Fu Chu
  • Patent number: 7276448
    Abstract: A process is provided for forming vertical contacts in the manufacture of integrated circuits and devices. The process eliminates the need for precise mask alignment and allows the etch of the contact hole to be controlled independent of the etch of the interconnect trough. The process includes forming an insulating layer on the surface of a substrate; forming an etch stop layer on the surface of the insulating layer; forming an opening in the etch stop layer; etching to a first depth through the opening in the etch stop layer and into the insulating layer to form an interconnect trough; forming a photoresist mask on the surface of the etch stop layer and in the trough; and continuing to etch through the insulating layer until reaching the surface of the substrate to form a contact hole. The above process may be repeated during the formation of multilevel metal integrated circuits.
    Type: Grant
    Filed: August 19, 2004
    Date of Patent: October 2, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Charles H Dennison, Trung T. Doan
  • Patent number: 7275085
    Abstract: An apparatus, system and method for maintaining Web page state information using a directory server. A directory server stores information for each Web page visited by a user that requires user input. When the Web page is again visited by the user, the information is retrieved from the directory server and inserted into the Web page in appropriate fields based on tags in the Web page document. Thus, the user need not repeatedly re-enter information already entered into the Web page. However, if the user wants to enter new values, the new values will replace the existing ones stored in the directory server.
    Type: Grant
    Filed: April 14, 2000
    Date of Patent: September 25, 2007
    Assignee: International Business Machines Corporation
    Inventor: Trung Minh Tran
  • Publication number: 20070217171
    Abstract: This disclosure is directed to a compact storage device, such as a flash memory device. The connector of the memory device contains the controller that controls data transfer and storage within a flash memory module (FMM) of the memory device. Preferably, the controller resides completely within the connector to enable the smallest form factor of the flash memory device and the most space for one or more flash memory modules. In this manner, the memory device may store a large quantity of data while being of a small size. Additionally, the connector may also be used with other data transfer or storage devices while the FMM may separately store data within other storage or computing devices.
    Type: Application
    Filed: March 15, 2006
    Publication date: September 20, 2007
    Inventor: Trung Le
  • Patent number: 7270596
    Abstract: A chemical mechanical polishing process includes rotating at least one of a semiconductor substrate and polishing pad relative to the other. A chemical mechanical polishing slurry is provided intermediate the substrate and pad. The substrate is polished with the slurry and pad during the rotating. The chemical mechanical polishing slurry includes liquid and abrasive solid components. At least some of the abrasive solid component includes individually non-homogeneous abrasive particles.
    Type: Grant
    Filed: May 20, 2005
    Date of Patent: September 18, 2007
    Assignee: Micron Technology, Inc.
    Inventor: Trung Tri Doan
  • Publication number: 20070212854
    Abstract: A method for the separation of multiple dies during semiconductor fabrication is described. On an upper surface of a semiconductor wafer containing multiple dies, metal layers are deposited everywhere except where a block of stop electroplating material exists. The stop electroplating material is obliterated, and a barrier layer is formed above the entire remaining structure. A sacrificial metal element is added above the barrier layer, and then the substrate is removed. After the semiconductor material between the individual dies is eradicated, any desired bonding pads and patterned circuitry are added to the semiconductor surface opposite the sacrificial metal element, a passivation layer is added to this surface, and then the sacrificial metal element is removed. Tape is added to the now exposed barrier layer, the passivation layer is removed, the resulting structure is flipped over, and the tape is expanded to separate the individual dies.
    Type: Application
    Filed: March 6, 2007
    Publication date: September 13, 2007
    Inventors: Chen-Fu Chu, Trung Tri Doan, Hao-Chun Cheng, Feng-Hsu Fan, Fu-Hsien Wang
  • Patent number: 7268382
    Abstract: The invention includes a method of forming a rugged semiconductor-containing surface. A first semiconductor layer is formed over a substrate, and a second semiconductor layer is formed over the first semiconductor layer. Subsequently, a third semiconductor layer is formed over the second semiconductor layer, and semiconductor-containing seeds are formed over the third semiconductor layer. The seeds are annealed to form the rugged semiconductor-containing surface. The first, second and third semiconductor layers are part of a common stack, and can be together utilized within a storage node of a capacitor construction. The invention also includes semiconductor structures comprising rugged surfaces. The rugged surfaces can be, for example, rugged silicon.
    Type: Grant
    Filed: June 7, 2006
    Date of Patent: September 11, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Shenlin Chen, Trung Tri Doan, Guy T. Blalock, Lyle D. Breiner, Er-Xuan Ping
  • Patent number: 7258892
    Abstract: The present disclosure provides methods and systems for controlling temperature. The method has particular utility in connection with controlling temperature in a deposition process, e.g., in depositing a heat-reflective material via CVD. One exemplary embodiment provides a method that involves monitoring a first temperature outside the deposition chamber and a second temperature inside the deposition chamber. An internal temperature in the deposition chamber can be increased in accordance with a ramp profile by (a) comparing a control temperature to a target temperature, and (b) selectively delivering heat to the deposition chamber in response to a result of the comparison. The target temperature may be determined in accordance with the ramp profile, but the control temperature in one implementation alternates between the first temperature and the second temperature.
    Type: Grant
    Filed: December 10, 2003
    Date of Patent: August 21, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Kevin L. Beaman, Trung T. Doan, Lyle D. Breiner, Ronald A. Weimer, Er-Xuan Ping, David J. Kubista, Cem Basceri, Lingyi A. Zheng
  • Patent number: 7259694
    Abstract: A system and method for communication of information that has particular significance to a specific location only to those individuals that are at or near that geo-spatial location. In particular, providing safety factor data and alerts is a preferred use of the invention. The invention allows information to be tailored to the individual at that location by selectively filtering what is communicated and what is not. The system includes a transmitting proximity event server, a GPS client wireless component that can be a personal wireless communication device (such as Palm Pilot, cellular digital phones, etc.) or personal computer configured for use within a global position satellite network.
    Type: Grant
    Filed: February 26, 2001
    Date of Patent: August 21, 2007
    Assignee: International Business Machines Corporation
    Inventors: Jussi Petri Myllymaki, Kevin Trung Cao, Daniel Alexander Ford, Reiner Kraft
  • Patent number: 7253430
    Abstract: An ovonic phase-change semiconductor memory device having a reduced area of contact between electrodes of chalcogenide memories, and methods of forming the same are disclosed. Such memory devices are formed by forming a tip protruding from a lower surface of a lower electrode element. An insulative material is applied over the lower electrode such that an upper surface of the tip is exposed. A chalcogenide material and an upper electrode are either formed atop the tip, or the tip is etched into the insulative material and the chalcogenide material and upper electrode are deposited within the recess. This allows the memory cells to be made smaller and allows the overall power requirements for the memory cell to be minimized.
    Type: Grant
    Filed: August 20, 2003
    Date of Patent: August 7, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Trung T. Doan, D. Mark Durcan, Brent D. Gilgen
  • Patent number: 7249971
    Abstract: A hermetic pressure connector which provides a pressure-tight, electrically conductive connection through a hole in a bulkhead. The connector includes a transverse support member having a high pressure side and an opposite low pressure side. A passage extends through the transverse support member between the opposite sides. A conductor pin having an axial portion extends through the passage. An insulating sleeve surrounds at least the axial portion of the conductor pin, thereby electrically insulating the transverse support member from the conductor pin. A molded connected body surrounds at least a central portion of the conductor pin at least at one of the high and low pressure sides to thereby mechanically support the conductor pin in the passage. The molded connector body is directly sealingly engaged with the conductor pin, the insulating sleeve and the transverse support member.
    Type: Grant
    Filed: February 28, 2005
    Date of Patent: July 31, 2007
    Assignee: Greene, Tweed of Delaware, Inc.
    Inventors: Charles P. Burke, Ronald E. Taylor, Steven D. Fraley, James N. Spence, Martin L. Tomek, Trung Dinh Nguyen
  • Patent number: 7249047
    Abstract: An optimization processor which is parameter driven for generating plural solutions for employee transfer requests and leave requests for an entire enterprise in near real time from which an optimal solution avoiding compromises to future staffing requirements may be selected.
    Type: Grant
    Filed: January 10, 2002
    Date of Patent: July 24, 2007
    Assignee: Navitaire, Inc.
    Inventors: Michael Francis Arguello, Niem-Trung Luong Tra
  • Patent number: 7247944
    Abstract: An apparatus and method for attaching a semiconductor die to a lead frame wherein the electric contact points of the semiconductor die are relocated to the periphery of the semiconductor die through a plurality of conductive traces. A plurality of leads extends from the lead frame over the conductive traces proximate the semiconductor die periphery and directly attaches to and makes electrical contact with the conductive traces in a LOC arrangement. Alternatively, a connector may contact a portion of the conductive trace to make contact therewith.
    Type: Grant
    Filed: April 5, 2005
    Date of Patent: July 24, 2007
    Assignee: Micron Technology, Inc.
    Inventor: Trung T. Doan
  • Patent number: 7247581
    Abstract: The invention includes a method for treating a plurality of discrete semiconductor substrates. The discrete semiconductor substrates are placed within a reactor chamber. While the substrates are within the chamber, they are simultaneously exposed to one or more of H, F and Cl to remove native oxide. After removing the native oxide, the substrates are simultaneously exposed to a first reactive material to form a first mass across at least some exposed surfaces of the substrates. The first reactive material is removed from the reaction chamber, and subsequently the substrates are exposed to a second reactive material to convert the first mass to a second mass. The invention also includes apparatuses which can be utilized for simultaneous ALD treatment of a plurality of discrete semiconductor substrates.
    Type: Grant
    Filed: August 17, 2005
    Date of Patent: July 24, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Trung Tri Doan, Lyle D. Breiner, Er-Xuan Ping, Lingyi A. Zheng
  • Patent number: D547096
    Type: Grant
    Filed: November 22, 2006
    Date of Patent: July 24, 2007
    Inventors: Michael John Stengel, Trung Q. Do
  • Patent number: D549805
    Type: Grant
    Filed: December 6, 2005
    Date of Patent: August 28, 2007
    Inventor: Trung T. Quach