Abstract: A ROCK inhibitor represented by formula (I), and a preparation method therefor and a use thereof are provided. The ROCK inhibitor has excellent ROCK inhibition activity, particularly shows good selective inhibition on ROCK2 kinase, has good safety and metabolic stability, and is high in bioavailability. The preparation method for the ROCK inhibitor is simple, and the ROCK inhibitor is easy to purify, and therefore has a good application prospect.

Abstract: A layout method includes: providing a library comprising a first cell and a second cell, wherein each of the first and second cells includes: a first active region and a second active region extending in a first direction; a first cell-edge gate structure and a second cell-edge gate structure extending in a second direction; and a third cell-edge gate structure and a fourth cell-edge gate structure extending in the second direction, wherein each of the first and second cell further includes one of a tie-off conductive line or a tie-off marker layer on each of the first and second cell-edge gate structures. The layout method further includes: generating a design layout by placing and abutting the first cell and the second cell; updating the design layout by performing a post-processing step on the tie-off conductive line and the tie-off marker layer of each of the first and second cells.

Abstract: A semiconductor device, including: a transistor layer, a dielectric layer, a conductive strip and a power grid structure. The transistor layer includes a first active region configured to be a source/drain terminal of a first transistor and a second active region configured to be a source/drain terminal of a second transistor. The bottom surface of the dielectric layer is in direct contact with top surfaces of the source/drain terminals of the first and second transistors. The conductive strip is included in the dielectric layer and extends from the first active region toward the second active region for signal connection. The power grid structure is arranged to direct a power source to the transistor layer from a bottom of the transistor layer.

Abstract: An integrated circuit includes a strip structure having a front side and a back side. The integrated circuit includes a gate structure on the front side of the strip structure. The integrated circuit includes an isolation structure surrounding the strip structure. The integrated circuit includes a backside via in the isolation structure. The integrated circuit includes a contact over the strip structure, wherein a first portion of the contact extends into the isolation structure and contacts the backside via. The integrated circuit includes a backside power rail on the back side of the strip structure and in contact with the backside via.

Abstract: A light-emitting diode includes a semiconductor light-emitting stack, a transparent conductive layer, a first current blocking layer, and a first electrode pad. The semiconductor light-emitting stack includes, in sequence from bottom to top, a second conductivity type semiconductor layer, a light-emitting layer, and a first conductivity type semiconductor layer. The transparent conductive layer is disposed on the first conductivity type semiconductor layer, and is formed with a first opening which is defined by an inner edge of the transparent conductive layer. The first current blocking layer is formed on the first conductivity type semiconductor layer. The first electrode pad is formed on and in contact with both the first current blocking layer and on the first conductivity type semiconductor layer. The first electrode pad has a width not greater than a dimension of the first opening.

Abstract: A method includes: doping a region through a first surface of a semiconductor substrate; forming a plurality of doped structures within the semiconductor substrate, wherein each of the plurality of doped structures extends along a vertical direction and is in contact with the doped region; forming a plurality of transistors over the first surface, wherein each of the transistors comprises one or more source/drain structures electrically coupled to the doped region through a corresponding one of the doped structures; forming a plurality of interconnect structures over the first surface, wherein each of the interconnect structures is electrically coupled to at least one of the transistors; and testing electrical connections between the interconnect structures and the transistors based on detecting signals present on the doped region through a second surface of the semiconductor substrate, the second surface opposite to the first surface.

Abstract: A light-emitting diode (LED) device includes a substrate, an epitaxial layered structure disposed on the substrate, a current-spreading layer disposed on the epitaxial layered structure, a current-blocking unit disposed on the current-spreading layer, and a distributed Bragg reflector. The epitaxial layered structure, the current-spreading layer and the current-blocking unit are covered by the distributed Bragg reflector. One of the current-spreading layer, the current-blocking unit, and a combination thereof has a patterned rough structure. A method for manufacturing the LED device is also disclosed.

Abstract: A structure includes a first transistor of a first type, the first transistor including a first channel, a first conductive segment, and a second conductive segment, a second transistor of a second type, the second transistor including a second channel, a third conductive segment, and a fourth conductive segment, and a gate. The first channel extends through the gate between the first and second conductive segments, the second channel extends through the gate between the third and fourth conductive segments and is aligned with the first channel at a center of the first transistor, the first and third conductive segments extend away from the center of the first transistor in opposite directions, and the second and fourth conductive segments extend away from the center of the first transistor in opposite directions.

Abstract: In one aspect, a method includes obtaining videos and for each video: obtaining a set of anchors for the video, each anchor beginning at the playback time and including anchor text; identifying, from text generated from audio of the video, a set of entities specified in the text, wherein each entity in the set of entities is associated with a times stamp at which the entity is mentioned; determining, by a language model and from the text generated from the audio of the video, an importance value for each entity; for a subset of the videos, receiving rater data that describes, for each anchor, the accuracy of the anchor text in describing subject matter of the video; and training, using the human rater data, the importance values, the text, and the set of entities, an anchor model that predicts an entity label for an anchor for a video.

Abstract: The present disclosure provides a semiconductor device. The semiconductor device includes: a first cell, a dielectric layer, and a snorkel structure. The first cell has an output terminal. The dielectric layer is disposed on the first cell. The snorkel structure is disposed in the dielectric layer. The snorkel structure includes a first conductive structure, a first conductive layer, and a second conductive structure. The first conductive layer is electrically connected to the output terminal of the cell. The first conductive layer is disposed on and electrically connected to the first conductive structure. The second conductive structure is disposed on and electrically connected to the first conductive layer. The second conductive structure has a topmost conductive layer buried in the dielectric layer.

Abstract: A method of fabricating an integrated circuit includes fabricating a set of transistors in a front-side of a substrate, fabricating a first set of vias in a back-side of the substrate, depositing a first set of conductive structures on the back-side on a first level, depositing a second set of conductive structures on the back-side on a second level thereby forming a set of power rails, fabricating a second set of vias in the back-side, and depositing a third set of conductive structures on the back-side on a third level. The first set of vias is electrically coupled to the set of transistors. The second set of vias is electrically coupled to the first and third set of conductive structures. A first structure of the first set of conductive structures is electrically coupled to a first via of the first set of vias.

Abstract: A method of manufacturing a semiconductor device, including: providing a substrate including a first cell and a second cell, the first cell and the second cell are arranged in a first direction; forming a plurality of first metal strips arranged in a second direction and extending in the first direction on a first plane; forming a first trench over a boundary between the first cell and the second cell, a bottom surface of the first trench is located on a second plane over the first plane; filling the first trench with a non-conductive material, resulting in a separating wall extending in the first direction; and fort plurality of second metal strips extending in the second direction on a third plane over the second plane and including a first second metal strip and a second second metal strip separated by the separating wall.

Abstract: An imaging platform for capturing multiple views is provided. The imaging platform includes a desktop base, an upright element having a first end and a second end, the first end coupled to the desktop base, a first camera and a second camera positioned on at least one protruding element coupled to the upright element, the second camera facing the desktop base, a control panel for selecting a selection of a plurality of different outputs, and a processor. The processor obtains at least one camera output from the first camera and/or the second camera based on the selection of the plurality of outputs on the control panel, and provides a processed output based on the selection of the plurality of outputs on the control panel.

Abstract: A device includes a first cell, a second cell, and first isolation portions. The second cell is adjacent the first cell. The first and second cells are arranged in a first direction, and the first cell includes first and second conductive structures. The first conductive structures extend in the first direction. Each of the first conductive structures has a first end facing the second cell. The second conductive structures extend in the first direction. The first and second conductive structures are alternately arranged in a second direction different from the first direction. The first isolation portions are respectively abutting the first ends of the first conductive structures. Two of the first isolation portions are misaligned with each other in the second direction.

Abstract: A light-emitting device includes a light-emitting laminated structure, a first contact electrode, and an insulating layer. The light-emitting laminated structure has a first surface and a second surface opposite to the first surface, and includes a first semiconductor layer, a second semiconductor layer, and an active layer. The first contact electrode is disposed on the first surface and forms an ohmic contact with the light-emitting laminated structure. The insulating layer is disposed on the light-emitting laminated structure and covers the light-emitting laminated structure and the first contact electrode. The first contact electrode includes a first metal material that has a work function not less than 5 eV and that is in contact with the first surface. A method for producing the light-emitting device is also disclosed.

Abstract: A white light interferometric fiber-optic gyroscope based on a rhombic optical path difference bias structure includes a laser, a rhombic optical path difference bias structure, a fiber coil and a photodetector. The white light interferometric fiber-optic gyroscope adopts an all-fiber structure to simplify the complexity of a gyroscope system and reduce the overall cost. A white light interferometric demodulation algorithm is used to realize linear output of rotation rate signals.

Abstract: A water quality monitoring device and a monitoring method thereof are provided. The water quality monitoring device includes a water tank, a first and a second optical detection devices and a control circuit. The water tank has an accommodating space to carry a liquid. The first optical detection device provides a first light to detect and obtain a first reference light intensity, a first scattered light intensity, and a first penetrating light intensity. The second optical detection device provides a second light to detect and obtain a second reference light intensity, a second scattered light intensity, and a second penetrating light intensity. The control circuit calculates a water quality detection value of the liquid based on the first reference light intensity, the first scattered light intensity, the first penetrating light intensity, the second reference light intensity, the second scattered light intensity, and the second penetrating light intensity.

Abstract: A method is provided, including the following operations: arranging a first gate structure extending continuously above a first active region and a second active region of a substrate; arranging a first separation spacer disposed on the first gate structure to isolate an electronic signal transmitted through a first gate via and a second gate via that are disposed on the first gate structure, wherein the first gate via and the second gate via are arranged above the first active region and the second active region respectively; and arranging a first local interconnect between the first active region and the second active region, wherein the first local interconnect is electrically coupled to a first contact disposed on the first active region and a second contact disposed on the second active region.

Abstract: A compound containing a benzene ring as shown in formula I, a pharmaceutically acceptable salt thereof, a stereoisomer thereof, a tautomer thereof, an isotopic compound thereof, a crystal form thereof, a nitrogen oxide thereof, and a solvate thereof or a solvate of the pharmaceutically acceptable salt thereof are provided. The compound has high P2X4 antagonistic activity, good selectivity, low toxicity and good metabolic stability.

Abstract: An integrated circuit includes a first power rail, a first signal line, a first transistor and a second transistor. The first power rail is on a back-side of a substrate and is configured to supply a first supply voltage. The first signal line is on the back-side of the substrate and is separated from the first power rail. The first transistor has a first active region in a front-side of the substrate. The first active region is overlapped by the first power rail and is electrically coupled to the first power rail. The second transistor has a second active region that is in the front-side of the substrate. The second active region is separated from the first active region, is overlapped by the first signal line, and is configured to receive the first supply voltage of the first power rail through the first active region of the first transistor.