Abstract: A fan noise cancellation device comprises a base with a resonant ring formed with a plurality of resonance channels and a cover coupled to the base. Each resonance channel comprises an inner channel and an outer channel. Each inner channel has an opening to the resonant ring and has a length corresponding to a frequency. A baffle positioned in each inner channel determines an effective length of the inner channel. The inner channel baffles are coupled to the cover, wherein rotation of the cover relative to the resonance ring changes the position of the inner channel baffles to change the effective lengths of the inner channels to adjust the fan noise cancellation waveform frequency. Vanes on the cover are positioned in an airflow such that the airflow rotates the cover, and a spring in each resonance channel counteracts the rotation to adjust the inner channels.

Abstract: Embodiments of the present disclosure relate to a method for I/O data transmission in a Hyper-Converged Storage System (HCSS). The HCSS comprises at least one storage node having at least one device constructed with virtualization technology and a storage I/O processing module for accessing persistent storage resource of the HCSS. According to the method, an I/O request of a first type is received from the device by a System Disk front-end driver (SFD), wherein the I/O request of the first type is an I/O request to a system disk of the device. The I/O request of the first type and its corresponding response of a first type are transferred by the SFD between the device and the storage I/O processing module via a first shared memory, wherein the first shared memory is created by allocating a first memory region of the HCSS as the first shared memory.

Abstract: A 5G-based wireless sensor includes at least one data acquisition unit, a signal transmission unit, an antenna coupled to the signal transmission unit, and a processor. The at least one data acquisition unit comprises a signal output port. The processor connects to the signal output port of the at least one data acquisition unit, the signal transmission unit, and the antenna. The at least one data acquisition unit collects data and processes data into a structured form to acquire a structured data. The processor constructs a table for data according to the structured data, and adds the table of data to the structured data. The signal transmission unit converts the structured data in a 5G signal, and the antenna transmits the 5G signal.

Abstract: A 5G-based wireless sensor includes at least one data acquisition unit, a signal transmission unit, an antenna coupled to the signal transmission unit, and a processor. The at least one data acquisition unit comprises a signal output port. The processor connects to the signal output port of the at least one data acquisition unit, the signal transmission unit, and the antenna. The at least one data acquisition unit collects data and makes a structured processing of the data to acquire structured data. The processor constructs a table data according to the structured data and adds the table data to the structured data. The signal transmission unit converts the structured data in a 5G signal, and the antenna transmits the 5G signal.

Abstract: The present invention relates to a semiconductor device and a method of forming the same, the semiconductor device includes a substrate, a gate structure, an insulating stacked structure and a first conductive layer. The gate structure is disposed on the substrate, and the insulating stacked structure covers the gate structure and the substrate to define a first opening thereinto expose a portion of the gate structure and a portion of the substrate. The first conductive layer covers surfaces of the first opening to directly contact the portion of the substrate and the portion of the gate structure, with the first conductive layer including two outer extension wings on a top surface of the insulating stacked structure.

Abstract: A semiconductor device includes an n-type FET device and a p-type FET device. The n-type FET device includes a first substrate region, a first gate stack, a first gate spacer over sidewalls of the first gate stack, and an n-type epitaxial feature in a source/drain (S/D) region of the n-type FET device. The p-type FET device includes a second substrate region, a second gate stack, a second gate spacer over sidewalls of the second gate stack, and a p-type epitaxial feature in an S/D region of the p-type FET device. A vertical distance between a bottom surface of the first gate spacer and a lowest point of an upper surface of the n-type epitaxial feature is greater than a vertical distance between a bottom surface of the second gate spacer and a lowest point of an upper surface of the p-type epitaxial feature.

Abstract: An integrated fan-out package including an integrated circuit, an insulating encapsulation, and a redistribution circuit structure is provided. The integrated circuit includes an active surface, a plurality of sidewalls connected to the active surface, and a plurality of pads distributed on the active surface. The insulating encapsulation encapsulates the active surface and the sidewalls of the integrated circuit. The insulating encapsulation includes a plurality of first contact openings and a plurality of through holes, and the pads are exposed by the first contact openings. The redistribution circuit structure includes a redistribution conductive layer, wherein the redistribution conductive layer is disposed on the insulating encapsulation and is distributed in the first contact openings and the through holes. The redistribution conductive layer is electrically connected to the pads through the first contact openings. A method of fabricating the integrated fan-out package is also provided.

Abstract: A display panel and a terminal are disclosed. The display panel includes a transparent substrate; and a first display module disposed in a first area (1) of the transparent substrate and a second display module disposed in a second area (2) of the transparent substrate, where the first area (1) and the second area (2) are combined to form an entire display area, the first display module is an active matrix organic light-emitting diode (AMOLED) display module, and the second display module is a passive matrix organic light-emitting diode (PMOLED) display module.

Abstract: A mold chase is provided, including a lower mold support and an upper mold support which are configured to be pressed together to form a mold cavity therebetween for receiving a wafer level substrate. The mold chase also includes multiple gates and at least one vent disposed along the periphery of the mold cavity. The gates are configured to allow a mold material to be injected into the mold cavity, and the vents are configured to release gas from the mold cavity. The distance between one of the gates and the closest vent is less than the diameter of the mold cavity.

Abstract: Semiconductor devices and methods of fabricating semiconductor devices are provided. The present disclosure provides a semiconductor device that includes a first fin structure and a second fin structure each extending from a substrate; a first gate segment over the first fin structure and a second gate segment over the second fin structure; a first isolation feature separating the first and second gate segments; a first source/drain (S/D) feature over the first fin structure and adjacent to the first gate segment; a second S/D feature over the second fin structure and adjacent to the second gate segment; and a second isolation feature also disposed in the trench. The first and second S/D features are separated by the second isolation feature, and a composition of the second isolation feature is different from a composition of the first isolation feature.

Abstract: A package structure and method for forming the same are provided. The package structure includes a die structure formed over a first interconnect structure, and the die structure includes a first region and a second region. The package structure includes a dam structure formed on the first region of the die structure, and a second interconnect structure formed over the die structure and the dam structure. The package structure also includes a package layer formed between the first interconnect structure and the second interconnect structure, and the package layer is formed on the second region of the die structure to surround the dam structure.

Abstract: A microfluidic detection unit comprises at least one fluid injection section, a fluid storage section and a detection section. Each fluid injection section defines a fluid outlet; the fluid storage section is in gas communication with the atmosphere and defines a fluid inlet; the detection section defines a first end in communication with the fluid outlet and a second end in communication with the fluid inlet. A height difference is defined between the fluid outlet and the fluid inlet along the direction of gravity. When a first fluid is injected from the at least one fluid injection section, the first fluid is driven by gravity to pass through the detection section and accumulate to form a droplet at the fluid inlet, such that a state of fluid pressure equilibrium of the first fluid is established.

Abstract: The present disclosure provides semiconductor devices and methods of forming the same. A semiconductor device according to one embodiment of the present disclosure includes a first fin-shaped structure extending lengthwise along a first direction over a substrate, a first epitaxial feature over a source/drain region of the first fin-shaped structure, a gate structure disposed over a channel region of the first fin-shaped structure and extending along a second direction perpendicular to the first direction, and a source/drain contact over the first epitaxial feature. The bottommost surface of the gate structure is closer to the substrate than a bottommost surface of the source/drain contact.

Abstract: A semiconductor package is provided. The semiconductor package includes a semiconductor die formed over an interconnect structure, an encapsulating layer formed over the interconnect structure to cover and surround the semiconductor die, and an interposer structure formed over the encapsulating layer. The interposer structure includes an insulating base having a first surface facing the encapsulating layer, and a second surface opposite the first surface. The interposer structure includes island layers arranged on the first surface of the insulating base and corresponding to the semiconductor die. A portion of the encapsulating layer is sandwiched by at least two of the island layers. Alternatively, the interposer structure includes a passivation layer covering the second surface of the insulating base and having a recess that is extended along a peripheral edge of the insulating base.

Abstract: A bonding method of a semiconductor device is disclosed. The method includes steps of forming a plurality of holes on two bonding parts of a main substrate, respectively; disposing a semiconductor device on the main substrate, and aligning the two bonding parts with two conduction parts of the semiconductor device; aligning a laser to the conduction parts and operating the laser to emit a laser beam from a lower part of the main substrate, wherein the laser beam passes through the holes of the bonding part to strike on the conduction part, so as to melt each conduction part to bond with the bonding part. With configuration of the holes, the conduction parts and the bonding part can be smoothly bonded by using laser, so as to achieve the purpose of transferring the semiconductor device.

Abstract: A microLED display includes a first main substrate, microLEDs disposed above the first main substrate, a first light blocking layer disposed above the first main substrate to define emission areas, a light guiding layer disposed in the emission areas, and a plurality of connecting structures disposed in the emission areas respectively and electrically connected with the microLEDs.

Abstract: A chassis for electronic equipment, comprising a front panel, a slot disposed in the front panel and a first computer card latch disposed in the slot, the first computer card latch configured to hold a computer card having a first predetermined height.

Abstract: A semiconductor package and a method of manufacturing the same are provided. The semiconductor package includes a semiconductor die, an encapsulant and a redistribution structure. The encapsulant laterally encapsulates the semiconductor die. The redistribution structure is disposed on the encapsulant and electrically connected with the semiconductor die, wherein the redistribution structure comprises a first conductive via, a first conductive wiring layer and a second conductive via stacked along a stacking direction, the first conductive via has a first terminal surface contacting the first conductive wiring layer, the second conductive via has a second terminal surface contacting the first conductive wiring layer, an area of a first cross section of the first conductive via is greater than an area of the first terminal surface of the first conductive via, and an area of a second cross section of the second conductive via is greater than an area of the second terminal surface of the second conductive via.

Abstract: A package structure includes a redistribution structure, a first semiconductor die, a first passive component, a second semiconductor die, a first insulating encapsulant, a second insulating encapsulant, a second passive component and a global shielding structure. The redistribution structure includes dielectric layers and conductive layers alternately stacked. The first semiconductor die, the first passive component and the second semiconductor die are disposed on a first surface of the redistribution structure. The first insulating encapsulant is encapsulating the first semiconductor die and the first passive component. The second insulating encapsulant is encapsulating the second semiconductor die, wherein the second insulating encapsulant is separated from the first insulating encapsulant. The second passive component is disposed on a second surface of the redistribution structure.

Abstract: A support structure for a light-emitting diode utilizes the configuration of a sacrifice structure to achieve safe separation of a light-emitting diode from a carrier substrate. Specifically, when an external force is applied on the light-emitting diode or the carrier substrate, a breaking layer of the sacrifice structure is the first layer to be broken, so that the light-emitting diode and carrier substrate will become separated from each other.