Patents by Inventor Wen Wu

Wen Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200268839
    Abstract: The present disclosure provides a nucleic acid fragment, a pharmaceutical composition, and a therapeutic process for treating a subject having chronic obstructive pulmonary disease (COPD). Especially, the nucleic acid fragment, the pharmaceutical composition, and the therapeutic process are therapeutic-efficient for treating pulmonary fibrosis and emphysema of the subject, as demonstrated in this disclosure.
    Type: Application
    Filed: February 24, 2020
    Publication date: August 27, 2020
    Inventors: Cheng-Wen WU, Erh-Hsuan LIN, Ching-Huei LIN
  • Publication number: 20200266324
    Abstract: A method of bonding a light-emitting diode (LED) with a substrate includes providing a LED disposed on a bottom surface of a LED substrate; forming a first isolating layer entirely on a substrate; forming a second isolating layer on the first isolating layer within a first area corresponding to an N-type contact pad of the LED; forming a first conductive layer on the second isolating layer within the first area; forming a second conductive layer on the first isolating layer within a second area corresponding to a P-type contact pad of the LED; and bonding the LED to the substrate by connecting the N-type contact pad to the first conductive layer within the first area, and connecting the P-type contact pad to the second conductive layer within the second area.
    Type: Application
    Filed: February 20, 2019
    Publication date: August 20, 2020
    Inventors: Biing-Seng Wu, Hsing Ying Lee, Chao-Wen Wu
  • Publication number: 20200266767
    Abstract: A bias circuit for supplying a bias current to an RF power amplifier by using a field-effect transistor (FET) that is controlled by a logic control signal, such as a CMOS logic control signal, for turning on or turning off the bias current supplied to the RF power amplifier, wherein the bias current will be supplied to the RF power amplifier when the FET is on, and the bias current will not be supplied to the RF power amplifier when the FET is off.
    Type: Application
    Filed: February 20, 2019
    Publication date: August 20, 2020
    Inventors: Chih-Wen Wu, Szu-Yao Chu
  • Publication number: 20200258767
    Abstract: A vacuum transfer device includes a semiconductor substrate, which has a first hole disposed in a top portion of the semiconductor substrate; a nozzle disposed in a bottom portion of the semiconductor substrate and protruding downward, the nozzle being aligned with the first hole; and a second hole disposed through the nozzle and in the semiconductor substrate to meet the first hole.
    Type: Application
    Filed: February 11, 2019
    Publication date: August 13, 2020
    Inventors: Biing-Seng Wu, Chun-Jen Weng, Chao-Wen Wu
  • Publication number: 20200251058
    Abstract: A circuit arrangement for controlling a backlight source and an operation method are provided. The circuit arrangement includes a generator. The generator receives a sync signal and generates a pulse width modulation signal synchronous with the sync signal to control the backlight source. The sync signal indicates a frequency of a video including a series of image frames. The sync signal includes a sync period corresponding to a frame of the video. The pulse width modulation signal includes a first waveform pattern in a first sub-period of the sync period and a second waveform pattern in a second sub-period of the sync period. Each of the first waveform pattern and the second waveform pattern includes at least one active pulse. The first waveform pattern is substantially identical to the second waveform pattern.
    Type: Application
    Filed: April 22, 2020
    Publication date: August 6, 2020
    Applicant: Novatek Microelectronics Corp.
    Inventors: Chung-Wen Wu, Wen-Chi Lin, Jiun-Yi Lin
  • Publication number: 20200251388
    Abstract: The present invention relates to a semiconductor device and a method of forming the same, the semiconductor device includes a substrate, a gate structure, an insulating stacked structure and a first conductive layer. The gate structure is disposed on the substrate, and the insulating stacked structure covers the gate structure and the substrate to define a first opening thereinto expose a portion of the gate structure and a portion of the substrate. The first conductive layer covers surfaces of the first opening to directly contact the portion of the substrate and the portion of the gate structure, with the first conductive layer including two outer extension wings on a top surface of the insulating stacked structure.
    Type: Application
    Filed: April 21, 2020
    Publication date: August 6, 2020
    Inventors: Wen-Wu Wan, Tien-Hsiang Cheng, Kun-Hsuan Chung
  • Publication number: 20200251383
    Abstract: An interconnection structure includes a first dielectric layer, a bottom conductive feature present in the first dielectric layer, a second dielectric layer present on the first dielectric layer, an aluminum-containing etch stop layer present between the first dielectric layer and the second dielectric layer, an upper conductive via present at least in the second dielectric layer and electrically connected to the bottom conductive feature, and at least one aluminum-containing fragment present at least at a bottom corner of the upper conductive via.
    Type: Application
    Filed: April 17, 2020
    Publication date: August 6, 2020
    Inventors: Chung-Wen WU, Shiu-Ko JANGJIAN, Chien-Wen CHIU, Chien-Chung CHEN
  • Patent number: 10734341
    Abstract: A via or pillar structure, and a method of forming, is provided. In an embodiment, a polymer layer is formed having openings exposing portions of an underlying conductive pad. A conductive layer is formed over the polymer layer, filling the openings. The dies are covered with a molding material and a planarization process is performed to form pillars in the openings. In another embodiment, pillars are formed and then a polymer layer is formed over the pillars. The dies are covered with a molding material and a planarization process is performed to expose the pillars. In yet another embodiment, pillars are formed and a molding material is formed directly over the pillars. A planarization process is performed to expose the pillars. In still yet another embodiment, bumps are formed and a molding material is formed directly over the bumps. A planarization process is performed to expose the bumps.
    Type: Grant
    Filed: October 28, 2019
    Date of Patent: August 4, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ming-Che Ho, Yi-Wen Wu, Chien Ling Hwang, Hung-Jui Kuo, Chung-Shi Liu
  • Patent number: 10728575
    Abstract: Conventional intra-prediction uses pixels from left and upper neighbour blocks to predict a macroblock (MB). Thus, the MBs must be sequentially processed, since reconstructed left and upper MBs must be available for prediction. In an improved method for encoding Intra predicted MBs, a MB is encoded in two steps: first, a first portion of the MB is encoded independently, without references outside the MB. Pixels of the first portion can be Intra predicted using DC mode. Then, the first portion is reconstructed. The remaining pixels of the MB, being a second portion, are intra predicted from the reconstructed pixels of the first portion and then reconstructed. The first portion comprises at least one column or one row of pixels of the MB. The encoding is applied to at least two Intra predicted MBs per slice, or per picture if no slices are used.
    Type: Grant
    Filed: June 7, 2011
    Date of Patent: July 28, 2020
    Assignee: INTERDIGITAL VC HOLDINGS, INC.
    Inventor: Yu Wen Wu
  • Patent number: 10727095
    Abstract: A micro device transfer system includes a transfer head having pick-up electrodes for picking micro devices and thin-film transistors (TFTs) corresponding to the pick-up electrodes; a transfer head holder for holding the transfer head; a TFT driver board electrically connected to control the TFTs; a donor or acceptor substrate for carrying the micro devices; and a substrate holder for holding the donor or acceptor substrate.
    Type: Grant
    Filed: February 12, 2018
    Date of Patent: July 28, 2020
    Assignee: Prilit Optronics, Inc.
    Inventors: Biing-Seng Wu, Chao-Wen Wu
  • Patent number: 10725060
    Abstract: A method of tube slot localization is provided using a tray coordinate system and a camera coordinate system. The method includes receiving, a series of images from at least one camera of a tray comprising tube slots arranged in a matrix of rows and columns. Each tube slot is configured to receive a sample tube. The method also includes automatically detecting fiducial markers disposed on cross sectional areas between the tube slots on the tray and receiving an encoder value indicating when each row of the tray is substantially at the center of the camera's field of view. The method further includes determining calibration information to provide mapping of locations from the tray coordinate system to locations from the camera coordinate system and automatically aligning the tray based on the encoder value and calibration information.
    Type: Grant
    Filed: February 16, 2016
    Date of Patent: July 28, 2020
    Assignee: Siemens Healthcare Diagnostics Inc.
    Inventors: Yao-Jen Chang, Patrick Wissmann, Wen Wu, Guillaume Dumont, Benjamin Pollack, Terrence Chen
  • Publication number: 20200211956
    Abstract: A semiconductor package is provided. The semiconductor package includes a semiconductor die formed over an interconnect structure, an encapsulating layer formed over the interconnect structure to cover and surround the semiconductor die, and an interposer structure formed over the encapsulating layer. The interposer structure includes an insulating base having a first surface facing the encapsulating layer, and a second surface opposite the first surface. The interposer structure includes island layers arranged on the first surface of the insulating base and corresponding to the semiconductor die. A portion of the encapsulating layer is sandwiched by at least two of the island layers. Alternatively, the interposer structure includes a passivation layer covering the second surface of the insulating base and having a recess that is extended along a peripheral edge of the insulating base.
    Type: Application
    Filed: May 8, 2019
    Publication date: July 2, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yi-Wen WU, Techi WONG, Po-Hao TSAI, Po-Yao CHUANG, Shih-Ting HUNG, Shin-Puu JENG
  • Publication number: 20200211962
    Abstract: A package structure and method for forming the same are provided. The package structure includes a die structure formed over a first interconnect structure, and the die structure includes a first region and a second region. The package structure includes a dam structure formed on the first region of the die structure, and a second interconnect structure formed over the die structure and the dam structure. The package structure also includes a package layer formed between the first interconnect structure and the second interconnect structure, and the package layer is formed on the second region of the die structure to surround the dam structure.
    Type: Application
    Filed: April 10, 2019
    Publication date: July 2, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Po-Hao TSAI, Techi WONG, Meng-Liang LIN, Yi-Wen WU, Po-Yao CHUANG, Shin-Puu JENG
  • Patent number: 10700001
    Abstract: A method includes forming a first dielectric layer over a conductive pad, forming a second dielectric layer over the first dielectric layer, and etching the second dielectric layer to form a first opening, with a top surface of the first dielectric layer exposed to the first opening. A template layer is formed to fill the first opening. A second opening is then formed in the template layer and the first dielectric layer, with a top surface of the conductive pad exposed to the second opening. A conductive pillar is formed in the second opening.
    Type: Grant
    Filed: April 2, 2018
    Date of Patent: June 30, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Mirng-Ji Lii, Chung-Shi Liu, Chin-Yu Ku, Hung-Jui Kuo, Alexander Kalnitsky, Ming-Che Ho, Yi-Wen Wu, Ching-Hui Chen, Kuo-Chio Liu
  • Publication number: 20200203420
    Abstract: A light-emitting diode display is provided. The light-emitting diode display includes a substrate, a plurality of wires, a plurality of light-emitting areas, and at least one driver IC. The plurality of wires are formed on the substrate. The plurality of light-emitting areas include a light-emitting diode area and a virtual area. The plurality of light-emitting areas are arranged in a matrix. The virtual area of the plurality of light-emitting areas corresponds to each other. The driver IC is formed on the virtual area of the plurality of the light-emitting areas or on the plurality of the light-emitting areas.
    Type: Application
    Filed: December 24, 2018
    Publication date: June 25, 2020
    Inventors: Biing-Seng WU, CHAO-WEN WU
  • Publication number: 20200201623
    Abstract: An electronic device for updating on-board data of power off status is provided, which combines a rewritable memory, an embedded controller, and a second network socket onto a motherboard. The rewritable memory includes a target storage area. The embedded controller includes a second network interface electrically connected to the second network socket, for receiving a writing command and a binary file. After receiving power of a standby mode, the embedded controller executes a data writing program to receive the writing command and the binary file via the second network socket and the second network interface, and writes the binary data file into the target storage area of the rewritable memory by using the data writing program.
    Type: Application
    Filed: December 9, 2019
    Publication date: June 25, 2020
    Inventors: Chih-Jen Hou, Hsin-Teng Fu, Ming-Hsun Lee, Shang-Wen Wu, Dee-Lun Tsai
  • Publication number: 20200204827
    Abstract: Conventional intra-prediction uses pixels from left and upper neighbour blocks to predict a macroblock (MB). Thus, the MBs must be sequentially processed, since reconstructed left and upper MBs must be available for prediction. In an improved method for encoding Intra predicted MBs, a MB is encoded in two steps: first, a first portion of the MB is encoded independently, without references outside the MB. Pixels of the first portion can be Intra predicted using DC mode. Then, the first portion is reconstructed. The remaining pixels of the MB, being a second portion, are intra predicted from the reconstructed pixels of the first portion and then reconstructed. The first portion comprises at least one column or one row of pixels of the MB. The encoding is applied to at least two Intra predicted MBs per slice, or per picture if no slices are used.
    Type: Application
    Filed: February 28, 2020
    Publication date: June 25, 2020
    Inventor: Yu Wen WU
  • Patent number: 10692443
    Abstract: A synchronous backlight device and an operation method thereof are provided. The synchronous backlight device includes a pulse width modulation (PWM) control circuit and a backlight driving circuit. The PWM control circuit receives the video sync information from a video processing circuit and generates a PWM control signal. Wherein, the video sync information defines a plurality of video frame periods, the PWM control circuit at least divides each of the video frame periods into a first period and a second period, the lengths of the first periods of the video frame periods are equal to one another. The frequency of the PWM control signal in the first periods is different from the frequency of the PWM control signal in the second periods. The backlight driving circuit drives the backlight source of a display panel in accordance with the PWM control signal.
    Type: Grant
    Filed: November 30, 2017
    Date of Patent: June 23, 2020
    Assignee: Novatek Microelectronics Corp.
    Inventors: Chung-Wen Wu, Wen-Chi Lin, Sih-Ting Wang
  • Publication number: 20200185284
    Abstract: A bottom emission microLED display includes a microLED disposed above a transparent substrate; a light guiding layer surrounding the microLED to controllably guide light generated by the microLED towards the transparent substrate; and a reflecting layer formed over the light guiding layer to reflect the light generated by the microLED downwards and to confine the light generated by the microLED to prevent the light from leaking upwards or sidewards.
    Type: Application
    Filed: February 18, 2020
    Publication date: June 11, 2020
    Inventors: Biing-Seng Wu, Chao-Wen Wu
  • Patent number: 10679155
    Abstract: A dispatching method and system based on multiple levels of steady state production rate in working benches are provided. The dispatching method includes the following steps: receiving a plurality of real-time streaming data regarding a plurality of products being produced by a plurality of productive working benches; grouping the production rate values comprised in each real-time streaming data according to a first data binning technique, so as to produce a first steady state production rate value corresponding to each real-time streaming data; grouping the production rate values comprised in each real-time streaming data according to a second data binning technique, so as to produce a second steady state production rate value corresponding to each real-time streaming data; and determining a dispatching message of a to-be-produced product according to a portion of the first steady state production rate values and a portion of the second steady state production rate values.
    Type: Grant
    Filed: October 23, 2017
    Date of Patent: June 9, 2020
    Assignee: Institute For Information Industry
    Inventors: Tsung-Lin Wu, Wei-Wen Wu, Yin-Jing Tien, Yi-Chang Chen, Yi-Hsin Wu, Cheng-Juei Yu