Abstract: A system and method is disclosed for a scalable and robust network troubleshooting framework for VPN backbones addressing scalability and data imperfection. The framework takes advantage of lattice data structures to identify multi-dimensional hierarchical events that occur frequently across multiple data sources. Correlation schemes and inference rules are created for diagnosing network events and generating actionable reports for important events.

Abstract: A coated article having a substrate coated with a layer of silica nanoparticles is provided. The coating is substantially uniform in thickness, durably adheres to the substrate, and provides antireflection and or hydrophilic surface properties to the substrate.

Abstract: Aspects of the present invention describe soft imprint lithography methods capable of preparing structural features on surfaces. Disclosed methods include surmounting a deformable substrate, having an original form, with a composition, wherein the deformable substrate is capable of achieving at least one predetermined deformed state; predictably deforming said deformable substrate from its original form to the at least one predetermined deformed state; and transferring at least a portion of the composition surmounting the deformed substrate to a receiving substrate.

Abstract: A method for manufacturing a FinFET device includes: providing a substrate having a mask disposed thereon; covering portions of the mask to define a perimeter of a gate region; removing uncovered portions of the mask to expose the substrate; covering a part of the exposed substrate with another mask to define at least one fin region; forming the at least one fin and the gate region through both masks and the substrate, the gate region having side walls; disposing insulating layers around the at least one fin and onto the side walls; disposing a conductive material into the gate region and onto the insulating layers to form a gate electrode, and then forming source and drain regions.

Abstract: A method of selectively and electrolessly depositing a metal onto a substrate having a metallic patterned-nanostructure surface is disclosed. The method includes providing a tool having a patterned-nanostructure surface, the patterned-nanostructure surface having surface regions having a nanostructured surface, replicating the tool patterned-nanostructure surface onto a substrate to form a substrate patterned-nanostructure surface, disposing a metal layer on the substrate patterned-nanostructure surface to form a metallic patterned-nanostructure surface region, forming a self-assembled monolayer on the metallic patterned-nanostructure surface region, exposing the self-assembled monolayer to an electroless plating solution comprising a deposit metal, and depositing electrolessly the deposit metal selectively on the surface regions having a metallic nanostructured surface. Articles formed from this method are also disclosed.

Abstract: Methodologies and gate etching processes are presented to enable the fabrication of gate conductors of semiconductor devices, such as NFETs and/or PFETs, which are equipped with nano-channels. In one embodiment, a sacrificial spacer of equivalent thickness to the diameter of the gate nano-channel is employed and is deposited after patterning the gate conductor down to the gate dielectric. The residue gate material that is beneath the nano-channel is removed utilizing a medium to high density, bias-free, fluorine-containing or fluorine- and chlorine-containing isotropic etch process without compromising the integrity of the gate. In another embodiment, an encapsulation/passivation layer is utilized. In yet further embodiment, no sacrificial spacer or encapsulation/passivation layer is used and gate etching is performed in an oxygen and nitrogen-free ambient.

Abstract: Disclosed are a flexible polymer, particles made from same, and a process for preparing the particles. This flexible polymer is obtained from copolymerizing monomer (A) and monomer (B), wherein monomer (A) is one or more water-insoluble unsaturated diene monomers; monomer (B) is at least one compound with the general formula of wherein R is C1-C12alkyl, C1-C12 alkyl aryl, C1-C12 alkyl ether or C1-C12alkyl ester. Monomer (A) is in an amount of 60-90% by weight of the total combined weight of monomer (A) and monomer (B). Monomer (B) is in an amount of 10-40% by weight of the total combined weight of monomer (A) and monomer (B). The flexible polymer particles show excellent flexibility, deformability, elasticity as well as stability. They can be used in oilfields in nearby wellbore profile control and in-depth profile control or as in-depth flooding fluid diverting agents.

Abstract: A method for forming a microelectronic structure uses a mask layer located over a target layer. The target layer may be etched while using the mask layer as an etch mask to form an end tapered target layer from the target layer. An additional target layer may be formed over the end tapered target layer and masked with an additional mask layer. The additional target layer may be etched to form a patterned additional target layer separated from the end tapered target layer and absent an additional target layer residue adjacent the end tapered target layer. The method is useful for fabricating CMOS structures including nFET and pFET gate electrodes comprising different nFET and pFET gate electrode materials.

Abstract: This invention discloses the new uses of Lophatherum Total Flavones in medical, pharmaceutical, and healthcare fields. Lophatherum Total Flavones have effects of anti-bacteria, inhibiting bacteria, anti-inflammation, anti-prostatic hyperplasia, anti-platelet aggregation, anti-tumor, and promotion of immunity, etc., with safety and without toxicity, suitable for chronic oral administration, and especially suitable for prevention and treatment of senile chronic degenerative diseases; Lophatherum Total Flavones may be used in fields of pharmaceutical and foods, as a natural drug for prevention and treatment of prostatitis, prostatic hyperplasia, and prostate cancer, or as a dietary supplement.

Abstract: Embodiments described herein provide communication control features and functionality, but are not so limited. In an embodiment, a computing environment includes an access control component that can use a number of access states to control access to computing data and/or services. In one embodiment, a server computer can control access to data and/or services using a number of access states including, but not limited to: an allowed state, a blocked state, a device discovery state, and/or a quarantined state. Other embodiments are available.

Abstract: A device is provided that in one embodiment includes a substrate having a first region and a second region, in which a semiconductor device is present on a dielectric layer in the first region of the substrate and a resistive structure is present on the dielectric layer in the second region of the substrate. The semiconductor device may include a semiconductor body and a gate structure, in which the gate structure includes a gate dielectric material present on the semiconducting body and a metal gate material present on the gate dielectric material. The resistive structure may include semiconductor material having a lower surface is in direct contact with the dielectric layer in the second region of the substrate. The resistive structure may be a semiconductor containing fuse or a polysilicon resistor. A method of forming the aforementioned device is also provided.

Abstract: A method for processing CMOS wells, and performing multiple ion implantations with the use of a single hard mask is disclosed. The method includes forming and patterning a hardmask over a substrate, whereby the hardmask attains a first opening. The substrate may be a semiconductor substrate. The method further includes performing a first ion implantation, during which, outside the first opening the hardmask is essentially preventing ions from reaching the substrate. The method further involves the application of a photoresist in such a manner that the photoresist is covering the hardmask, and it is also filling up the first opening. This is followed by using the photoresist to pattern the hardmask, whereby the hardmask attains a second opening. The method further includes performing a second ion implantation, during which, outside the second opening, the hardmask and the photoresist, which fills the first opening, are essentially preventing ions from reaching the substrate.

Abstract: A method for detecting polarizing direction of electromagnetic wave includes disposing a carbon nanotube structure in a vacuum environment, irradiating a surface of the carbon nanotube structure by an electromagnetic wave with a polarizing direction while rotating the carbon nanotube structure, and determining the polarizing direction of the electromagnetic wave according to change of the visible light emitted from the carbon nanotube structure. The carbon nanotube structure includes a plurality of carbon nanotubes arranged along a substantially same direction. The carbon nanotube structure can absorb the electromagnetic wave and emit a visible light. The rotating axis is substantially perpendicular to the surface of the carbon nanotube structure irradiated by the electromagnetic wave.

Abstract: A method of fabricating semiconductor structure is provided in which at least one nFET device and a least one pFET device are formed on a semiconductor substrate. Each device region formed includes a dielectric stack that has a net dielectric constant equal to or greater than silicon dioxide. Gate stacks are provided on each of the dielectric stacks, wherein one of the gate stacks includes a metal gate electrode located atop a surface of a thinned polygate electrode.

Abstract: The present invention in various embodiments relates to a variety of different types of fluidic adaptive lens systems, pumping systems for implementation in such lens systems, other systems employing such lens systems, and related methods of fabrication. In at least some embodiments, the present invention relates to a lens system that includes a reservoir having at least one flexible wall, a first actuator coupled in relation to the reservoir, and a terminal at which is located at least one of an integrated fluidic lens and a port configured to be coupled to an external fluidic lens. The terminal is coupled to at least one of the reservoir and the actuator, and at least one of the actuator and a first pumping system including the actuator is capable of causing fluid to be moved at least one of from the reservoir toward the terminal, and from the terminal toward the reservoir.

Abstract: A method of forming patterning multilayer metal gate structures for complementary metal oxide semiconductor (CMOS) devices includes performing a first etch process to remove exposed portions of a polysilicon layer included within a gate stack, the polysilicon layer formed on a metal layer also included within the gate stack; oxidizing an exposed top portion of the metal layer following the first etch process so as to create an metal oxide layer having an etch selectivity with respect to the polysilicon layer; removing the metal oxide layer through a combination of a physical ion bombardment thereof, and the introduction of an isotropic chemical component thereto so as to prevent oxide material at bottom corners of the polysilicon layer; and performing a second etch process to remove exposed portions of the metal layer.

Abstract: An advanced method of patterning a gate stack including a high-k gate dielectric that is capped with a high-k gate dielectric capping layer such as, for example, a rare earth metal (or rare earth like)-containing layer is provided. In particular, the present invention provides a method in which a combination of wet and dry etching is used in patterning such gate stacks which substantially reduces the amount of remnant high-k gate dielectric capping material remaining on the surface of a semiconductor substrate to a value that is less than 1010 atoms/cm2, preferably less than about 109 atoms/cm2.

Abstract: Methodologies and gate etching processes are presented to enable the fabrication of gate conductors of semiconductor devices, such as NFETs and/or PFETs, which are equipped with nano-channels. In one embodiment, a sacrificial spacer of equivalent thickness to the diameter of the gate nano-channel is employed and is deposited after patterning the gate conductor down to the gate dielectric. The residue gate material that is beneath the nano-channel is removed utilizing a medium to high density, bias-free, fluorine-containing or fluorine- and chlorine-containing isotropic etch process without compromising the integrity of the gate. In another embodiment, an encapsulation/passivation layer is utilized. In yet further embodiment, no sacrificial spacer or encapsulation/passivation layer is used and gate etching is performed in an oxygen and nitrogen-free ambient.

Abstract: A method for making a waveguide comprises (a) providing a waveguide structure comprising a substrate (22), a lower cladding (20) layer on the substrate, and a core layer (24) comprising silicon nitride, amorphous silicon, or amorphous silicon-germanium alloy on the lower cladding layer; (b) patterning the core layer; and (c) annealing (28) the waveguide structure.

Abstract: The invention relates to a composition containing total triterpenoid sapogenins extracted from bamboo, the preparation method and use thereof. These total triterpenoid sapogenins are extracted from many parts of bamboo such as bamboo shavings in Gramineae by CO2 Supercritical Fluid Extraction technique. In the extract, the content of total triterpenoid sapogenins is 10-90%, while the contents of friedelin and lupenone are 5-35% and 1-10%, respectively. The extract in the invention has good physiological and pharmacological activities such as anti-free radical, anti-oxidation, anti-tumor and anti-hypertension. It can be used in medicines or functional foods for the treatment or prevention of cardiovascular and cerebrovascular diseases and tumor. It is also useful in cosmetics field.