Abstract: Methodologies and gate etching processes are presented to enable the fabrication of gate conductors of semiconductor devices, such as NFETs and/or PFETs, which are equipped with nano-channels. In one embodiment, a sacrificial spacer of equivalent thickness to the diameter of the gate nano-channel is employed and is deposited after patterning the gate conductor down to the gate dielectric. The residue gate material that is beneath the nano-channel is removed utilizing a medium to high density, bias-free, fluorine-containing or fluorine- and chlorine-containing isotropic etch process without compromising the integrity of the gate. In another embodiment, an encapsulation/passivation layer is utilized. In yet further embodiment, no sacrificial spacer or encapsulation/passivation layer is used and gate etching is performed in an oxygen and nitrogen-free ambient.

Abstract: An apparatus for detecting electromagnetic wave includes an electromagnetic wave sensor, a first electrode and a second electrode spaced from each other and electrically connected to the electromagnetic wave sensor, and a measuring device electrically connected to the first electrode and the second electrode. The electromagnetic wave sensor includes a carbon nanotube structure. The carbon nanotube structure includes a plurality of carbon nanotubes extending along a same direction from the first electrode to the second electrode. The measuring device is capable of measuring resistance of the carbon nanotube structure.

Abstract: A method for detecting an electromagnetic wave includes: providing a carbon nanotube structure including a plurality of carbon nanotubes arranged along a same direction. The carbon nanotube structure is irradiated by an electromagnetic wave to be measured. The resistance of the carbon nanotube structure irradiated by the electromagnetic wave is measured.

Abstract: Techniques for fabricating nanowire/microwire-based solar cells are provided. In one, a method for fabricating a solar cell is provided. The method includes the following steps. A doped substrate is provided. A monolayer of spheres is deposited onto the substrate. The spheres include nanospheres, microspheres or a combination thereof The spheres are trimmed to introduce space between individual spheres in the monolayer. The trimmed spheres are used as a mask to pattern wires in the substrate. The wires include nanowires, microwires or a combination thereof A doped emitter layer is formed on the patterned wires. A top contact electrode is deposited over the emitter layer. A bottom contact electrode is deposited on a side of the substrate opposite the wires.

Abstract: Method for providing a transistor that includes the steps of providing a silicon on insulator layer, providing a silicon oxide insulation layer, providing a dielectric layer, removing at least a portion of the silicon oxide insulation layer and the dielectric layer to form a gate stack, and forming a gate electrode. The gate electrode covers a portion of the gate stack.

Abstract: A method is provided of making a gated semiconductor device. Such method can include patterning a single-crystal semiconductor region of a substrate to extend in a lateral direction parallel to a major surface of a substrate and to extend in a direction at least substantially vertical and at least substantially perpendicular to the major surface, the semiconductor region having a first side and a second side opposite, e.g., remote from the first side. A first gate may be formed overlying the first side, the first gate having a first gate length in the lateral direction. A second gate may be formed overlying the second side, the second gate having a second gate length in the lateral direction which is different from the first gate length. In one embodiment, the second gate length may be shorter than the first gate length. In one embodiment, the first gate may consist essentially of polycrystalline silicon germanium and the second gate may consist essentially of polysilicon.

Abstract: The PhoU protein is a widely expressed protein in bacteria, but not in eukaryotes. The PhoU protein is required for persister formation in bacteria. The invention includes compositions to reduce persister formation and their use as therapeutic agents. The invention further includes methods for identification of compounds to reduce persister formation. The invention further includes kits for the identification of agents that modulate the activity and expression of PhoU.

Abstract: Channel depth in a field effect transistor is limited by an intra-layer structure including a discontinuous film or layer formed within a layer or substrate of semiconductor material. Channel depth can thus be controlled much in the manner of SOI or UT-SOI technology but with less expensive substrates and greater flexibility of channel depth control while avoiding floating body effects characteristic of SOI technology. The profile or cross-sectional shape of the discontinuous film may be controlled to an ogee or staircase shape to improve short channel effects and reduce source/drain and extension resistance without increase of capacitance. Materials for the discontinuous film may also be chosen to impose stress on the transistor channel from within the substrate or layer and provide increased levels of such stress to increase carrier mobility. Carrier mobility may be increased in combination with other meritorious effects.

Abstract: A method and device providing a strained Si film with reduced defects is provided, where the strained Si film forms a fin vertically oriented on a surface of a non-conductive substrate. The strained Si film or fin may form a semiconductor channel having relatively small dimensions while also having few defects. The strained Si fin is formed by growing Si on the side of a relaxed SiGe block. A dielectric gate, such as, for example, an oxide, a high “k” material, or a combination of the two, may be formed on a surface of the strained Si film. Additionally, without substantially affecting the stress in the strained Si film, the relaxed SiGe block may be removed to allow a second gate oxide to be formed on the surface previously occupied by the relaxed SiGe block.

Abstract: A composite having (a) a substrate that has opposing first and second surfaces, the substrate being at least 90% transmissive in visible light and has less than 5% haze, (b) a nanostructured article including a matrix and a nanoscale dispersed phase and having a random nanostructured anisotropic surface; and (c) an optically clear adhesive disposed on the second surface of the substrate.

Abstract: A method for fabricating metal gate and polysilicon gate FET devices on the same chip is disclosed. The method avoids the use of two separate masks during gate stack fabrication of the differing gates. By using a single mask, tighter NFET to PFET distances can be achieved, and the fabrication process is simplified. After blanket disposing layers for the fabrication of the metal gate stack, a covering protective material layer is formed, again in blanket fashion. A block level mask is used to clear the surface for the gate insulator formation in the poly gate device regions. During oxidation, which forms the gate dielectric for the poly gate devices, the protective material prevents damage of the metal gate device regions. Following oxidation, a single common polysilicon cover is disposed in blanket manner for continuing the fabrication of the gate stacks. The protective material is selected in such a way to be either easily removable upon oxidation, or to be conductive upon oxidation.

Abstract: A multifunctional optical film for enhancing light extraction includes a flexible substrate, a structured layer having nanoparticles of different sizes, and a backfill layer. The structured layer effectively uses microreplicated diffractive or scattering nanostructures located near enough to the light generation region to enable extraction of an evanescent wave from an organic light emitting diode (OLED) device. The backfill layer has a material having an index of refraction different from the index of refraction of the structured layer. The backfill layer also provides a planarizing layer over the structured layer in order to conform the light extraction film to a layer of an OLED display device. The film may have additional layers added to or incorporated within it to an emissive surface in order to effect additional functionalities beyond improvement of light extraction efficiency.

Abstract: 8-quinolinol (8Q) and derivatives thereof for use in the treatment of proliferative diseases such as cancer, in particular slow metabolizing quiescent cancer stem cells.

Abstract: A semiconductor structure includes a first finFET and a second finFET. The first finFET and the second finFET may comprise an n-finFET and a p-finFET to provide a CMOS finFET structure. Within the semiconductor structure, at least one of: (1) a first gate dielectric within the first finFET and a second gate dielectric within the second finFET comprise different gate dielectric materials; and/or (2) a first gate electrode within the first finFET and a second gate electrode within the second finFET comprise different gate electrode materials.

Abstract: Methods for fabricating a CMOS structure use a first gate stack located over a first orientation region of a semiconductor substrate. A second gate material layer is located over the first gate stack and a laterally adjacent second orientation region of the semiconductor substrate. A planarizing layer is located upon the second gate material layer. The planarizing layer and the second gate material layer are non-selectively etched to form a second gate stack that approximates the height of the first gate stack. An etch stop layer may also be formed upon the first gate stack. The resulting CMOS structure may comprise different gate dielectrics, metal gates and silicon gates.

Abstract: A semiconductor device includes a semiconductor substrate having at least one gap, extending under a portion of the semiconductor substrate. A gate stack is on the semiconductor substrate. A strain layer is formed in at least a portion of the at least one gap. The strain layer is formed only under at least one of a source region and a drain region of the semiconductor device.

Abstract: A multifunctional optical film for enhancing light extraction includes a flexible substrate, a structured layer, a high index backfill layer, and an optional passivation layer. The structured layer effectively uses microreplicated diffractive or scattering nanostructures located near enough to the light generation region to enable extraction of an evanescent wave from an organic light emitting diode (OLED) device. The backfill layer has a material having an index of refraction different from the index of refraction of the structured layer. The backfill layer also provides a planarizing layer over the structured layer in order to conform the light extraction film to a layer of an OLED display device. The film may have additional layers added to or incorporated within it to an emissive surface in order to effect additional functionalities beyond improvement of light extraction efficiency.

Abstract: A semiconductor device includes a semiconductor substrate having at least one gap, extending under a portion of the semiconductor substrate. A gate stack is on the semiconductor substrate. A strain layer is formed in at least a portion of the at least one gap. The strain layer is formed only under at least one of a source region and a drain region of the semiconductor device.

Abstract: A method for implementing message service interworking is provided. The method includes: receiving, by a message service interworking module serving a receiver, an instant message sent by a sender; selecting, by the message service interworking module, a circuit switched domain (CS domain) or packet switched domain (PS domain) as a routing network; selecting, by the message service interworking module, a routing entity in the conventional CS domain or PS domain; and converting, by the message service interworking module, the instant message into a short message, and sending the short message to the receiver through the selected routing entity. A system and a message service interworking module for implementing message service interworking are also provided.

Abstract: Diagnostic and prognostic methods, compositions, assays, and kits useful for predicting the phenotype of subjects who have, or are at risk of developing, a mental disorder. The methods also include predicting the prognostic outcome of a subject's mental disorder as well as the subject's responsiveness to drug treatments for the mental disorder. The methods and kits include determining the allelic status of polymorphisms in the MAOA, TPH2 and DRD2 genes.