Split core circuit module

- Entorian Technologies, LP

Flexible circuitry is populated with integrated circuitry (ICs) disposed along one or both major sides. Contacts distributed along the flexible circuitry provide connection between the module and an application environment. A rigid substrate configured with wings diverging from a central axis to create, preferably, a ‘V’-shaped structure provide supportive structure for the populated flex circuitry that is wrapped about an edge of the substrate.

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Description
RELATED APPLICATIONS

This application is a continuation-in-part of U.S. patent application Ser. No. 11/364,489, filed Feb. 27, 2006 now U.S. Pat. No. 7,289,327 and a continuation-in-part of U.S. patent application Ser. No. 11/283,355, filed Nov. 18, 2005, and a continuation-in-part of U.S. patent application Ser. No. 11/255,061, filed Oct. 19, 2005, and a continuation-in-part of U.S. patent application Ser. No. 10/934,027 filed Sep. 3, 2004. These four U.S. patent applications are hereby incorporated by reference.

TECHNICAL FIELD

The present invention relates to systems and methods for creating high density circuit modules and, in particular, to systems and methods for creating such modules that provide high capacity with thermal management features.

BACKGROUND

Memory expansion is one of the many fields where high density circuit module solutions provide space-saving advantages. For example, the well-known DIMM (Dual In-line Memory Module) has been used for years, in various forms, to provide memory expansion. A typical DIMM includes a conventional PCB (printed circuit board) with memory devices and supporting digital logic devices mounted on both sides. The DIMM is typically mounted in the host computer system by inserting a contact-bearing edge of the DIMM into a card edge connector. Typically, conventional DIMM-based solutions have typically provided only a moderate amount of memory expansion.

As bus speeds have increased, fewer devices per channel can bc reliably addressed with a DIMM-based solution. For example, 288 ICs or devices per channel may be addressed using the SDRAM-100 bus protocol with an unbuffered DLMM. Using the DDR-200 bus protocol, approximately 144 devices may be addressed per channel. With the DDR2-400 bus protocol, only 72 devices per channel may be addressed. This constraint has led to the development of the .fully-buffered DIMM (FB-DIMM) with buffered Command Address (C/A) and data in which 288 devices per channel may be addressed. That buffering function is provided by what is typically identified as the Advanced Memory Buffer or AMB. With the FB-DIMM, not only has capacity increased, pin count has declined to approximately 69 signal pins from the approximately 240 pins previously required.

The FB-DIMM circuit solution is expected to offer practical motherboard memory capacities of up to about 192 gigabytes with six channels and eight DIMMs per channel and two ranks per DIMM using one gigabyte DRAMs. This solution should also be adaptable to next generation technologies and should exhibit significant downward compatibility. The FB-DIMM solution does, however, generate significant thermal energy, particularly about the AMB.

There are several known methods to improve the limited capacity of a DIMM or other circuit board. In one strategy, for example, small circuit boards (daughter cards) are connected to the DIMM to provide extra mounting space.

In another strategy, multiple die package (MDP) can also be used to increase DIMM capacity. This scheme increases the capacity of the memory devices on the DIMM by including multiple semiconductor die in a single device package. The additional heat generated by the multiple die typically requires, however, additional cooling capabilities to operate at maximum operating speed. Further, the MDP scheme may exhibit increased costs because of increased yield loss from packaging together multiple die that are not fully pre-tested.

Stacked packages are yet another way to increase module capacity. Capacity is increased by stacking packaged integrated circuits to create a high-density circuit module for mounting on the larger circuit board. In some techniques, flexible conductors are used to selectively interconnect packaged integrated circuits. Staktek Group L.P., the assignee of the present application, has developed numerous systems for aggregating CSP (chipscale packaged) devices in space saving topologies. The increased component height of some stacking techniques may, however, alter system requirements such as, for example, required cooling airflow or the minimum spacing around a circuit board on its host system.

Typically, the known methods for improved memory module performance or enlarged capacity raise thermal management issues. For example, when a conventional packaged DRAM is mounted on a DIMM, the primary thermal path is through the balls of the package into the core of what is typically an epoxy based FR4 board that has less than desirable thermal characteristics. In particular, when an advanced memory buffer (AMB) is employed in an FM-DIMM, a significant amount of heat is generated. Consequently, the already marginal thermal shedding attributes of DIMM circuit modules is exacerbated in a typical FB-DIMM by the localized generation of heat by the AMB.

Memory DIMMs, both buffered and unbuffered, are often employed on motherboards mounted in server racks with limited space. Large capacity memory devices often have dimensions that create addition height issues (in the longitudinal direction away from the mounting socket).

What is needed, therefore, are methods and structures for providing high capacity circuit boards in thermally-efficient, reliable designs, that provide in some modes, the opportunity for concomitant reduction in module height.

SUMMARY

Flexible circuitry is populated with integrated circuitry (ICs) disposed along one or both major sides. Contacts distributed along the flexible circuitry provide connection between the module and an application environment. A rigid substrate configured with wings diverging from a central axis to create, preferably, a ‘V’-shaped structure provide supportive structure for the populated flex circuitry that is wrapped about an edge of the substrate.

In some embodiments, the wings are configured to include one or more extra heat dissipating surfaces while others may include added heat dissipating structures alone one or more external sides of the module. In some embodiments, the upper surfaces of ICs populated along a surface of the flex circuitry are in thermal contact with the wings of the substrate while, if present, ICs disposed along the other side of the flex circuitry exhibit upper surfaces disposed away from the ‘V’-shaped structure. Thermally conductive rigid side pieces may be attached to the rigid substrate and/or disposed in thermal contact with top surfaces of such oppositely-disposed ICs.

Some embodiments are server systems that include multiple circuit modules. Air channels may be formed between such multiple circuit modules to direct cooling air flow and such channels may be formed by single or multiple rows of modules.

DESCRIPTION OF DRAWINGS

FIG. 1 depicts an exemplary substrate as may be employed in an embodiment of the present invention.

FIG. 2 is a perspective view of an exemplary substrate as may be employed in a preferred embodiment of a circuit module in accord with an embodiment.

FIG. 3 depicts a layout view of a flex populated with ICs upon the depicted side according to one embodiment.

FIG. 4 depicts a layout view of a flex circuit depicting a second side of a flex circuit such as the flex circuitry shown in FIG. 3 and, in this embodiment, populated with ICs and an AMB.

FIG. 5 depicts an exemplary circuit module in accordance with the present invention.

FIG. 6 depicts an exemplar substrate to which has been fitted a cooling attachment.

FIG. 7 depicts an exemplar module in which a cooling structure has been mounted within a ‘V’ channel of the exemplary circuit module.

FIG. 8 depicts an exemplar circuit module in accord with an embodiment.

FIG. 9 depicts a perspective view of several circuit modules arranged to form cooling channels.

FIG. 10 depicts an exemplary circuit module with ICs mounted in a ‘V’ channel of the module.

DETAILED DESCRIPTION

FIG. 1 depicts an exemplary substrate 14 as may be employed in some embodiments of the present invention. Depicted substrate 14 includes flex circuit strain projections 16 to accommodate flexion of flexible circuitry 12 induced when populated flex circuitry 12 is disposed about edge 15 of substrate 14 and ICs populated along flex circuitry 12 are disposed along illustrated wings 14A and 14B of substrate 14. As shown, wings 14A and 14B of substrate 14 diverge to form channel 13 between wings 14A and 14B. Those of skill will appreciate that although a “V” shape is efficient and provides advantages such as profile control and thermal improvements, wings 14A and 14B need not create a V shape and may diverge from a central portion of substrate 14 in other configurations in addition to or besides a “V”. Wings 14A and 14B also include optional radiative projections 14R as shown in the depiction of this embodiment of substrate 14.

FIG. 2 is a perspective view of a preferred substrate 14 as may be employed in a preferred embodiment of a V core circuit module.

FIG. 3 depicts a layout view of a flex circuit and ICs populated upon the depicted side according to one embodiment. Depicted is an exemplar conductive trace 21 connecting rows CR1, CR2 of module contacts 20 to ICs 18. Those of skill will understand that there are many such traces in a typical embodiment. Traces 21 may also connect to vias that may transit to other conductive layers of flex 12 in certain embodiments having more than one conductive layer. In a preferred embodiment, vias connect ICs 18 on side 9 of flex 12 to module contacts 20. Rows of ICs ICR1 and ICR2 are mounted along respective IC-bearing portions of flex 12. An example via is shown as reference 23. Traces 21 may make other connections between the ICs on either side of flex 12 and may traverse the rows of module contacts 20 to interconnect ICs.

Together the various traces and vias make interconnections needed to convey data and control signals amongst the various ICs and buffer circuits. Those of skill will understand that the present invention may be implemented with only a single row of module contacts 20 and may, in other embodiments, be implemented as a module bearing ICs on only one side of flex circuit 12.

FIG. 4 depicts side 9 of flex circuit 12 depicting a second side of the flex circuit shown in FIG. 3 which, in the depicted embodiment, is populated with ICs and an AMB. Those of skill will recognize that flex circuitry 12 need not be populated with an AMB and that such circuits are merely one of many optional devices that may be populated along flex circuitry 12.

Consequently, side 9 of flex circuit 12 is shown as being populated with multiple CSPs 18 and AMB circuit 19. Other embodiments may not be FB-DIMMS and may therefore have no AMB circuit 19. Side 9 includes fields F1 and F2 that each include at least one mounting contact array site for CSPs and, in the depicted case, include multiple contact arrays. Each of fields F1 and F2 include, in the depicted preferred embodiment, two pluralities of ICs similar to those identified in earlier FIG. 3 as ICR1 and ICR2.

FIG. 5 depicts an exemplar circuit module 100 that exhibits a V core. As shown, in V core module 100, flex circuitry (flex circuit, flexible circuitry, flexible circuit) 12 is disposed about edge 15 of substrate 14. One or more integrated circuits (ICs) 18 are mounted along sides 8 and 9 of flex circuitry 12. In some embodiments, ICs 18 may be memory devices in chip scale packaging (CSP) packages. Some embodiments employ dual-die packaged ICs arranged on along increased-height wings 14A and 14B. This is advantageous because some dual packages may present one or more outer dimensions longer than typical single-die packages. The profiles shown for ICs 18 are, however, structures to indicate just some configurations of the many ICs that may be employed as ICs 18 in some embodiments. While some modules 100 may be employed as memory modules, other configurations of module 100 may have a primary function other that memory such as, for example, communications or graphics.

In general, substrate 14 is formed in the shape of a ‘Y,’ with a central portion 14C that branches into two wings 14A and 14B that deviate away from the centerline of portion 14C in the shape of a ‘V.’ Other embodiments may have wings that diverge at other angles than that depicted and, in some cases, the wings may not form a V but a “U”. In some embodiments, the ‘Y’ shape of the substrate 14 may permit larger ICs 18 to be used while still meeting space specifications devised for traditional DIMMs. In some embodiments, substrate 14 may be made in whole or part of metal (e.g., copper, aluminum, iron, metal alloys) or other thermally conductive material, thereby conducting heat away from the ICs 18 to provide a cooling effect. Other constructions may be employed for substrate 14 such as, for example, a ‘Y’ outer profile and a solid or honeycombed interior, or a ‘U’ shaped interior channel, or rectangular channel 13.

In some embodiments, the ‘Y’ shape of substrate 14 may provide for comparatively greater surface area than is provided by a traditional DIMM. Preferably, convective surface area is greatly increased, on the order of 500%. Further, the depicted design provides convection cooling properties to the inner depicted sets of ICs 18 populated along inner side 9 of flex circuitry 12, by being so disposed to have an individual heat conduction path through wings 14A and 14B to the depicted ‘V’ channel 13 convective cooling area. The ‘V’ channel 13 in the depicted embodiment allows air to flow into the center of the V core module 100 to provide a temperature regulating effect.

An optional extensions 14R are shown extending from wings 14A and 14B. In some embodiments, extensions 14R may increase the surface area of the V core module 100 that may be used for temperature regulation. In some embodiments, extensions 14R may provide a surface against which an insertion force may be applied.

V core module 100 includes optional members 50A and 50B. Members 50A-50B are mounted to V core module 100 by a mount 55A and a mount 55B, which may be constructed as clips, clamps, or other joining structures. Some embodiments may not include mounts but instead employ thermally conductive adhesive, pressure sensitive adhesive (PSA), metal bonds, or other suitable attachment schemes. In some embodiments, members 50A and 50B may be made of metal or other thermally conductive material, and/or include features that may provide additional surface area for regulating the temperature of V core module 100. For example, members 50A and 50B may include fins that increase the surface area of members 50A and 50B that may be used for thermal management. Members 50A and 50B may be constructed of the same or different material from the remainder of substrate 14. They may be copper, for example, while the main body of substrate 14 may be comprised of aluminum, to name just one example. Another example could be a plastic bodied substrate 14 and a copper-based members 50A and 50B. In some embodiments, mounts 55 may be made of metal or other thermally conductive material. Preferably mount 55 may provide a path that encourages the heat energy flow between substrate 14 and sides members 50A and 50B.

Inner ICs 18I preferably have their top surfaces 22 in thermal connection to respective wings 14A and 14B of substrate 14, while the top surfaces 22 of outer (or external) ICs 18E are preferably in thermal communication with members 50A and 50B. Such thermal connection may be enhanced by thermally conductive adhesive or thermal grease, for example.

Those of skill in the art will recognize, after appreciating this disclosure, that substrate 14 may be comprised of more than one piece, but still exhibit the principles disclosed herein. The depicted embodiments dispose the populated area of flex circuit 12 on an outer surface of wings 14A and 14B, leaving all or a substantial area of ‘V’ channel 13 available for thermal management structures, such as fins or other temperature regulating features. FIG. 6 depicts an exemplar substrate 14 to which has been fitted a cooling attachment 56 having radiative fingers 57 and, as shown, cooling attachment 56 is disposed in channel 13 into which it may be clipped or set. No flex circuitry is shown in FIG. 6 to allow attention to be case unimpeded upon the substrate and cooling component 56. In some embodiments, cooling component 56 may be made of metal or other thermally conductive material. For example, cooling component 56 may be made of aluminum, and heat energy may be conduced between V core module 100 and cooling component 56 to provide thermal management for V core module 100. In some embodiments, cooling component 56 may be formed so a substantial amount of the surface of cooling component 56 may come into thermal contact with the sides of the ‘V’ trench. In some embodiments, cooling component 56 may include additional cooling features. For example, cooling component 56 may include fins 57 or other features that may collect or radiate thermal energy. In some embodiments, cooling component 56 may include a conduit as shown, for example, for use of fluids to enhance thermal shedding from module 100. For example, cooling component 56 may be constructed as a heat sink to provide thermal management for V core module 100. In some embodiments, cooling component 56 may include active cooling features, such as fans or thermoelectric devices (e.g., peltier junctions, p-junctions).

In some embodiments, the thin construction of flex circuit 12 may allow flex circuit 12 to conform to the shape of substrate 14. Further, thin flex circuit 12 construction provides a low flex circuit thermal impedance to allow the transfer of thermal energy through flex circuit 12. Those of skill will also recognize that a variety of construction methods may be employed to maintain mechanical integrity of module 100. Preferably, thermally conductive bonds such as metal bonding or thermally conductive epoxy secure flex circuit 12 in place.

The ICs 18 depicted along flexible circuit 12 are shown as chip-scale packaged memory devices of small scale. For purposes of this disclosure, the term chip-scale or “CSP” shall refer to integrated circuitry of any function with an array package providing connection to one or more die through contacts (often embodied as “bumps” or “balls” for example) distributed across a major surface of the package or die. CSP does not refer to leaded devices that provide connection to an integrated circuit within the package through leads emergent from at least one side of the periphery of the package such as, for example, a Thin Small Outline Package (TSOP).

Various embodiments may employ leaded or CSP devices or other devices in both packaged and unpackaged forms but where the term CSP is used, the above definition for CSP should be adopted. Consequently, although CSP excludes leaded devices, references to CSP are to be broadly construed to include the large variety of array devices (and not to be limited to memory only) and whether die-sized or other size such as BGA and micro BGA as well as flip-chip. As those of skill will understand after appreciating this disclosure, some embodiments of the present invention may be devised to employ stacks of ICs each disposed where an IC 18 is indicated. Multiple integrated circuit die may be included in a package depicted as a single IC 18.

While in this embodiment, memory ICs are used to provide a memory expansion board or module, and various embodiments may include a variety of integrated circuits and other components. Such variety may include microprocessors, FPGAs, RF transceiver circuitry, digital logic, as a list of non-limiting examples, or other circuits or systems that may benefit from a high-density circuit board or module capacity. In some embodiments, V core module 100 may be a memory device, but the principles of the invention may be employed with a variety of devices such as, for example, a microprocessor or graphics processor employed in a circuit module while other embodiments will consist essentially of memory ICs only. In some embodiments, the ‘V’ channel 13 may provide a mounting area where additional features may be attached or inserted, examples of which being later shown here.

For example, as shown in FIG. 7, a cooling conduit 60 may be mounted within the ‘V’ channel 13 for transporting fluids to remove heat energy from the V core module 100. Conduit 60 provides a path through which a fluid (e.g., air, water, coolant, antifreeze, oil, Freon, nitrogen, helium, ammonia) may flow to add or remove heat energy from the conduit 60, and, in turn, V core module 100. In some embodiments, conduit 60 may formed as cylindrical tube, an elliptical tube, or other shaped single passageway. For example, conduit 60 may encompass substantially the entire cross-sectional area of channel 13, thereby causing cooling component 60 to be formed as a three dimensional V-shaped member. In some embodiments, conduit 60 may be formed as a number of conduits such as, for example, two or more passageways that may allow coolant to flow through several paths within channel 13. Conduit 60 may also appear in cross section as a honeycomb of fluid passageways.

FIG. 8 depicts a perspective view of an exemplary V core module 100. The V core module 100 includes a number of module contacts 20 disposed along each side of the V core module 100. In some embodiments, contacts 20 need not be on both sides of the V core module 100 and may be exhibited on only one side the V core module 100.

FIG. 9 depicts a perspective view of an arrangement 900 of several V core modules 100 arranged to form cooling channels. In general, two or more V core modules 100 may be arranged in parallel to create channels between two neighboring V core modules 100 through which a fluid, such as air, may flow to provide thermal management for V core modules 100.

Arrangement 900 includes a substrate 910. In some embodiments, substrate 910 may be a printed circuit board (e.g., a computer motherboard or other computer system, which may include a memory controller and/or microprocessor using the memory, for example, as server memory.). A number of V core modules 100 are mounted to substrate 910 by a number of mounts 920. In some embodiments, the mounts 920 may be connectors that provide support for V core modules 100 and/or provide conductive pathways between V core modules 100 and substrate 910. The mounts 920 are arranged on substrate 910 so V core modules 100 are mounted substantially parallel to each other, and spaced apart such that one, or a number of a cooling channel 930 is formed. For example, two V core modules 100 may be mounted next to each other so the upper right arm of the first V core module 100 is in close proximity to the upper left arm of the second V core module 100, and channel 930 may be formed under the adjacent arms through which air may flow. Air, or other fluid, may thereby be directed through channels 930 to provide thermal management for the V core modules 100. The arrows depicted in FIG. 9 show exemplar cooling air flow. While two-directional flow is shown in adjacent channels, one-directional flow and any combination of flow direction with redirecting air ducts may be employed to achieve thermal management air flow along similar channels in various embodiments.

FIG. 10 depicts an exemplary V core module 100 according to another embodiment having ICs mounted along the interior region of the ‘V’-shaped channel 13. The V core module 100 depicted in FIG. 10, uses the space inside the ‘V’ channel 13 to mount additional ICs. The depicted embodiment has what are going to be identified as inner and outer ICs 19 along flex circuit 12 and which are disposed in channel 13 of substrate 14. As the depicted embodiment illustrates, ICs 18 (both 18I (inner) and 18E (outer)) are also disposed along flex circuitry 12 and ICs 18I are in thermal communication with wings 14A and 14B of substrate 14.

Flex circuitry 12 is preferably made from one or more conductive layers supported by one or more flexible substrate layers. As those of skill will recognize, flexible circuit 12 may be comprised of more than one individual flex circuit although there are substantial construction advantages to having a unitary flex circuitry along which are mounted the ICs. The construction of flex circuitry is known in the art.

Although the present invention has been described in detail, it will be apparent to those skilled in the art that many embodiments taking a variety of specific forms and reflecting changes, substitutions and alterations can be made without departing from the spirit and scope of the invention. Therefore, the described embodiments illustrate but do not restrict the scope of the claims.

Claims

1. A circuit module comprising:

a rigid substrate having a central leg portion with an edge and first and second wings, the wings diverging from each other and the central leg portion extending therfrom to form a ‘Y’-shaped structure; and
a flex circuit having first and second sides, the first side of the flex circuit having plural contacts adapted for connection to a circuit board socket and one of the first and second sides of the flex circuit being populated with plural memory CSPs, the flex circuit being disposed about the edge of the rigid substrate to place the first CSP-bearing portion alongside at least one of the wings of the substrate and contacts of the plural contacts being adjacent to both sides of the central leg portion of the rigid substrate.

2. The circuit module of claim 1 in which the flex circuit is populated with CSPs along its first and second sides.

3. The circuit module of claim 1 in which the rigid substrate is comprised of thermally conductive material.

4. The circuit module of claim 1 in which the rigid substrate is comprised of aluminum.

5. The circuit module of claim 1 in which the rigid substrate is comprised of copper.

6. The circuit module of claim 1 in which the rigid substrate is comprised of non-metallic material that is thermally-conductive.

7. The circuit module of claim 1 further comprising a first heat radiating portion in thermal connection with the first wing of the substrate.

8. The circuit module of claim 1 further comprising thermal members disposed along outer sides of the circuit module.

9. The circuit module of claim 1 further comprising a cooling component disposed in a channel formed by the first and second wings of the substrate.

10. The circuit module of claim 9 in which the cooling component includes at least one cooling fluid conduit.

11. A circuit module comprising:

A rigid substrate having a central leg portion with an edge and first and second wings, the wings diverging from each other, and the central portion extends therefrom to form ‘Y’-shaped structure; and
a flex circuit having plural edge connector contacts and first and second sides populated with chip scale packaged ICs, the flex circuit being disposed about the rigid substrate to place areas of the first and second sides that bear the chip scale packaged ICs along the first and second wings of the rigid substrate.

12. The circuit module of claim 11 in which the flex circuit is populated with at least one advanced memory buffer.

13. The circuit module of claim 11 in which the rigid substrate is comprised of thermally-conductive material.

14. The circuit module of claim 11 further comprising a first heat radiating member in contact with top surfaces of at least some of the chip scale packaged ICs populating the flex circuit.

15. The circuit module of claim 14 further comprising a second heat radiating portion in contact with top surfaces of at least some others of the chip scale packaged ICs populating the flex circuit.

16. The circuit module of claim 14 further comprising a first mount piece securing the first heat radiating member in relation to the substrate.

17. The circuit module of claim 14 further comprising a cooling component mounted in a channel formed by the first and second wing portions of the substrate.

18. The circuit module of claim 14 in which the cooling component includes at least one cooling fluid conduit.

19. The circuit module of claim 14 in which the rigid substrate is comprised of metallic thermally-conductive material.

20. The circuit module of claim 14 in which the cooling component exhibits fins.

21. A circuit module comprising:

a rigid substrate having a central portion with an edge and first and second wings which diverge from each other, and the central portion extends therefrom and a flex circuit having plural edge connector contact, the flex circuit being disposed edge of the about the rigid substrate and having first and second device-bearing portions with plural memory devices mounted thereto, the first device bearing portions arranged alongside the first wing of the substrate such that the plural devices mounted thereto present top surfaces disposed away from the rigid substrate, the second device bearing portion being disposed alongside the second wing of the substrate.

22. The circuit module of claim 21 further comprising a cooling component mounted in a channel formed by the first and second wings of the substrate.

23. The circuit module of claim 22 in which the cooling component includes at least one cooling fluid conduit.

24. The circuit module of claim 22 further comprising a first heat radiating member. in contact with top surfaces of the plural memory devices.

25. The circuit module of claim 24 further comprising a first mount piece securing the first heat radiating member in relation to the substrate.

Referenced Cited
U.S. Patent Documents
3372310 March 1968 Kantor
3436604 April 1969 Hyltin
3582865 June 1971 Franck et al.
3654394 April 1972 Gordon
3704455 November 1972 Scarbrough
3718842 February 1973 Abbott, III et al.
3727064 April 1973 Bottini
3746934 July 1973 Stein
3766439 October 1973 Isaacson
3772776 November 1973 Weisenburger
4169642 October 2, 1979 Mouissie
4288841 September 8, 1981 Gogal
4342069 July 27, 1982 Link
4429349 January 31, 1984 Zachry
4437235 March 20, 1984 McIver
4513368 April 23, 1985 Houseman
4547834 October 15, 1985 Dumont et al.
4567543 January 28, 1986 Miniet
4587596 May 6, 1986 Bunnell
4645944 February 24, 1987 Uya
4656605 April 7, 1987 Clayton
4672421 June 9, 1987 Lin
4682207 July 21, 1987 Akasaki et al.
4696525 September 29, 1987 Coller et al.
4709300 November 24, 1987 Landis
4724611 February 16, 1988 Hagihara
4727513 February 23, 1988 Clayton
4733461 March 29, 1988 Nakano
4739589 April 26, 1988 Brehm et al.
4763188 August 9, 1988 Johnson
4771366 September 13, 1988 Blake et al.
4821007 April 11, 1989 Fields et al.
4823234 April 18, 1989 Konishi et al.
4833568 May 23, 1989 Berhold
4850892 July 25, 1989 Clayton et al.
4862249 August 29, 1989 Carlson
4911643 March 27, 1990 Perry et al.
4953060 August 28, 1990 Lauffer et al.
4956694 September 11, 1990 Eide
4972580 November 27, 1990 Nakamura
4982265 January 1, 1991 Watanabe et al.
4983533 January 8, 1991 Go
4985703 January 15, 1991 Kaneyama
4992849 February 12, 1991 Corbett et al.
4992850 February 12, 1991 Corbett et al.
5014115 May 7, 1991 Moser
5014161 May 7, 1991 Lee et al.
5016138 May 14, 1991 Woodman
5025306 June 18, 1991 Johnson et al.
5034350 July 23, 1991 Marchisi
5041015 August 20, 1991 Travis
5053853 October 1, 1991 Haj-Ali-Ahmadi et al.
5065277 November 12, 1991 Davidson
5099393 March 24, 1992 Bentlage et al.
5104820 April 14, 1992 Go et al.
5109318 April 28, 1992 Funari et al.
5117282 May 26, 1992 Salatino
5119269 June 2, 1992 Nakayama
5138430 August 11, 1992 Gow, 3rd et al.
5138434 August 11, 1992 Wood et al.
5140405 August 18, 1992 King et al.
5159535 October 27, 1992 Desai et al.
5173840 December 22, 1992 Kodai et al.
5191404 March 2, 1993 Wu et al.
5208729 May 4, 1993 Cipolla et al.
5214845 June 1, 1993 King et al.
5219377 June 15, 1993 Poradish
5222014 June 22, 1993 Lin
5224023 June 29, 1993 Smith et al.
5229916 July 20, 1993 Frankeny et al.
5229917 July 20, 1993 Harris et al.
5239198 August 24, 1993 Lin et al.
5241454 August 31, 1993 Ameen et al.
5241456 August 31, 1993 Marcinkiewiez et al.
5247423 September 21, 1993 Lin et al.
5252857 October 12, 1993 Kane et al.
5259770 November 9, 1993 Bates et al.
5261068 November 9, 1993 Gaskins et al.
5268815 December 7, 1993 Cipolla et al.
5276418 January 4, 1994 Klosowiak et al.
5281852 January 25, 1994 Normington
5285398 February 8, 1994 Janik
5289062 February 22, 1994 Wyland
5309986 May 10, 1994 Itoh
5313097 May 17, 1994 Haj-Ali-Ahmadi et al.
5347428 September 13, 1994 Carson et al.
5362656 November 8, 1994 McMahon
5375041 December 20, 1994 McMahon
5386341 January 31, 1995 Olson et al.
5394300 February 28, 1995 Yoshimura
5397916 March 14, 1995 Normington
5400003 March 21, 1995 Kledzik
5428190 June 27, 1995 Stopperan
5438224 August 1, 1995 Papageorge et al.
5448511 September 5, 1995 Paurus et al.
5477082 December 19, 1995 Buckley, III et al.
5491612 February 13, 1996 Nicewarner, Jr. et al.
5502333 March 26, 1996 Bertin et al.
5523619 June 4, 1996 McAllister et al.
5523695 June 4, 1996 Lin
5541812 July 30, 1996 Burns
5572065 November 5, 1996 Burns
5600178 February 4, 1997 Russell
5612570 March 18, 1997 Eide et al.
5631193 May 20, 1997 Burns
5642055 June 24, 1997 Difrancesco
5644161 July 1, 1997 Burns
5646446 July 8, 1997 Nicewarner et al.
5654877 August 5, 1997 Burns
5661339 August 26, 1997 Clayton
5686730 November 11, 1997 Laudon et al.
5688606 November 18, 1997 Mahulikar et al.
5708297 January 13, 1998 Clayton
5714802 February 3, 1998 Cloud et al.
5717556 February 10, 1998 Yanagida
5729894 March 24, 1998 Rostoker et al.
5731633 March 24, 1998 Clayton
5744862 April 28, 1998 Ishii
5751553 May 12, 1998 Clayton
5754409 May 19, 1998 Smith
5764497 June 9, 1998 Mizumo
5776797 July 7, 1998 Nicewarner, Jr. et al.
5789815 August 4, 1998 Tessier et al.
5790447 August 4, 1998 Laudon et al.
5802395 September 1, 1998 Connolly et al.
5805422 September 8, 1998 Otake et al.
5828125 October 27, 1998 Burns
5835988 November 10, 1998 Ishii
5869353 February 9, 1999 Levy et al.
5899705 May 4, 1999 Akram
5917709 June 29, 1999 Johnson et al.
5925934 July 20, 1999 Lim
5926369 July 20, 1999 Ingraham et al.
5949657 September 7, 1999 Karabatsos
5953214 September 14, 1999 Dranchak et al.
5953215 September 14, 1999 Karabatsos
5959839 September 28, 1999 Gates
5963427 October 5, 1999 Bollesen
5973395 October 26, 1999 Suzuki et al.
5995370 November 30, 1999 Nakamori
6002167 December 14, 1999 Hatano et al.
6002589 December 14, 1999 Perino et al.
6008538 December 28, 1999 Akram et al.
6014316 January 11, 2000 Eide
6021048 February 1, 2000 Smith
6025992 February 15, 2000 Dodge et al.
6028352 February 22, 2000 Eide
6028365 February 22, 2000 Akram et al.
6034878 March 7, 2000 Osaka et al.
6038132 March 14, 2000 Tokunaga et al.
6040624 March 21, 2000 Chambers et al.
6049975 April 18, 2000 Clayton
6060339 May 9, 2000 Akram et al.
6072233 June 6, 2000 Corisis et al.
6078515 June 20, 2000 Nielsen et al.
6084294 July 4, 2000 Tomita
6091145 July 18, 2000 Clayton
6097087 August 1, 2000 Farnworth et al.
6111757 August 29, 2000 Dell et al.
6121676 September 19, 2000 Solberg
RE36916 October 17, 2000 Moshayedi
6157541 December 5, 2000 Hacke
6172874 January 9, 2001 Bartilson
6178093 January 23, 2001 Bhatt et al.
6180881 January 30, 2001 Isaak
6187652 February 13, 2001 Chou et al.
6205654 March 27, 2001 Burns
6208521 March 27, 2001 Nakatsuka
6208546 March 27, 2001 Ikeda
6214641 April 10, 2001 Akram
6215181 April 10, 2001 Akram et al.
6215687 April 10, 2001 Sugano et al.
6222737 April 24, 2001 Ross
6222739 April 24, 2001 Bhakta et al.
6225688 May 1, 2001 Kim et al.
6232659 May 15, 2001 Clayton
6233650 May 15, 2001 Johnson et al.
6234820 May 22, 2001 Perino et al.
6262476 July 17, 2001 Vidal
6262895 July 17, 2001 Forthun
6265660 July 24, 2001 Tandy
6266252 July 24, 2001 Karabatsos
6281577 August 28, 2001 Oppermann et al.
6288907 September 11, 2001 Burns
6288924 September 11, 2001 Sugano et al.
6300679 October 9, 2001 Mukerji et al.
6316825 November 13, 2001 Park et al.
6323060 November 27, 2001 Isaak
6336262 January 8, 2002 Dalal et al.
6343020 January 29, 2002 Lin et al.
6347394 February 12, 2002 Ochoa et al.
6349050 February 19, 2002 Woo et al.
6351029 February 26, 2002 Isaak
6357023 March 12, 2002 Co et al.
6358772 March 19, 2002 Miyoshi
6360433 March 26, 2002 Ross
6368896 April 9, 2002 Farnworth et al.
6370668 April 9, 2002 Garrett, Jr. et al.
6376769 April 23, 2002 Chung
6392162 May 21, 2002 Karabatsos
6404043 June 11, 2002 Isaak
6410857 June 25, 2002 Gonya
6426240 July 30, 2002 Isaak
6426549 July 30, 2002 Isaak
6426560 July 30, 2002 Kawamura et al.
6428360 August 6, 2002 Hassanzadeh et al.
6433418 August 13, 2002 Fujisawa et al.
6444921 September 3, 2002 Wang et al.
6446158 September 3, 2002 Karabatsos
6449159 September 10, 2002 Haba
6452826 September 17, 2002 Kim et al.
6459152 October 1, 2002 Tomita et al.
6462412 October 8, 2002 Kamei et al.
6465877 October 15, 2002 Farnworth et al.
6465893 October 15, 2002 Khandros et al.
6472735 October 29, 2002 Isaak
6473308 October 29, 2002 Forthun
6486544 November 26, 2002 Hashimoto
6489687 December 3, 2002 Hashimoto
6502161 December 31, 2002 Perego et al.
6514793 February 4, 2003 Isaak
6521984 February 18, 2003 Matsuura
6528870 March 4, 2003 Fukatsu et al.
6531772 March 11, 2003 Akram et al.
6544815 April 8, 2003 Isaak
6552910 April 22, 2003 Moon et al.
6552948 April 22, 2003 Woo et al.
6560117 May 6, 2003 Moon
6566746 May 20, 2003 Isaak et al.
6572387 June 3, 2003 Burns et al.
6573593 June 3, 2003 Syri et al.
6576992 June 10, 2003 Cady et al.
6588095 July 8, 2003 Pan
6590282 July 8, 2003 Wang et al.
6600222 July 29, 2003 Levardo
6614664 September 2, 2003 Lee
6627984 September 30, 2003 Bruce et al.
6629855 October 7, 2003 North et al.
6646936 November 11, 2003 Hamamatsu et al.
6660561 December 9, 2003 Forthun
6661092 December 9, 2003 Shibata et al.
6677670 January 13, 2004 Kondo
6683377 January 27, 2004 Shim et al.
6690584 February 10, 2004 Uzuka et al.
6699730 March 2, 2004 Kim et al.
6712226 March 30, 2004 Woo et al.
6720652 April 13, 2004 Akram et al.
6721181 April 13, 2004 Pfeifer et al.
6721185 April 13, 2004 Dong et al.
6744656 June 1, 2004 Sugano et al.
6751113 June 15, 2004 Bhakta et al.
6756661 June 29, 2004 Tsuneda et al.
6760220 July 6, 2004 Canter et al.
6762942 July 13, 2004 Smith
6768660 July 27, 2004 Kong et al.
6833981 December 21, 2004 Suwabe et al.
6833984 December 21, 2004 Belgacem
6839266 January 4, 2005 Garrett, Jr. et al.
6841868 January 11, 2005 Akram et al.
6850414 February 1, 2005 Benisek et al.
6873534 March 29, 2005 Bhakta et al.
6878571 April 12, 2005 Isaak et al.
6884653 April 26, 2005 Larson
6914324 July 5, 2005 Rapport et al.
6919626 July 19, 2005 Burns
6956284 October 18, 2005 Cady et al.
7053478 May 30, 2006 Roper et al.
7094632 August 22, 2006 Cady et al.
7180167 February 20, 2007 Partridge et al.
7393226 July 1, 2008 Clayton et al.
7394149 July 1, 2008 Clayton et al.
20010013423 August 16, 2001 Dalal et al.
20010001085 May 10, 2001 Hassanzadeh et al.
20010006252 July 5, 2001 Kim et al.
20010015487 August 23, 2001 Forthun
20010026009 October 4, 2001 Tsuneda et al.
20010028588 October 11, 2001 Yamada et al.
20010035572 November 1, 2001 Isaak
20010040793 November 15, 2001 Inaba
20010052637 December 20, 2001 Akram et al.
20020001216 January 3, 2002 Sugano et al.
20020006032 January 17, 2002 Karabatsos
20020030995 March 14, 2002 Shoji
20020076919 June 20, 2002 Peters et al.
20020094603 July 18, 2002 Isaak
20020101261 August 1, 2002 Karabatsos
20020139577 October 3, 2002 Miller
20020164838 November 7, 2002 Moon et al.
20020180022 December 5, 2002 Emoto
20020185731 December 12, 2002 Akram et al.
20020196612 December 26, 2002 Gall et al.
20030002262 January 2, 2003 Benisek et al.
20030026155 February 6, 2003 Yamagata
20030035328 February 20, 2003 Hamamatsu et al.
20030045025 March 6, 2003 Coyle et al.
20030049886 March 13, 2003 Salmon
20030064548 April 3, 2003 Isaak
20030081387 May 1, 2003 Schulz
20030081392 May 1, 2003 Cady et al.
20030089978 May 15, 2003 Miyamoto et al.
20030090879 May 15, 2003 Doblar et al.
20030096497 May 22, 2003 Moore et al.
20030109078 June 12, 2003 Takahashi et al.
20030116835 June 26, 2003 Miyamoto et al.
20030159278 August 28, 2003 Peddle
20030168725 September 11, 2003 Warner et al.
20040000708 January 1, 2004 Rapport et al.
20040012991 January 22, 2004 Kozaru
20040021211 February 5, 2004 Damberg
20040150107 August 5, 2004 Cha et al.
20040229402 November 18, 2004 Cady et al.
20040236877 November 25, 2004 Burton
20050082663 April 21, 2005 Wakiyama et al.
20050108468 May 19, 2005 Hazelzet et al.
20050133897 June 23, 2005 Baek et al.
20050242423 November 3, 2005 Partridge et al.
20050263911 December 1, 2005 Igarashi et al.
20060020740 January 26, 2006 Bartley et al.
20060049513 March 9, 2006 Goodwin
20060050496 March 9, 2006 Goodwin
20060050497 March 9, 2006 Goodwin
20060053345 March 9, 2006 Goodwin
20060091529 May 4, 2006 Wehrly et al.
20060095592 May 4, 2006 Borkenhagen
20060111866 May 25, 2006 LeClerg et al.
20060125067 June 15, 2006 Wehrly et al.
20070211426 September 13, 2007 Clayton et al.
20070211711 September 13, 2007 Clayton
20070212906 September 13, 2007 Clayton et al.
20070212920 September 13, 2007 Clayton et al.
20080192428 August 14, 2008 Clayton et al.
Foreign Patent Documents
122-687 October 1984 EP
0 298 211 January 1989 EP
1 119049 July 2001 EP
2 130 025 May 1984 GB
53-85159 July 1978 JP
58-96756 June 1983 JP
3-102862 April 1991 JP
5-29534 February 1993 JP
5-335695 December 1993 JP
2821315 November 1998 JP
2001/077294 March 2001 JP
2001/085592 March 2001 JP
2001/332683 November 2001 JP
2002/009231 January 2002 JP
2003/037246 February 2003 JP
2003/086760 March 2003 JP
2003/086761 March 2003 JP
2003/309246 October 2003 JP
2003/347503 December 2003 JP
WO03/037053 May 2003 WO
WO 2004/109802 December 2004 WO
Other references
  • U.S. Appl. No. 11/306,803, filed Jan. 11, 2006, Chris Karabatsos.
  • Complaint filed Mar. 8, 2007, in the United States District Court for the District of Massachusetts, Boston Division, Civil Action No. 07 CA 10468 DPW.
  • Letter dated Sep. 11, 2006, from Chris Karabatsos of Kentron Technologies to John Kelly, President of JEDEC Solid State Technology Association, concerning potential interferences involving U.S. Appl. No. 11/306,803.
  • PCT/US05/28547 International Search Report and Written Opinion, PCT, Aug. 18, 2006.
  • PCT/US05/28547 Notification Concerning Transmittal of Copy of International Preliminary Report on Patentability, Mar. 15, 2007.
  • GB 0516622.8 Search Report, May 25, 2006.
  • PCT/US06/04690 International Search Report, PCT, Feb. 16, 2007.
  • PCT/US06/04690 International Search Report, PCT, Jul. 20, 2007.
  • PCT/US06/38720 International Search Report and Written Opinion, PCT, Apr. 5, 2007.
  • PCT/US06/06921 International Search Report and Written Opinion, PCT, Jun. 1, 2007.
  • PCT/US06/007193, International Search Report and Written Opinion, PCT, Nov. 7, 2007.
  • Pages 19-22 of Presentation by Netlist, Aug. 2004.
  • Flexible Printed Circuit Technology—A Versatile Interconnection Option. (Website 2 page) Fjelstad, Joseph. Dec. 3, 2002.
  • Die Products: Ideal IC Packaging for Demanding Applications—Advanced packaging that's no bigger than the die itself brings together high performance and high reliability with small size and low cost. (Website 3 pages with 2 figures) Larry Gilg and Chris Windsor. Dec. 23, 2002. Published on Internet.
  • Tessera uZ Ball Stack Package. 4 figures that purport to be directed to the uZ—Ball Stacked Memory, Published on the Internet.
  • Chip Scale Review Online—An Independent Journal Dedicated to the Advancement of Chip-Scale Electronics. (Webiste 9 pages) Fjelstad, Joseph, Pacific Consultants L.LC., Published Jan. 2001 on Internet.
  • Flexible Thinking: Examining the Flexible Circuit Tapes. (Website 2 pages) Fjelstad, Joseph., Published Apr. 20, 2000 on Internet.
  • Ron Bauer, Intel. “Stacked-CSP Delivers Flexibility, Reliability, and Space-Saving Capabilities”, vol. 3, Spring 2002. Published on the Internet.
  • Tessera Technologies, Inc.—Semiconductor Intellectual Property, Chip Scale Packaging—Website pp. 3, Internet.
  • Tessera Introduces uZ ä—Ball Stacked Memory Package for Computing and Portable Electronic Products Joyce Smaragdis, Tessera Public Relations, Sandy Skees, MCA PR (www.tessera.com/newsevents/presscoverage.cfm); 2 figures that purport to be directed to the uZ ä—Ball Stacked Memory Package. Published Jul. 17, 2002 in San Jose, CA.
  • William R. Newberry, Design Techniques for Ball Grid Arrays, Xynetix Design Systems, Inc., Portland, Maine, Published on the Internet.
  • Chip Scale Packaging and Redistribution, Paul A. Magill, Glenn A. Rinne, J. Daniel Mis, Wayne C. Machon, Joseph W. Baggs, Unitive Electronics Inc.
  • Dense-Pac Microsystems, 16 Megabit High Speed CMOS SRAM DPS1MX16MKn3.
  • Dense-Pac Microsystems, 256 Megabyte CMOS DRAM DP3ED32MS72RW5.
  • Dense-Pac Microsystems, Breaking Space Barriers, 3-D Technology 1993.
  • Dense-Pac Microsystems, DPS512X16A3, Ceramic 512K X 16 CMOS SRAM Module.
  • IBM Preliminary 168 Pin SDRAM Registered DIMM Functional Description & Timing Diagrams.
  • 3-D Interconnection for Ultra-Dense Multichip Modules, Christian VAL, Thomson-CSF DCS Computer Division, Thierry Lemoine, Thomson-CSF RCM Radar Countermeasures Division.
  • High Density Memory Packaging Technology High Speed Imaging Applications, Dean Frew, Texas Instruments Incorporated.
  • Vertically-Integrated Package, Alvin Weinberg, Pacesetter, Inc. and W. Kinzy Jones, Florida International University.
Patent History
Patent number: 7522421
Type: Grant
Filed: Jul 13, 2007
Date of Patent: Apr 21, 2009
Patent Publication Number: 20070258217
Assignee: Entorian Technologies, LP (Austin, TX)
Inventors: David L. Roper (Austin, TX), Douglas Wehrly, Jr. (Austin, TX), Mark Wolfe (Austin, TX)
Primary Examiner: Jayprakash N Gandhi
Assistant Examiner: Courtney Smith
Attorney: Fish & Richardson P.C.
Application Number: 11/777,925