Substrate for an electronic circuit
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Description
The broken lines shown in the drawings represent portions of the substrate for an electronic circuit that form no part of the claimed design.
Claims
The ornamental design for a substrate for an electronic circuit, as shown and described.
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Patent History
Patent number: D764424
Type: Grant
Filed: Aug 29, 2014
Date of Patent: Aug 23, 2016
Assignee: KABUSHIKI KAISHA TOSHIBA (Tokyo)
Inventors: Manabu Matsumoto (Yokohama), Isao Ozawa (Chigasaki)
Primary Examiner: Elizabeth J Oswecki
Application Number: 29/500,896
Type: Grant
Filed: Aug 29, 2014
Date of Patent: Aug 23, 2016
Assignee: KABUSHIKI KAISHA TOSHIBA (Tokyo)
Inventors: Manabu Matsumoto (Yokohama), Isao Ozawa (Chigasaki)
Primary Examiner: Elizabeth J Oswecki
Application Number: 29/500,896
Classifications
Current U.S. Class:
Semiconductor, Transistor Or Integrated Circuit (24) (D13/182)