Patents Issued in June 12, 2008
  • Publication number: 20080135802
    Abstract: A process for producing a lithium-containing composite oxide having a large volume capacity density, high safety, excellent durability for charge/discharge cycles, and further, excellent low temperature characteristics, which is suitable for mass production, is provided. A process for producing a lithium-containing composite oxide represented by a general formula LipNxMyOzFa (wherein N is at least one type of element selected from the group consisting of Co, Mn and Ni, M is at least one type of element selected from the group consisting of Al, an alkali earth metal element and a transition metal element other than N, 0.9?p?1.2, 0.97?x?1.00, 0<y?0.03, 1.9?z?2.2, x+y=1 and 0?a?0.
    Type: Application
    Filed: November 15, 2007
    Publication date: June 12, 2008
    Applicant: AGC Seimi Chemical Co., Ltd.
    Inventors: Naoshi Saito, Takeshi Kawasato, Tokumitsu Kato, Kazushige Horichi
  • Publication number: 20080135803
    Abstract: The invention relates to a high dielectric anisotropy liquid crystal compound which is a pyridyl derivative with substituents of electrons push-pull effect. Furthermore, the high dielectric anisotropy liquid crystal compounds are colorless and have high thermal and photo stability as well as high compatibility in a liquid crystal host. A liquid crystal composition containing the high dielectric anisotropy liquid crystal compound can reduce threshold voltage of cholesteric reflective displays, thus saving power and extending lifetime of driver ICs.
    Type: Application
    Filed: December 3, 2007
    Publication date: June 12, 2008
    Inventors: Kung-Lung Cheng, Shib-Hsien Liu, Ann-Cheng Chen, Peu-Jane Haung, Chih-Lung Chin
  • Publication number: 20080135804
    Abstract: The present invention discloses all-in-one organic electroluminescent inks for balanced charge injection. When of single layer organic lighting emitting diodes are made from these inks, the charge balance can be readily achieved. By using the invented all-in-one organic electroluminescent inks, both the device structure and the fabrication process are simplified, which will increase the production yield and reduce the production cost in manufacturing such devices. This invention also teaches methods to fabricate single layer all-in-one organic light emitting diodes.
    Type: Application
    Filed: December 8, 2006
    Publication date: June 12, 2008
    Inventors: Chunong Qiu, Steven Shuyong Xiao, Cindy X. Qiu
  • Publication number: 20080135805
    Abstract: The invention relates to a fluorescent pigment comprising a) a melamine-formaldehyde polycondensation product, b) a distyryl biphenyl fluorescent whitening agent (FWA) of the formula (1), in which R1 represents hydrogen, chlorine or C1-C4alkoxy and M represents hydrogen, an alkaline or alkaline earth metal, ammonium or ammonium that is mono-, di-, tri- or tetrasubstituted by C1-C4alkyl or C2-C4hydroxyalkyl and, optionally, c) at least one additional fluorescent whitening agent, a process for its preparation and use thereof for the fluorescent whitening of paper, especially in coating.
    Type: Application
    Filed: August 3, 2005
    Publication date: June 12, 2008
    Inventors: Fabienne Cuesta, Ted Deisenroth, Kamalesh Pai Fondekar, Ramachandra V. Joshi, Peter Rohringer, Uma Ganeshram, Josef Zelger
  • Publication number: 20080135806
    Abstract: Compositions comprising at least one phosphorescent organometallic compound and a polymer comprising structural units of formula II are useful in organic light emitting devices wherein R1, R2, and R4 are independently at each occurrence a C1-C20 aliphatic radical, a C3-C20 aromatic radical, or a C3-C20 cycloaliphatic radical; wherein R3 and R5 are independently selected from the group consisting of hydrogen, triphenylsilyl, t-butyl, mesityl, diphenyl phosphine oxide, and diphenyl phosphine sulfide; and a, b and d are independently 0 or an integer ranging from 1 to 3.
    Type: Application
    Filed: June 19, 2007
    Publication date: June 12, 2008
    Applicant: GENERAL ELECTRIC COMPANY
    Inventors: Qing Ye, Jie Liu, Kyle Erik Litz
  • Publication number: 20080135807
    Abstract: Systems and methods for production of fuel for an internal combustion engine are described herein. Systems may include a plasma reformer and an internal combustion engine. The plasma reformer may produce a gas stream from the liquid feed. The gas stream may include molecular hydrogen and carbon oxides. At least a portion of the gas stream may be provided to the internal combustion engine.
    Type: Application
    Filed: October 18, 2007
    Publication date: June 12, 2008
    Inventor: Charles Terrel Adams
  • Publication number: 20080135808
    Abstract: The immersion oil has refractive index which is 1.70 or more, and is low autofluorescence. Preferably, the main ingredient is iodine compounds (diiodomethane), and a solid having a high refractive index such as sulfur and the like is dissolved or dispersed into the immersion oil. The production method of the immersion oil has a purification process, in which impurities are removed preferably by adsorbent, distillation or recrystallized. In the method of preservation of the immersion oil, it is always contacted with the adsorbent. The preservation container of the immersion oil contains an adsorbent which is always contacted with the immersion oil.
    Type: Application
    Filed: November 27, 2007
    Publication date: June 12, 2008
    Applicant: Olympus Corporation
    Inventors: Hiroaki Kinoshita, Atsushi Niwa, Masahiro Satoh
  • Publication number: 20080135809
    Abstract: Compositions are provided comprising aqueous dispersions of electrically conducting organic polymers and a plurality of nanoparticles wherein pH can be adjusted for improved organic electronic device performance. Films deposited from invention compositions are useful as buffer layers in electroluminescent devices, such as organic light emitting diodes (OLEDs) and electrodes for thin film field effect transistors. Buffer layers containing nanoparticles may have a much lower conductivity than buffer layers without nanoparticles. In addition, when incorporated into an electroluminescent (EL) device, buffer layers according to the invention contribute to higher stress life of the EL device.
    Type: Application
    Filed: December 28, 2007
    Publication date: June 12, 2008
    Inventor: CHE-HSIUNG HSU
  • Publication number: 20080135810
    Abstract: The conductive polymer of the present invention is prepared by means of oxidation polymerization. On the matrix of the conductive polymer, at least one organic sulfonate formed by an anion of an organic sulfonic acid and a cation of other than transition metals is coated. Alternatively, in the matrix of the conductive polymer, at least one organic sulfonate formed by an anion of an organic sulfonic acid and a cation of other than transition metals is included. The conductive polymer of the present invention is excellent in the conductivity, heat resistance and moisture resistance. By using it as a solid electrolyte, a reliable solid electrolytic capacitor can be prepared which is unlikely to decrease the properties when being kept in a hot and humid condition.
    Type: Application
    Filed: November 15, 2007
    Publication date: June 12, 2008
    Applicant: TAYCA CORPORATION
    Inventors: Masaaki Tozawa, Ryosuke Sugihara
  • Publication number: 20080135811
    Abstract: An ink for forming CIGS photovoltaic cell active layers is disclosed along with methods for making the ink, methods for making the active layers and a solar cell made with the active layer. The ink contains a mixture of nanoparticles of elements of groups IB, IIIA and (optionally) VIA. The particles are in a desired particle size range of between about 1 nm and about 500 nm in diameter, where a majority of the mass of the particles comprises particles ranging in size from no more than about 40% above or below an average particle size or, if the average particle size is less than about 5 nanometers, from no more than about 2 nanometers above or below the average particle size. The use of such ink avoids the need to expose the material to an H2Se gas during the construction of a photovoltaic cell and allows more uniform melting during film annealing, more uniform intermixing of nanoparticles, and allows higher quality absorber films to be formed.
    Type: Application
    Filed: October 31, 2007
    Publication date: June 12, 2008
    Inventors: Dong Yu, Jacqueline Fidanza, Brian M. Sager
  • Publication number: 20080135812
    Abstract: An ink for forming CIGS photovoltaic cell active layers is disclosed along with methods for making the ink, methods for making the active layers and a solar cell made with the active layer. The ink contains a mixture of nanoparticles of elements of groups IB, IIIA and (optionally) VIA. The particles are in a desired particle size range of between about 1 nm and about 500 nm in diameter, where a majority of the mass of the particles comprises particles ranging in size from no more than about 40% above or below an average particle size or, if the average particle size is less than about 5 nanometers, from no more than about 2 nanometers above or below the average particle size. The use of such ink avoids the need to expose the material to an H2Se gas during the construction of a photovoltaic cell and allows more uniform melting during film annealing, more uniform intermixing of nanoparticles, and allows higher quality absorber films to be formed.
    Type: Application
    Filed: October 31, 2007
    Publication date: June 12, 2008
    Inventors: Dong Yu, Jacqueline Fidanza, Brian M. Sager
  • Publication number: 20080135813
    Abstract: The present invention provides a manufacturing method of a carbon nanotube composite which manufactures the carbon nanotube composite by integrally bonding a mixed powdery body which is formed by mixing a metal powdery body and carbon nanotubes. A mixed powdery body is pressurized in the uniaxial direction using the first mold and the second mold, and a strain stress is applied to the pressurized mixed powdery body in a non-heated state which applies no heat to the mixed powdery body from outside. The strain stress may be a stress generated by a rotational strain which is imparted to the mixed powdery body by rotating at least one mold of the first mold and the second mold with respect to another mold.
    Type: Application
    Filed: April 3, 2007
    Publication date: June 12, 2008
    Inventors: Kenji Kaneko, Tomoharu Tokunaga, Zenji Horita
  • Publication number: 20080135814
    Abstract: The present invention relates to a composition for manufacturing a separator for PEMFC (Proton Exchange Membrane Fuel Cell) and a separator for PEMFC manufactured out of the same. The composition provided by the present invention includes 70 to 80 parts by weight of graphite powder; 3 to 10 parts by weight of carbon fiber; 1 to 5 parts by weight of metal oxide selected from the group consisting of magnesium oxide, aluminum oxide, calcium oxide and their mixtures; and 10 to 30 parts by weight of thermosetting resin selected from the group consisting of vinyl ester resin, phenol resin, epoxy resin and their mixtures. The separator for PEMFC manufactured out of the composition of the present invention has excellent electrical conductivity, mechanical strength and impermeability to hydrogen or oxygen gas, thereby considerably improving the performance of a fuel cell.
    Type: Application
    Filed: November 28, 2007
    Publication date: June 12, 2008
    Inventor: Jhong-Ho Lee
  • Publication number: 20080135815
    Abstract: The invention is directed to carbon nanotube-containing compositions that have increased viscosity and stability. In particular, the invention is directed to methods for manufacturing carbon nanotube films and layers that provide superior electrical properties.
    Type: Application
    Filed: April 7, 2005
    Publication date: June 12, 2008
    Inventors: Paul J. Glatkowski, Joseph W. Piche, C. Michael Trottier, Philip Wallis, David J. Arthur, Jiazhong Luo
  • Publication number: 20080135816
    Abstract: The present invention relates to a process for preparing CNTs by bringing a carbon source into contact with a multivalent metal and/or metal-oxide-based catalyst deposited on an inorganic substrate having a BET specific surface area of greater than 50 m2/g. The CNTs obtained may be used as agents for improving the mechanical and electrical conductivity properties in polymeric compositions.
    Type: Application
    Filed: February 3, 2006
    Publication date: June 12, 2008
    Inventors: Serge Bordere, Daniel Cochard, Eric Duthilh, Patrice Gaillard, Dominique Plee
  • Publication number: 20080135817
    Abstract: A dielectric gaseous compound which exhibits the following properties: a boiling point in the range between about ?20° C. to about ?273° C.; non-ozone depleting; a GWP less than about 22,200; chemical stability, as measured by a negative standard enthalpy of formation (dHf<0); a toxicity level such that when the dielectric gas leaks, the effective diluted concentration does not exceed its PEL; and a dielectric strength greater than air.
    Type: Application
    Filed: December 12, 2006
    Publication date: June 12, 2008
    Inventors: Matthew H. Luly, Robert G. Richard
  • Publication number: 20080135818
    Abstract: Disclosed is an improved method and apparatus for installing a cable into cable guide tubing and the like. The method typically includes rotating a reel of cable guide tubing at least 360° while, using compressed gas, feeding a cable, such as a plurality of microducts, into the cable guide tubing. The related apparatus includes a cable injection unit and a rotation coupling unit to facilitate the installation of cable (e.g., microducts) into the rotating cable guide tubing.
    Type: Application
    Filed: November 21, 2007
    Publication date: June 12, 2008
    Applicant: DRAKA COMTEQ B.V.
    Inventors: Willem Griffioen, Willem Greven, Thomas Pothof, Patrick Menno Versteeg, Cornelis Van T Hul, Arie Van Wingerden
  • Publication number: 20080135819
    Abstract: A device (1) that compensates the weight of a suspended load, for example a tool or welding tongs, is provided as a spring tensioner with at least one barrel (4) or supporting wire that can be reeled off a barrel (3) against the force of a spring (2). The barrel (3) is supported on a shaft (6), to which the spring (2) engages directly with its interior end or via a sheath connected to the shaft (6), while the opposite exterior end of the spring (2) is mounted to the barrel (3) at the inside. A shaft drive (7) can be activated to change the pull force at the spring (2) via the shaft (6). The spring (2) is connected to the shaft drive (7) or to a drive wheel (8) allocated thereto via a freewheel.
    Type: Application
    Filed: December 5, 2007
    Publication date: June 12, 2008
    Applicant: CARL STAHL KROMER GMBH
    Inventors: Mohammad S. Achtari, Thomas Steinle
  • Publication number: 20080135820
    Abstract: A winged slat for a chain link fence having a front, a back, a first side, and a second side. A first wing or fin extends along and, in a substantially straight line, outward from the first side of the elongate body. A second wing or fin extends along and, in a substantially straight line, outward from the second side of the elongate body. Preferably the wings or fins extend the full length of the elongate body. The wings can be attached at any location to the side of the elongate body and can be at any angles to such sides. Furthermore, the two angles need not be the same.
    Type: Application
    Filed: August 10, 2007
    Publication date: June 12, 2008
    Inventor: Patrick R. Hoggan
  • Publication number: 20080135821
    Abstract: The present invention relates to a temporary safety barrier system, which comprises a plurality of posts, a plurality of mesh panels, and a plurality of mesh panel holders. Each mesh panel holder is mountable on a respective post of said plurality of posts, and comprises a post coupler and first and second mesh panel supports, which are attached in common to the post coupler. The post coupler is movable along the post when mounted thereon, and has a locking member for releasably locking the post coupler in a holding position at the post. The second mesh panel support encircles the post in the mounted state. Each mesh panel support has a support hook for receiving a mesh wire of one or more mesh panels. The temporary safety system is arranged to enable inclination of a mesh panel during said height adjustment, thereby facilitating the height adjustment while the mesh panels remain mounted.
    Type: Application
    Filed: May 17, 2006
    Publication date: June 12, 2008
    Applicant: Combisafe International AB
    Inventor: Joakim Svedberg
  • Publication number: 20080135822
    Abstract: A fence clip for holding a fence wire. The fence wire is carried by two spaced-apart lower legs of the fence clip. In an at-rest configuration no external forces are exerted on the fence clip; a spring-like tension force between a body and two spaced-apart upper legs urges the upper legs in contact with a rear surface of a T-post to restrain the fence clip against vertical movement along the T-post. In response to a force directed against the body, the tension force is overcome, permitting vertical movement of the fence dip along the T-post and corresponding vertical movement of the carried fence wire to increase the distance between adjacent fence wires to permit crossing the fence.
    Type: Application
    Filed: December 8, 2007
    Publication date: June 12, 2008
    Inventor: Gustavo Forero
  • Publication number: 20080135823
    Abstract: A top rail and customizable mid rail having a bottom side longitudinal track extending the length of the rail for holding the top portion of at least one planar article taken from the group of sheet, panel, board, plank, slat, and lath while optionally providing that the planar article provides outward projections within that portion contained within the top-rail track providing for potential linear movement while preventing vertical movement. Further providing for a customizable topside that is machine customizable to receive a either a planar article taken from the group of sheet, panel, board, plank, slat, and lath or a plurality of stanchions taken from the group of picket, post, pole rod, bar, shaft, bar, and lath and supported on a substantially co-planar platform interiorly extending the length of the rail spaced apart from the topside separating the interior cavity into a stanchion supporting portion and a structurally reinforced portion.
    Type: Application
    Filed: November 2, 2007
    Publication date: June 12, 2008
    Inventor: Michael Amendola
  • Publication number: 20080135824
    Abstract: A method and structure of a bistable resistance random access memory comprise a plurality of programmable resistance random access memory cells where each programmable resistance random access memory cell includes multiple memory members for performing multiple bits for each memory cell The bistable RRAM includes a first resistance random access member connected to a second resistance random access member through interconnect metal liners and metal oxide strips. The first resistance random access member has a first resistance value Ra, which is determined from the thickness of the first resistance random access member based on the deposition of the first resistance random access member. The second resistance random access member has a second resistance value Rb, which is determined from the thickness of the second resistance random access member based on the deposition of the second resistance random access member.
    Type: Application
    Filed: December 7, 2006
    Publication date: June 12, 2008
    Applicant: Macronix International Co., Ltd.
    Inventors: Erh-Kun Lai, ChiaHua Ho, Kuang Yeu Hsieh
  • Publication number: 20080135825
    Abstract: Provided are a phase-change memory device and a method of fabricating the same. The phase-change memory device includes a transistor disposed on a semiconductor substrate and including a gate electrode and first and second impurity regions disposed on both sides of the gate electrode; a bit line electrically connected to the first impurity region; and a phase-change resistor electrically connected to the second impurity region, wherein the phase-change resistor includes: a lower electrode formed of a doped SiGe layer; a phase-change layer contacting the lower electrode; and an upper electrode connected to the phase-change layer. The lower electrode is formed of the doped SiGe layer, which has a high resistivity and a low thermal conductivity, thereby reducing a reset current and the power consumption of the entire phase-change memory device.
    Type: Application
    Filed: November 7, 2007
    Publication date: June 12, 2008
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Seung Yun Lee, Sung Min Yoon, Nam-Yeal Lee, Young Sam Park, Byoung Gon Yu
  • Publication number: 20080135826
    Abstract: This invention presents a novel method to form uniform or heterogeneous, straight or curved and size-controllable nanostructures including, for example, nanotubes, nanowires, nanoribbons, and nanotapes, including SiNW, using a nanochannel template. In the case of semiconductor nanowires, doping can be included during growth. Electrode contacts are present as needed and may be built in to the template structure. Thus completed devices such as diodes, transistors, solar cells, sensors, and transducers are fabricated, contacted, and arrayed as nanowire or nanotape fabrication is completed. Optionally, the template is not removed and may become part of the structure. Nanodevices such as nanotweezers, nanocantilevers, and nanobridges are formed utilizing the processes of the invention.
    Type: Application
    Filed: June 27, 2007
    Publication date: June 12, 2008
    Inventors: Stephen Fonash, Yinghui Shan, Chih-Yi Peng, Ali Kaan Kalkan, Joseph D. Cuiffi, Daniel Hayes, Paul Butterfoss, Wook Jun Nam
  • Publication number: 20080135827
    Abstract: The invention concerns a conducting layer having a thickness of between 1 and 5 atoms, an insulated gate being formed over a part of the conducting layer.
    Type: Application
    Filed: September 25, 2007
    Publication date: June 12, 2008
    Applicant: STMicroelectronics Crolles 2 SAS
    Inventors: Benoit Froment, Etienne Robilliart
  • Publication number: 20080135828
    Abstract: A photoelectric converting film stack type solid-state image pickup device comprising: a semiconductor substrate in which a signal read circuit is formed; and at least one photoelectric converting film interposed between two electrode films, said at least one photoelectric converting film being stacked above the semiconductor substrate, wherein a signal corresponding to an intensity of incident light is read outside by the signal read circuit, the signal being generated by photoelectric conversion with the photoelectric converting film, wherein the photoelectric converting film comprises: a first layer comprising: an ultrafine particle including (i) a quantum dot contributing to the photoelectric conversion and (ii) a material having a band gap larger than that of the quantum dot, the quantum dot being coated with the material; and a hole transport layer stacked on the first layer.
    Type: Application
    Filed: January 9, 2008
    Publication date: June 12, 2008
    Applicant: Fujifilm Corporation
    Inventor: Toshiaki Fukunaga
  • Publication number: 20080135829
    Abstract: Provided is a nitride semiconductor light emitting device including: a first nitride semiconductor layer; an active layer formed above the first nitride semiconductor layer; and a “C (carbon)”-doped second nitride semiconductor layer formed above the active layer. According to the present invention, the crystallinity of the active layer is enhanced, and the optical power and the operation reliability are enhanced.
    Type: Application
    Filed: December 5, 2005
    Publication date: June 12, 2008
    Inventor: Suk Hun Lee
  • Publication number: 20080135830
    Abstract: Semiconductor structures are formed with semiconductor layers having reduced compositional variation. Top surfaces of the semiconductor layers are substantially haze-free.
    Type: Application
    Filed: December 21, 2007
    Publication date: June 12, 2008
    Applicant: AmberWave Systems Corporation
    Inventors: Richard Westhoff, Christopher J. Vineis, Matthew T. Currie, Vicky K. Yang, Christopher W. Leitz
  • Publication number: 20080135831
    Abstract: An optoelectronic circuit includes a resonant cavity formed on a substrate and into which is injected an input digital optical signal that encodes bits of information (each bit representing an OFF logic level or an ON logic level). A heterojunction thyristor device, formed in the resonant cavity, produces an output digital electrical signal corresponding to the input digital optical signal. A sampling clock defines sampling periods that overlap the bits (e.g., ON/OFF pulse durations) in the input digital optical signal. The sampling clock can be in the form of electrical pulses supplied to the n-channel injector terminal(s) and/or p-channel injector terminals of the heterojunction thyristor device. Alternatively, the sampling clock can be in the form of optical pulses that are part of the Optical IN signal that is resonantly absorbed by the device. The heterojunction thyristor device operates in an OFF state and an ON state.
    Type: Application
    Filed: February 19, 2008
    Publication date: June 12, 2008
    Inventors: Geoff W. Taylor, Jianhong Cai
  • Publication number: 20080135832
    Abstract: A microelectronic structure comprising a channel dimensioned such that tunneling is a significant transport mode for charge carriers. The charge carriers have a coherence length depending on the channel material and the carrier type and a wavelength. A potential varying spatially along the length of the channel is applied, the potential having a variation scale or period which is below the wavelength of the charge carriers in the first substance. The channel is typically shorter than the coherence length, which is what causes the tunneling. The potential thereby influences tunneling of the charge carriers through the channel, and can be used to overcome leakage or off current problems due to tunneling that start to appear at these small scales. A very large scale integration circuit containing such a structure is also described.
    Type: Application
    Filed: January 18, 2006
    Publication date: June 12, 2008
    Inventor: Shye Shapira
  • Publication number: 20080135833
    Abstract: A thin film transistor comprises a layer of organic semiconductor material comprising a configurationally controlled N,N?-dicycloalkyl-substituted naphthalene-1,4,5,8-bis-carboximide compound having a substituted or unsubstituted alicyclic ring independently attached to each imide nitrogen atom with the proviso that at least one of the two alicyclic rings is necessarily a 4-substituted cyclohexyl ring in which a substituent at the 4-position is the sole substituent on the 4-substituted cyclohexyl ring other than the imide attachment; with such substituent being stereochemically disposed as only one of either an essentially trans or cis position, respectively, to the imide nitrogen substituent. Such transistors can further comprise spaced apart first and second contact means or electrodes in contact with said material.
    Type: Application
    Filed: December 7, 2006
    Publication date: June 12, 2008
    Inventors: Deepak Shukla, Thomas R. Welter, Jeffrey T. Carey, Manju Rajeswaran, Wendy G. Ahearn
  • Publication number: 20080135834
    Abstract: Improving memory retention properties of a polymer memory cell are disclosed. The methods include providing a semiconducting polymer layer containing at least one organic semiconductor and at least one of a carrier ion oxidation preventer and an electrode oxidation preventer. The oxidation preventers may contain at least one of 1) an oxygen scavenger, 2) a polymer with oxidizable side-chain groups which can be preferentially oxidized over the carrier ions/electrodes, and 3) an oxidizable molecule that can be preferentially oxidized over the carrier ions/electrodes.
    Type: Application
    Filed: December 8, 2006
    Publication date: June 12, 2008
    Applicant: SPANSION LLC
    Inventors: Swaroop Kaza, David Gaun, Michael A. Van Buskirk
  • Publication number: 20080135835
    Abstract: An object of the invention is to provide a composite material with which a light emitting element can be manufactured to have superior heat resistance, and another is to have durability high enough to be driven stably for a long time. Another object is to provide a composite material with which a light emitting element can be manufactured to achieve both objects. Still another object is to provide a composite material with which a light emitting element can be manufactured to achieve the above objects and to have little increase in power consumption. One feature of a composite material of the invention which can achieve the above objects is to comprise an organic-inorganic hybrid material in which an organic group is covalently bonded to silicon in a skeleton composed of siloxane bonds, and a material which is capable of accepting or donating electrons from or to the organic group.
    Type: Application
    Filed: October 17, 2005
    Publication date: June 12, 2008
    Inventors: Satoshi Seo, Ryoji Nomura, Takako Takasu
  • Publication number: 20080135836
    Abstract: Semiconducting device and method of manufacturing a semiconducting device in which organic thin film transistors (TFTs) and other components are fabricated on a substrate (206), using a hybrid technology of lithographic and printing steps. A lithographically defined resist pattern (211, 311) provides barriers and cavities which serve to guide subsequently printed materials. Different components of the integrated circuitry form separate islands on the substrate (206). The risk of adjacent films cracking and peeling from stress is reduced. The flexibility of the device is increased.
    Type: Application
    Filed: November 4, 2005
    Publication date: June 12, 2008
    Applicant: KONINKLIJKE PHILIPS ELECTRONICS, N.V.
    Inventors: Gerwin H. Gelinck, Paulus C. Duineveld
  • Publication number: 20080135837
    Abstract: Provided are a method of fabricating a multilayered thin film transistor using a plastic substrate and an active matrix display device including the thin film transistor fabricated by the method. The method includes: preparing a substrate formed of plastic; forming a buffer insulating layer on the plastic substrate; forming a silicon layer on the buffer insulating layer; patterning the silicon layer to form an active layer; forming a gate insulating layer on the active layer; stacking a plurality of gate metal layers on the gate insulating layer; patterning the plurality of gate metal layers; and etching a corner region of the lowest gate metal layer formed on the gate insulating layer of the patterned gate metal layers. Accordingly, a gate metal is formed which includes a multilayered gate metal layer and has an etched corner region, thereby reducing an electric field of the corner to reduce a leakage current of the TFT.
    Type: Application
    Filed: October 11, 2007
    Publication date: June 12, 2008
    Inventors: Yong Hae KIM, Choong Heui CHUNG, Jae Hyun MOON, Yoon Ho SONG
  • Publication number: 20080135838
    Abstract: Provided are a thin film transistor, a method of fabricating the thin film transistor, and an organic light emitting diode display device (OLED display device) including the thin film transistor having improved characteristics of the thin film transistor. The thin film transistor includes: a substrate; a semiconductor layer disposed on the substrate; a gate insulating layer disposed on the semiconductor layer, and formed of a thermal oxide layer patterned to correspond to the semiconductor layer; a gate electrode disposed on the gate insulating layer, and disposed to correspond to a predetermined region of the semiconductor layer; an interlayer insulating layer disposed on an entire surface of the substrate; and source and drain electrodes electrically connected to the semiconductor layer.
    Type: Application
    Filed: December 6, 2007
    Publication date: June 12, 2008
    Applicant: Samsung SDI Co., Ltd
    Inventors: HYE-HYANG PARK, Byoung-Deog Choi
  • Publication number: 20080135839
    Abstract: A method of fabricating a thin film transistor, in which source and drain electrodes are formed through a solution process, even all stages which include formation of electrodes on a substrate, formation of an insulator layer, and formation of an organic semiconductor layer are conducted through the solution process. In the method, the fabrication is simplified and a fabrication cost is reduced. It is possible to apply the organic thin film transistor to integrated circuits requiring high speed switching because of high charge mobility.
    Type: Application
    Filed: January 11, 2008
    Publication date: June 12, 2008
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Tae Woo Lee, Young Hun Byun, Yi Yeol Lyu, Sang Yoon Lee, Bon Won Koo
  • Publication number: 20080135840
    Abstract: A test structure to detect vertical leakage in a multi-layer flip chip pad stack or similar semiconductor device. The test structure is integrated into the semiconductor device when it is fabricated. A metal layer includes at least two portions that are electrically isolated from each other; one portion being disposed under a test pad, and another portion being disposed under a pad associated with a pad structure being tested. The metal layer in most cases is separated from a top metal layer directly underlying the pads by an inter-metal dielectric (IMD) layer. A metal layer portion underlying the pad to be tested forms a recess in which a conductive member is disposed without making electrical contact. The conductive line is electrically coupled to a test portion of the same or, alternately, of a different metal layer. The test structure may be implemented on multiple layers, with recesses portions underlying the same or different pads.
    Type: Application
    Filed: December 6, 2006
    Publication date: June 12, 2008
    Inventors: Ta-Chih Peng, Yu-Ting Lin, Liang-Chen Lin, Ko-Yi Lee
  • Publication number: 20080135841
    Abstract: A semiconductor wafer 10 has a plurality of semiconductor chip areas 10a and a scribe area 10b, each of the semiconductor chip areas 10a having semiconductor elements and electrode pads (electrode portions) 16a electrically connected to the respective semiconductor elements, the scribe area 10b having monitor elements and electrode pads (electrode portions) 16b electrically connected to the monitor elements, wherein projecting electrodes 18 are selectively formed only on the respective electrode pads 16a in the semiconductor chip areas 10a by electroless plating. Thus, for example, the electrode pads 16b are covered with an insulating film 14.
    Type: Application
    Filed: October 17, 2007
    Publication date: June 12, 2008
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventor: Keiji MIKI
  • Publication number: 20080135842
    Abstract: An array for a display device is formed by adhering a positive dry film resist, which has a positive photoresist resin layer over a supporting film, to a substrate such that the photoresist resin layer adheres on a surface of the substrate. The supporting film is then released from the photoresist resin layer adhered to the surface of the substrate, the layer is exposed to light; and the positive type photoresist layer is developed to remove exposed regions.
    Type: Application
    Filed: February 1, 2006
    Publication date: June 12, 2008
    Inventors: Byoung-Kee Kim, Se-Hyung Park, Dal-Seok Byun, Seog-Jeong Song, Jong-Min Park
  • Publication number: 20080135843
    Abstract: A thin film transistor (TFT) structure is provided. The TFT comprises a gate, a first electrode, a second electrode, a dielectric layer, and a channel layer. By overlapping the area between the first electrode and the gate, the TFT structure acquires a parasitic capacitor that is unaffected by manufacture deviations. Therefore, the TFT needs no compensation capacitor, thereby, increasing the aperture ratio of the TFT.
    Type: Application
    Filed: September 4, 2007
    Publication date: June 12, 2008
    Applicant: AU OPTRONICS CORP.
    Inventors: Yu-Min Lin, Feng-Yuan Gan
  • Publication number: 20080135844
    Abstract: An object of the present invention is to provide an active matrix type display unit having a pixel structure in which a pixel electrode formed in a pixel portion, a scanning line (gate line) and a data line are suitably arranged, and high numerical aperture is realized without increasing the number of masks and the number of processes. In this display unit, a first wiring arranged between a semiconductor film and a substrate through a first insulating film is overlapped with this semiconductor film and is used as a light interrupting film. Further, a second insulating film used as a gate insulating film is formed on the semiconductor film. A gate electrode and a second wiring are formed on the second insulating film. The first and second wirings cross each other through the first and second insulating films. A third insulating film is formed as an interlayer insulating film on the second wiring, and a pixel electrode is formed on this third insulating film.
    Type: Application
    Filed: November 16, 2007
    Publication date: June 12, 2008
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Shunpei Yamazaki
  • Publication number: 20080135845
    Abstract: A thin-film transistor substrate includes a gate line, a capacitor dielectric layer, a gate insulation layer, an active pattern, a data line, a protection layer, and a pixel electrode. The gate wiring including a gate electrode, a lower storage electrode, and a gate metal pad is disposed on a substrate. The capacitor dielectric layer is disposed on the lower storage electrode and the gate insulation layer is disposed on the substrate. The active pattern includes an active layer and a dummy active layer disposed on the gate insulation layer in a gate electrode region and a gate metal pad region, respectively. A portion of the upper storage electrode is disposed on the capacitor dielectric layer exposed through a first contact hole in the gate insulation layer.
    Type: Application
    Filed: November 21, 2007
    Publication date: June 12, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seong-Kweon HEO, Chun-Gi YOU
  • Publication number: 20080135846
    Abstract: A thin film transistor (“TFT”) substrate in which the size of a pixel TFT formed in a display area is reduced using a single slit mask, and the length of the channel area of a protection TFT constituting an electrostatic discharge protection circuit formed in a non-display area is formed larger than that of the pixel TFT using the same mask pattern. The TFT substrate includes a signal line and a discharge line formed on a substrate, a signal supply pad formed on one end of the signal line to supply a signal to the signal line, and an electrostatic discharge protection circuit including at least one protection TFT including a plurality of channels formed between the signal supply pad and the discharge line and/or between the signal line and the discharge line.
    Type: Application
    Filed: December 12, 2007
    Publication date: June 12, 2008
    Inventors: Kyoung-Ju SHIN, Chong-Chul Chai, Mee-Hye Jung
  • Publication number: 20080135847
    Abstract: A thin film transistor (TFT) having improved characteristics, a method for fabricating the same, and an organic light emitting display device (OLED) including the same. The TFT is constructed with a substrate, a semiconductor layer disposed on the substrate and including a channel region, source and drain regions, a gate insulating layer disposed on the semiconductor layer, a gate electrode disposed on the gate insulating layer and corresponding to the channel region, an interlayer insulating layer disposed on the gate electrode, and source and drain electrodes electrically connected to the source and drain regions of the semiconductor layer. The channel region is made from polycrystalline silicon (poly-Si), and the source and drain regions are made from amorphous silicon (a-Si). The polycrystalline silicon of the channel region is formed by crystallizing amorphous silicon using Joule's heat generated by the gate electrode.
    Type: Application
    Filed: December 6, 2007
    Publication date: June 12, 2008
    Inventor: In-Young Jung
  • Publication number: 20080135848
    Abstract: When a semi-conductor film is irradiated with conventional pulsed laser light, unevenness, which is called as ridge, is caused on the surface of the semiconductor film. In the case of a top-gate type TFT, element characteristics are changed depending on the ridge. In particular, there is a problem in that variation in the plural thin film transistors electrically connected in parallel with one another. According to the present invention, in manufacturing a circuit including plural thin film transistors, the width LP of a region (not including a microcrystal region) that is melted by irradiating a semiconductor film with light of a continuous wave laser is enlarged, and active layers of a plurality of thin film transistors (that are electrically connected in parallel with one another) are arranged in one region.
    Type: Application
    Filed: July 25, 2005
    Publication date: June 12, 2008
    Inventors: Shunpei Yamazaki, Koichiro Tanaka
  • Publication number: 20080135849
    Abstract: A thin film transistor includes a polysilicon layer formed over a substrate having a channel region, a source region and a drain region, a conductive layer formed in an upper layer of the polysilicon layer for covering at least a part of the source region and the drain region, an interlayer insulating film formed in a region to cover at least a region including the polysilicon layer, a contact hole formed to penetrate the interlayer insulating film with a depth to expose the conductive layer and a wiring layer formed along a sidewall of the contact hole.
    Type: Application
    Filed: November 28, 2007
    Publication date: June 12, 2008
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventor: Kazushi Yamayoshi
  • Publication number: 20080135850
    Abstract: A process for manufacturing a semiconductor device, provides that a silicide layer is formed, an amorphous semiconductor layer is applied both to the silicide layer and to an open monocrystalline semiconductor region, adjacent to the silicide layer, and during a subsequent temperature treatment, the amorphous semiconductor layer is crystallized proceeding from the open, monocrystalline semiconductor region, acting as a crystallization nucleus, so that the silicide layer is covered at least partially by a crystallized, monocrystalline semiconductor layer.
    Type: Application
    Filed: January 28, 2008
    Publication date: June 12, 2008
    Inventor: Christoph Bromberger
  • Publication number: 20080135851
    Abstract: The present invention provides a display comprising a panel having a display region for displaying an image and a peripheral region defined therein, a plurality of thin film transistors (TFTs) formed in the display region, p-type and n-type TFTs formed in the peripheral region, and at least one photo diode formed in a horizontal structure in the display or peripheral region; and a method of manufacturing the display. According to the present invention, n-type and p-type TFTs and a photo diode can be together formed without an additional process when forming the TFTs using a polycrystalline silicon thin film, and various peripheral circuits can be configured using such elements.
    Type: Application
    Filed: November 14, 2007
    Publication date: June 12, 2008
    Inventors: Cheol Min Kim, Gi Chang Lee, Yang Hwa Choi