Abstract: A substrate is polished and made an inclined substrate, which is exposed to a hydrogen plasma and is thereby smoothened. The substrate is then heated controlledly until it surface temperature reaches 830° C. Meanwhile, a gas mixture of 1% methane, 50 ppm hydrogen sulfide and hydrogen is introduced in a tubular reaction vessel to flow therethrough at 200 ml/min, where microwave plasma is excited to cause n-type semiconductor diamond to epitaxially grow on the substrate. An ion doped n-type semiconductor is thus formed that has a single donor level of an activation energy at 0.38 eV and is high in mobility and of high quality.

Abstract: The present invention relates to the production of thin films. In particular, the invention concerns a method of growing a thin film onto a substrate, in which method the substrate is placed in a reaction chamber and is subjected to surface reactions of a plurality of vapor-phase reactants according to the ALD method. The present invention is based on replacing the mechanical valves conventionally used for regulating the pulsing of the reactants, which valves tend to wear and intrude metallic particles into the process flow, with an improved precursor dosing system. The invention is characterized by choking the reactant flow between the vapour-phase pulses while still allowing a minimum flow of said reactant, and redirecting the reactant at these times to an other destination than the reaction chamber. The redirection is performed with an inactive gas, which is also used for ventilating the reaction chamber between the vapour-phase pulses.

Abstract: A method is for making at least one semiconductor device including providing a sacrificial growth substrate of Lithium Aluminate (LiAlO2); forming at least one semiconductor layer including a Group III nitride adjacent the sacrificial growth substrate; attaching a mounting substrate adjacent the at least one semiconductor layer opposite the sacrificial growth substrate; and removing the sacrificial growth substrate. The method may further include adding at least one contact onto a surface of the at least one semiconductor layer opposite the mounting substrate, and dividing the mounting substrate and at least one semiconductor layer into a plurality of individual semiconductor devices. To make the final devices, the method may further include bonding the mounting substrate of each individual semiconductor device to a heat sink. The step of removing the sacrificial substrate may include wet etching the sacrificial growth substrate.

Abstract: A method for growing a single-crystal region of a III-V compound on a surface corresponding to a crystallographic plane of a single-crystal silicon substrate, including the steps of growing by epitaxy on the substrate a single-crystal germanium layer; etching in a portion of the thickness of the germanium layer an opening, the bottom of which corresponds to a single surface inclined with respect to the cristallographic plane or to several surfaces inclined with respect to the cristallographic plane; and growing the single-crystal III-V compound on the bottom of the opening.

Abstract: Reference infrared-absorption spectrum patterns are prepared in advance as a database. The infrared-absorption spectrum pattern of a film targeted for measurement is measured using FT-IR spectroscopy. Subsequently, multivariate analysis is performed using PLS regression, based on the reference infrared-absorption spectrum patterns and the infrared-absorption spectrum pattern of the target film. The film-growing temperature and other factors are then computed in accordance with the analysis results.

Abstract: A method of forming a free-standing (Al, Ga, In)N article, by the steps including: providing an expitaxially compatible sacrificial template; depositing single crystal (Al, Ga, In)N material on the template to form a composite sacrificial template/(Al, Ga, In)N article including an interface between the sacrificial template and the (Al, Ga, In)N material; and interfacially modifying the composite sacrificial template/(Al, Ga, In)N article to part the sacrificial template from the (Al, Ga, In)N material and yield the free-standing (Al, Ga, In)N article. The free-standing (Al, Ga, In)N article produced by such method is of superior morphological character, and suitable for use as a substrate, e.g., for fabrication of microelectronic and/or optoelectronic devices and device precursor structures.

Abstract: The invention relates to a method for improving the efficiency of epitaxially grown quantum dot semiconductor components having at least one quantum dot layer. The efficiency of semiconductor components containing an active medium consisting of quantum dots is often significantly below the theoretically possible values. The inventive method enables the efficiency of the relevant component to be clearly increased without substantially changing the growth parameters of the various epitaxial layers. In order to improve the efficiency of the component, the crystal is morphologically changed when the growth of the component is interrupted at the point in the overall process at which the quantum dots of a layer have just been covered. The growth front is smoothed at the same time, leading to, for example, a reduction in waveguide loss as the thickness of the waveguide is more homogeneous if the relevant component has one such waveguide.

Abstract: A method of growing a nitride semiconductor crystal which has very few crystal defects and can be used as a substrate is disclosed. This invention includes the step of forming a first selective growth mask on a support member including a dissimilar substrate having a major surface and made of a material different from a nitride semiconductor, the first selective growth mask having a plurality of first windows for selectively exposing the upper surface of the support member, and the step of growing nitride semiconductor portions from the upper surface, of the support member, which is exposed from the windows, by using a gaseous Group 3 element source and a gaseous nitrogen source, until the nitride semiconductor portions grown in the adjacent windows combine with each other on the upper surface of the selective growth mask.

Abstract: A highly corrosion-resistant SiC material is formed on a base body by a CVD process. The SiC material contains ?-SiC crystals so oriented that the ratio of the sum of peak intensities of x-ray diffraction for (220) and (311) planes of the ?-SiC csystals to the sum of peak intensities of x-ray diffraction for (111), (200), (220), (311) and (222) planes of the ?-Sic crystals is 0.15 or above. The SiC material may contain both ?-SiC crystals and ?-SiC crystals of 6H structure. A base body with a SiC material by a CVD process is used as an internal component member of a semiconductor device fabricating system.

Abstract: The invention relates to a method and a device for depositing especially crystalline layers on especially crystalline substrates in a process chamber of a reactor housing having a water-cooled wall. The floor of said process chamber is heated. At least one reaction gas as a process gas, and hydrogen as a carrier gas, are centrally introduced into the process chamber, and are extracted by a gas evacuation ring surrounding the process chamber. A flush gas flows between the cover of the reactor and the cover of the process chamber. Said flush gas and the flush gas which flushes the area between the reactor wall and the gas evacuation ring are introduced into the outer region of the process chamber, via a gap between the cover of the reactor and the gas evacuation ring which can be lowered for loading the process chamber, in order to be sucked through the openings in the gas evacuation ring with the process gas.

Abstract: A method is provided for growing thin oxide films on the surface of a substrate by alternatively reacting the surface of the substrate with a metal source material and an oxygen source material. The oxygen source material is preferably a metal alkoxide. The metal source material may be a metal halide, hydride, alkoxide, alkyl, a cyclopentadienyl compound, or a diketonate.

Abstract: A method for manufacturing a semiconductor using a wafer carrier, wherein the temperature of a wafer can be made uniform with few differences in surface composition distribution. A plurality of grooves are formed at the bottom of a wafer pocket of a wafer carrier, to make uniform the temperature of the wafer surface by diffusing heat. The grooves are deeper at the peripheral part of the wafer than at the central part, and groove density is higher at the peripheral part than at the central part. The groove patterns may include a plurality of wedge-shaped grooves widening from the central part toward the peripheral part, a plurality of circular grooves with narrowing interval therebetween from the central part toward the peripheral part, circular grooves with the diameter shortened from the central part toward the peripheral part, and square grooves with shortened sides from the central part toward the peripheral part.

Abstract: An atomic layer deposition method includes positioning a plurality of semiconductor wafers into an atomic layer deposition chamber. Deposition precursor is emitted from individual gas inlets associated with individual of the wafers received within the chamber effective to form a respective monolayer onto said individual wafers received within the chamber. After forming the monolayer, purge gas is emitted from individual gas inlets associated with individual of the wafers received within the chamber. An atomic layer deposition tool includes a subatmospheric load chamber, a subatmospheric transfer chamber and a plurality of atomic layer deposition chambers. Other aspects and implementations are disclosed.

Abstract: A method of producing a semiconductor device which removes catalyst elements from a silicon-containing semiconductor film while maintaining the advantage of low temperature process is provided. The method comprises the steps of: forming an amorphous semiconductor film containing silicon on a glass substrate to crystallize it by using a catalyst element; selectively introducing into the amorphous semiconductor film an impurity belonging to Group 15 to form gettering regions and regions to be gettered; and causing the catalyst element in the silicon film to move to the gettering regions by heat treatment. Through the gettering process, the crystalline silicon film can be obtained in which the concentration of nickel contained therein is sufficiently reduced.

Abstract: The present invention relates to the production of thin films. In particular, the invention concerns a method of growing a thin film onto a substrate, in which method the substrate is placed in a reaction chamber and is subjected to surface reactions of a plurality of vapor-phase reactants according to the ALD method. The present invention is based on replacing the mechanical valves conventionally used for regulating the pulsing of the reactants, which valves tend to wear and intrude metallic particles into the process flow, with an improved precursor dosing system. The invention is characterized by choking the reactant flow between the vapour-phase pulses while still allowing a minimum flow of said reactant, and redirecting the reactant at these times to an other destination than the reaction chamber. The redirection is performed with an inactive gas, which is also used for ventilating the reaction chamber between the vapour-phase pulses.

Abstract: The present invention provides methods of performing atomic layer deposition to form conductive, oxidation-resistant rhodium oxide films and films comprising metals, such as platinum, alloyed with rhodium oxide. The present invention also provides memory devices and processors comprising films deposited by the above methods.

Abstract: A method for simultaneous deposition of multiple compounds on a substrate is provided. In one aspect, a gas stream is introduced into a processing chamber and flows across a substrate surface disposed therein. The gas stream includes at least one dose of a first compound and at least one dose of a second compound. The doses of the first and second compounds are separated by a time delay, and the at least one dose of the first compound and the at least one dose of the second compound are simultaneously in fluid communication with the substrate surface.

Abstract: Methods are disclosed that provide for structures and techniques for the fabrication of ordered arrangements of crystallographically determined nanometer scale steps on single crystal substrates, particularly SiC. The ordered nanometer scale step structures are produced on the top surfaces of mesas by a combination of growth and etching processes. These structures, sometimes referred to herein as artifacts, are to enable step-height calibration, particularly suitable for scanning probe microscopes and profilometers, from less than one nanometer (nm) to greater than 10 nm, with substantially no atomic scale roughness of the plateaus on either side of each step.

Abstract: A single crystal of quartz thin film and a production method therefor are provided. A method for producing a quartz epitaxial thin film comprises the steps of vaporizing a silicon alkoxide as a silicon source under atmospheric pressure to introduce the silicon alkoxide to a substrate with hydrogen chloride as a reaction promoter, and reacting ethyl silicate with oxygen to deposit a quartz on the substrate. The single crystal of quartz thin film has excellent crystalinity, and optical properties.

Abstract: MEMS structure and a method of fabricating them from ultrananocrystalline diamond films having average grain sizes of less than about 10 nm and feature resolution of less than about one micron . The MEMS structures are made by contacting carbon dimer species with an oxide substrate forming a carbide layer on the surface onto which ultrananocrystalline diamond having average grain sizes of less than about 10 nm is deposited. Thereafter, microfabrication process are used to form a structure of predetermined shape having a feature resolution of less than about one micron.

Abstract: A method of forming a semiconductor structure including providing a single crystal semiconductor substrate of GaP, and fabricating a graded composition buffer including a plurality of epitaxial semiconductor Inx(AlyGa1−y)1−xP alloy layers. The buffer includes a first alloy layer immediately contacting the substrate having a lattice constant that is nearly identical to that of the substrate, subsequent alloy layers having lattice constants that differ from adjacent layers by less than 1%, and a final alloy layer having a lattice constant that is substantially different from the substrate. The growth temperature of the final alloy layer is at least 20° C. less than the growth temperature of the first alloy layer.

Abstract: An improved method for controlling nucleation sites during superabrasive particle synthesis can provide high quality industrial superabrasive particles with high yield and a narrow size distribution. The synthesis method can include forming a raw material layer, forming a particulate catalyst layer adjacent the raw material layer, and placing crystalline seeds in a predetermined pattern at least partially in the catalyst layer or raw material layer to form a growth precursor. Alternatively, the raw material and catalyst material can be mixed to form a particulate crystal growth layer and then placing the crystalline seeds in a predetermined pattern in the growth layer. Preferably, seeds can be substantially surrounded by catalyst material. The growth precursor can be maintained at a temperature and pressure at which the superabrasive crystal is thermodynamically stable for a time sufficient for a desired degree of growth.

Abstract: A ZnO/sapphire substrate includes an R-plane sapphire substrate whose (0 1-1 2) planes are parallel to the surface thereof and a ZnO epitaxial film formed on the R-plane sapphire substrate. The (1 1-2 0) planes of the ZnO epitaxial film are disposed with an interplanar spacing in the range of about 1.623 to 1.627 Å parallel to the (0 1-1 2) planes of the R-plane sapphire substrate.

Abstract: A method of growing a thin film onto a substrate placed in a reaction chamber according to the ALD method by subjecting the substrate to alternate and successive surface reactions. The method includes providing a first reactant source and providing an inactive gas source. A first reactant is fed from the first reactant source in the form of repeated alternating pulses to a reaction chamber via a first conduit. The first reactant is allowed to react with the surface of the substrate in the reaction chamber. Inactive gas is fed from the inactive gas source into the first conduit via a second conduit that is connected to the first conduit at a first connection point so as to create a gas phase barrier between the repeated alternating pulses of the first reactant entering the reaction chamber. The inactive gas is withdrawn from said first conduit via a third conduit connected to the first conduit at a second connection point.

Abstract: A method of manufacturing a SiC substrate which has a first principal surface and a second principal surface, includes the step of removing, by a vapor phase etching process, at least a portion of a work-affected layer which is formed by mechanical flattening or cutting on the first principal surface of the SiC substrate.

Abstract: A micro three-dimensional structure capable of producing a micro three-dimensional structure (micrometer-to nanometer-order outer shape) having a complicated structure, a production method therefor and production device therefor are provided. In the production method for the micro three-dimensional structure, performed are the step of irradiating a focused ion beam (4) to a sample (1) while supplying a material gas (3) to form a first-layer deposit (5), the step of releasing secondary electrons (6) from the first-layer deposit (5) hit by ions to allow the secondary electrons (6) to form a terrace (7) on the first-layer deposit (5), a step of deflecting the focused ion beam (4) in a desired direction of the terrace (7) based on a set amount from a focal position controlling apparatus, a step of forming a second-layer deposit (8) in a deflected position on the terrace (7) based on the deflection amount, and a step of repeating the above steps to form a set micro three-dimensional structure.

Abstract: A process of fabricating a CMOS device comprised with super-steep retrograde (SSR), twin well regions, has been developed. The process features the use of two, selective epitaxial growth (SEG), procedures, with the first SEG procedure resulting in the growth of bottom silicon shapes in the PMOS, as well as in the NMOS region of the CMOS device. After implantation of the ions needed for the twin well regions, into the bottom silicon shapes, a second SEG procedure is employed resulting in growth of top silicon shapes on the underlying, implanted bottom silicon shapes. An anneal procedure then distributes the implanted ions resulting in an SSR N well region in the composite silicon shape located in the PMOS region, and resulting in an SSR P well region in the composite silicon shape located in the NMOS region of the CMOS device.

Abstract: To provide a method of manufacturing compound semiconductor single crystals such as silicon carbide and gallium nitride by epitaxial growth methods, that is capable of yielding compound single crystals of comparatively low planar defect density. The method of manufacturing compound single crystals in which two or more compound single crystalline layers identical to or differing from a single crystalline substrate are sequentially epitaxially grown on the surface of said substrate. At least a portion of said substrate surface has plural undulations extending in a single direction and second and subsequent epitaxial growth is conducted after the formation of plural undulations extending in a single direction in at least a portion of the surface of the compound single crystalline layer formed proximately.

Abstract: A semiconductor device having a silicon single crystal substrate and a boron phosphide semiconductor layer containing boron and phosphorus as constituent elements on a surface of the silicon single crystal substrate is disclosed. The surface of the silicon single crystal substrate is a {111} crystal plane inclined at an angle of 5.0° to 9.0° toward a <110> crystal azimuth.

Abstract: A process for forming an aerosol of semiconductor nanoparticles includes pyrolyzing a semiconductor material-containing gas then quenching the gas being pyrolyzed to control particle size and prevent uncontrolled coagulation. The aerosol is heated to densify the particles and form crystalline nanoparticles. In an exemplary embodiment, the crystalline particles are advantageously classified by size using a differential mobility analyzer and particles having diameters outside of a pre-selected range of sizes, are removed from the aerosol. In an exemplary embodiment, the crystalline, classified and densified nanoparticles are oxidized to form a continuous oxide shell over the semiconductor core of the particles. The cores include a density which approaches the bulk density of the pure material of which the cores are composed and the majority of the particle cores are single crystalline. The oxidized particles are deposited on a substrate using thermophoretic, electrophoretic, or other deposition means.

Abstract: A method of fabricating a high-density magnetic data-storage medium, the method comprising the steps of: (a) forming a plurality of nanodots of non-magnetic material in a regular array on a surface of a substrate, said array being notionally dividable into a plurality of clusters that each comprise a plurality of nanodots, wherein each nanodot of a said cluster overlaps with neighbouring nanodots of that cluster to form a well between them; (b) depositing magnetic material onto said substrate to at least partly fill the wells of each cluster; and (c) removing material to reveal a regular array of wells filled with magnetic material, each of said wells being separated from neighbouring wells by non-magnetic material.

Abstract: When a polycrystalline or single crystal silicon layer is grown by catalytic CVD, a catalyst having a nitride covering at least its surface is used. In case that tungsten is used as the catalyst, tungsten nitride is formed as the nitride. The nitride is made by heating the surface of the catalyst to a high temperature around 1600 to 2100° C. in an atmosphere containing nitrogen prior to the growth. When the catalyst is heated to the temperature for its use or its nitrification, it is held in a hydrogen atmosphere.

Abstract: A method of fabricating a semiconductor structure including the steps of: providing a silicon substrate having a surface; forming by atomic layer deposition a monocrystalline seed layer on the surface of the silicon substrate; and forming by atomic layer deposition one or more layers of a monocrystalline high dielectric constant oxide on the seed layer, where providing a substrate includes providing a substrate having formed thereon a silicon oxide, and wherein forming by atomic layer deposition a seed layer further includes depositing a layer of a metal oxide onto a surface of the silicon oxide, flushing the layer of metal oxide with an inert gas, and reacting the metal oxide and the silicon oxide to form a monocrystalline silicate.

Abstract: A crystal growth method for growing a nitride semiconductor crystal on a sapphire substrate in a vapor phase, includes the steps of: providing a sapphire substrate having a substrate orientation inclined by about 0.05° to about 0.2° from a <0001>orientation; and allowing a nitride semiconductor crystal to grow on the surface of the sapphire substrate.

Abstract: This invention provides a method for manufacturing a semiconductor using a wafer carrier: the temperature of a wafer can be uniformed and the uniformity within the surface excels with few differences of the composition distribution; a crystal is grown by forming a plurality of grooves to uniform the temperature of the wafer surface by diffusing heat, at the bottom of a wafer pocket to mount a wafer on a wafer carrier inside a crystal growth apparatus chamber; and the groove depth is deeper at the peripheral part of the wafer than at the central part thereof while the groove density is higher at the peripheral part of the wafer than at the central part thereof.

Abstract: A method for the production of a crack-free epitiaxial film having a thickness greater than that which can be achieved by continuous epitaxial crystal growth. This epitaxial film can be used as is in a device, used as a substrate platform for further epitaxy, or separated from the initial substrate material and used as a free-standing substrate platform. The method utilizes a defect-rich initial layer that absorbs epitaxially derived stresses and another layer, which is not defect-rich, which planarizes the crystal growth front, if necessary and provides high quality epitaxial region near the surface.

Abstract: A mandrel for use in a diamond deposition process has surfaces with different diamond adhesion properties. According to one embodiment, a mandrel is provided and has first and second surfaces on which a diamond film is deposited, with the second surface forming a perimeter around the first surface. The first surface of the mandrel has a first diamond bonding strength which is less than a second diamond bonding strength of the second surface. In an embodiment for forming a cup-shaped diamond film, the mandrel is a titanium nitride (TiN) coated molybdenum (Mo) substrate having a stepped solid cylindrical shape with a central mesa having a side wall or flank. The side wall is etched near the top surface of the mesa to expose a molybdenum band and to form a second surface which bounds the TiN first surface.

Abstract: Provided is a method of manufacturing a nitride system III-V compound layer which improves the quality and facilitates the manufacturing process and a method of manufacturing a substrate employing the method of manufacturing a nitride system III-V compound layer. A first growth layer is grown on a growth base at a growth rate, in a vertical direction to the growth surface, higher than 10 &mgr;m/h. Subsequently, a second growth layer is grown at a growth rate, in a vertical direction to the growth surface, lower than 10 &mgr;m/h. The first growth layer grown at the higher growth rate has a rough surface. However, the second growth layer is grown at the lower growth rate than that used for growing the first growth layer, so that depressions of the surface of the first growth layer are filled and thus the surface of the second growth layer is flattened. Further, growth takes place laterally so as to fill the depressions of the surface of the first growth layer.

Abstract: A method for making a free-standing, single crystal, gallium nitride (GaN) wafer includes forming a single crystal GaN layer directly on a single crystal LiAlO2 substrate using a gallium halide reactant gas, and removing the single crystal LiAlO2 substrate from the single crystal GaN layer to make the free-standing, single crystal GaN wafer. Forming the single crystal GaN layer may comprise depositing GaN by vapor phase epitaxy (VPE) using the gallium halide reactant gas and a nitrogen-containing reactant gas. Because gallium halide is used as a reactant gas rather than a metal organic reactant such as trimethygallium (TMG), the growth of the GaN layer can be performed using VPE which provides commercially acceptable rapid growth rates. In addition, the GaN layer is also devoid of carbon throughout. Because the GaN layer produced is high quality single crystal, it may have a defect density of less than about 107 cm−2.

Abstract: High quality epitaxial layers of compound semiconductor materials can be grown overlying large silicon wafers by first growing an accommodating buffer layer on a silicon wafer. The accommodating buffer layer is a layer of monocrystalline oxide spaced apart from the silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline compound semiconductor layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer.

Abstract: A method is provided for growing thin oxide films on the surface of a substrate by alternatively reacting the surface of the substrate with a metal source material and an oxygen source material. The oxygen source material is preferably a metal alkoxide. The metal source material may be a metal halide, hydride, alkoxide, alkyl, a cyclopentadienyl compound, or a diketonate.

Abstract: The present invention utilizes magnesium diboride (MgB2) or (Mg1−xMx)B2 as a superconductivity thin film which can be applied to a rapid single flux quantum (RSFQ) circuit. A method for manufacturing a superconductor incorporating therein a superconductivity thin film, begins with preparing a single crystal substrate. Thereafter, a template film is formed on top of the substrate, wherein the template has a hexagonal crystal structure. The superconductivity thin film of MgB2 or (Mg1−xMx)B2 is formed on top of the template film. If Mg amount in the superconductivity thin film is insufficient, Mg vapor is flowed on the surface of the superconductivity thin film while a post annealing process is carried out at the temperature ranging from 400° C. to 900° C.

Abstract: Selected micro- and nanoscale, 1-dimensional and 2-dimensional periodic and random structures generated on silicon and other substrates are expected to perform as compliant, thin films for gettering defects and for accommodating lattice and thermal expansion mismatches during heteroepitaxial growth thereon, thereby leading to relatively defect-free, heteroepitaxial films of chosen thicknesses. The as-grown epilayers or completed electronic and optoelectronic devices can be bonded to a second substrate such as glass, or plastic following separation thereof from the substrate on which they were formed using preferential etching of a readily detachable, nanoporous silicon or silicon dioxide layer introduced between the generated structures and the substrate.

Abstract: A boule formed by high rate vapor phase growth of Group III-V nitride boules (ingots) on native nitride seeds, from which wafers may be derived for fabrication of microelectronic device structures. The boule is of microelectronic device quality, e.g., having a transverse dimension greater than 1 centimeter, a length greater than 1 millimeter, and a top surface defect density of less than 107 defects cm−2. The Group III-V nitride boule may be formed by growing a Group III-V nitride material on a corresponding native Group III-V nitride seed crystal by vapor phase epitaxy at a growth rate above 20 micrometers per hour.

Abstract: A method for epitaxial deposition of atoms or molecules from a reactive gas on a deposition surface of a substrate is described. The method includes the following steps: a first amount of energy is supplied by heating at least the deposition surface; and an ionized inert gas is conducted, at least from time to time, onto the deposition surface in order to supply, at least from time to time, a second amount of energy through the effect of ions of the ionized inert gas on the deposition surface. The first amount of energy is less than the energy amount necessary for the epitaxial deposition of atoms or molecules of the reactive gas on the deposition surface. A sum of the first energy amount and the second energy equaling, at least from time to time, a total amount of energy that is sufficient for the epitaxial deposition of atoms or molecules of the reactive gas onto the deposition surface.

Abstract: Performing the post-implantation annealing for recovering crystallinity in a hydrogen atmosphere can successfully suppress the surface roughening on the ion-implanted layers without pre-implantation oxidation. This allows omission of the pre-implantation oxidation and allows ion implantation using only a photoresist film as a mask in a method for producing an epitaxial wafer having buried ion-implanted layers. Since an intentional formation of an oxide film, including such pre-implantation oxidation, on an epitaxial layer is omitted, the number of repetition of the thermal history exerted to the buried ion-implanted layers can be reduced, which effectively suppresses lateral diffusion of implanted ions. Since the formation and removal of the oxide film is thus no more necessary, the number of process steps in the production of the epitaxial wafer can dramatically be reduced.

Abstract: Atomic layer deposition is used to provide a solid film on a plurality of disc shaped substrates. The substrates are entered spaced apart in a boat, in a furnace and heated to deposition temperature. In the furnace the substrate is exposed to alternating and sequential pulses of at least two mutually reactive reactants, in such way that the deposition temperature is high enough to prevent condensation of the at least two reactants on the surface but not high enough to result in significant thermal decomposition of each of the at least two reactants individually.

Abstract: A method of fabricating a nitride semiconductor includes the steps of forming a nitride semiconductor doped with a p-type impurity, treating the surface of the nitride semiconductor in an atmosphere containing active oxygen to remove carbon remaining the surface and form an oxide film thereon, and activating the p-type impurity to turn the conductive type of the nitride semiconductor into a p-type. Since carbon remaining on the surface of the nitride semiconductor is removed and the oxide film is formed thereon, the surface of the nitride semiconductor is prevented from being deteriorated by the activating treatment and the rate of activating the p-type impurity is enhanced. As a result, it is possible to reduce the contact resistance of the nitride semiconductor with an electrode and hence to variation in characteristics of the nitride semiconductor.

Abstract: The Group III-V compound semiconductor manufacturing method which pertains to the present invention is a semiconductor manufacturing method employing epitaxy which comprises (a) a step in which growing areas are produced using a mask patterned on a substrate surface and (b) a step in which a Group III-V compound semiconductor layer is grown in the growing areas while forming facet structures. As epitaxy is continued, adjacent facet structures come into contact so that the surface of the semiconductor layer becomes planarized. Since lattice defects extend towards the facet structures, they do not extend towards the surface of the semiconductor layer. Accordingly, the number of lattice defects in the vicinity of the semiconductor layer surface is reduced.

Abstract: The invention describes an apparatus for chemical vapor deposition on substrates, a related method of deposition of epitaxial layers on the wafers and an assemblage for use therewith. In the apparatus of the invention, the wafers are placed directly on the surface of a heating filament. The apparatus of the invention may include a reaction chamber, a rotatable spindle, a plurality of rotatable electrodes mounted on the spindle for rotation together with the spindle and a heating filament in electrical contact with the rotatable electrodes. The heating filament may be rotated by rotating the rotatable electrodes, and heated by providing electric current to the electrodes. In one embodiment of the invention, heating filament may be detached from the rotatable electrodes to load or unload the wafers. Preferably, the heating filament is transported between a deposition position and a loading position. Alternatively, the heating filament is permanently mounted on the electrodes.