Abstract: An apparatus for quantum-based physically unclonable functions is disclosed. The apparatus for quantum-based physically unclonable functions according to an embodiment of the present embodiment comprises a random nanostructure formed on a substrate by hydrothermal synthesis, wherein the random nanostructure emits a laser light of a predetermined pattern through the quantum activity of the random nanostructure.

Abstract: A boron nitride layer and a method of fabricating the same are provided. The boron nitride layer includes a boron nitride compound and has a dielectric constant of about 2.5 or less at an operating frequency of 100 kHz.

Abstract: A method of CMP includes providing a slurry solution including ?1 per-compound oxidizer in a concentration between 0.01 M and 2 M with a pH from 2 to 5 or 8 to 11, and ?1 buffering agent which provides a buffering ratio ?1.5 that compares an amount of a strong acid needed to reduce the pH from 9.0 to 3.0 as compared to an amount of strong acid to change the pH from 9.0 to 3.0 without the buffering agent. The slurry solution is exclusive any hard slurry particles or has only soft slurry particles that have throughout a Vickers hardness <300 Kg/mm2 or Mohs Hardness <4. The slurry solution is dispensed on a hard surface having a Vickers hardness >1,000 kg/mm2 is pressed by a polishing pad with the slurry solution in between while rotating the polishing pad relative to the hard surface.

Abstract: High quality ammonothermal group III metal nitride crystals having a pattern of locally-approximately-linear arrays of threading dislocations, methods of manufacturing high quality ammonothermal group III metal nitride crystals, and methods of using such crystals are disclosed. The crystals are useful for seed bulk crystal growth and as substrates for light emitting diodes, laser diodes, transistors, photodetectors, solar cells, and for photoelectrochemical water splitting for hydrogen generation devices.

Abstract: Provided is a graphene production method using Joule heating, including: a catalytic metal placement step in which a catalytic metal is disposed on a pair of electrodes disposed inside a chamber; a gas supply step in which a carbon-containing reaction gas and a carrier gas for transporting the reaction gas are supplied into the chamber; a heating step in which the catalytic metal is rapidly heated to a temperature required for synthesis of graphene; a temperature maintenance step in which the temperature of the catalytic metal is maintained to form the graphene on the catalytic metal; and a cooling step in which the catalytic metal is cooled to prevent local occurrence of hotspots on the graphene formed on the catalytic metal, wherein the heating step, the temperature maintenance step, and the cooling step constitute one cycle of temperature control and the cycle is repeated for a predetermined process time.

Abstract: A manufacturing method of a group III-V compound semiconductor device, the method includes: a first process in which a group V material gas and an impurity material gas are supplied to a reacting furnace which is set at a first temperature of a range from 400° C. to 500° C. and a first pressure of a range from 100 hPa to 700 hPa, and impurities are doped in an undoped group III-V compound semiconductor layer, and a second process in which the supply of the impurity material gas is stopped, a temperature of the reacting furnace is raised to a second temperature which is higher than the first temperature, a pressure of the reacting furnace is set lower than a pressure of the first pressure, a supply of an etching gas is initiated and the supply of the group V material gas is continued.

Abstract: The present disclosure is directed to a methodology for embedding a deterministic number of dopant atoms in a surface portion of a group IV semiconductor lattice. The methodology comprises the steps of: forming one or more lithographic sites on the surface portion; dosing, at a temperature below 100 K, the surface portion using a gas with molecules comprising the dopant atom and hydrogen atoms in a manner such that, a portion of the molecules bonds to the surface portion; and incorporating one or more dopant atoms in a respective lithographic site by transferring an amount of energy to the dopant atoms. The number of dopant atoms incorporated in a lithographic site is deterministic and related to the size of the lithographic site.

Abstract: Provided are a metallic micro/nano-structure and an optical fiber having it on the end-facet. The metallic micro/nano-structure comprises of a metallic film and a micro/nano pattern in the metallic film. The micro/nano pattern divides the metallic film into a periodic structure and an embedded defect structure; the defect structure locally breaks the periodicity of the periodic structure; in at least one dimension, the periodic structure has a period T satisfying 0.75?<T<1.25?, ? is a wavelength of a surface plasmon at an interface between the metallic film and a medium; and the surface plasmon resonates within the defect structure and its surrounding area. The optical fiber end-facet device takes the advantages of single-mode optical fiber systems, including stable optical transmission, compact systems and flexible configurations.

Abstract: A method for removing a portion of a crystalline material (e.g., SiC) substrate includes joining a surface of the substrate to a rigid carrier (e.g., >800 ?m thick), with a subsurface laser damage region provided within the substrate at a depth relative to the surface. Adhesive material having a glass transition temperature above 25° C. may bond the substrate to the carrier. The crystalline material is fractured along the subsurface laser damage region to produce a bonded assembly including the carrier and a portion of the crystalline material. Fracturing of the crystalline material may be promoted by (i) application of a mechanical force proximate to at least one carrier edge to impart a bending moment in the carrier; (ii) cooling the carrier when the carrier has a greater coefficient of thermal expansion than the crystalline material; and/or (iii) applying ultrasonic energy to the crystalline material.

Abstract: A method for fabricating a cost-effective semiconductor on higher-thermal conductive multilayer (ML) composite wafer, the method comprising the steps of: taking a semiconductor host wafer having a first and a second host wafer surface and preparing the first host wafer surface; growing a transitional layer (TL) having properties of limiting diffusion on the host wafer first surface; depositing a uniform and low-defect additional layer (AL) on the TL; polishing the TL to prepare for bonding; taking a sacrificial semiconductor wafer, having a first and second sacrificial wafer surface, and bonding the first sacrificial wafer surface to the TL at room temperature; removing the sacrificial wafer from the TL and recycling the sacrificial wafer for future use; and grinding and polishing the first host wafer surface; whereby the resultant first host wafer surface becomes a starting surface of the ML composite wafer for device manufacturing.

Abstract: A metallic, stress-tunable thin film structure is applied to the backside of an epitaxial wafer to compensate for stress created by the frontside epitaxial layers. The structure may comprise multiple layers, including a metallic stress compensation layer (“SCL”), a metallic adhesive layer and/or a passivation (or solder attach) layer. In other embodiments, the stress compensation structure comprises only the metallic stress compensation layer. In a first application, the metallic stress compensation structure is applied to a backside of an epitaxial wafer prior to beginning device fabrication, correcting for bow present in as-purchased wafers. In a second application, the metallic stress compensation structure is applied to a backside of a thinned epitaxial wafer at the completion of frontside processing, preventing bow-induced wafer breakage upon removal from the rigid support structure or carrier disc.

Abstract: A light-emitting diode (LED) for plant illumination includes a substrate, and a PN-junction light-emitting portion over the substrate. The light-emitting portion has a strained light-emitting layer with a component formula of GaXIn(1-X)AsYP(1-Y) (0<X<1 and 0<Y<1), and a barrier layer, forming a 2˜40-pair alternating-layer structure with the strained light-emitting layer.

Abstract: A group III nitride composite substrate with a diameter of 75 mm or more includes a support substrate and a group III nitride film with a thickness of 50 nm or more and less than 10 ?m that are bonded to each other. A ratio st/mt of a standard deviation st of the thickness of the group III nitride film to a mean value mt of the thickness thereof is 0.01 or more and 0.5 or less, and a ratio so/mo of a standard deviation so of an absolute value of an off angle between a main surface of the group III nitride film and a plane of a predetermined plane orientation to a mean value mo of the absolute value of the off angle is 0.005 or more and 0.6 or less.

Abstract: The present invention relates to the production of III-N templates and also the production of III-N single crystals, III signifying at least one element of the third main group of the periodic table, selected from the group of Al, Ga and In. By adjusting specific parameters during crystal growth, III-N templates can be obtained that bestow properties on the crystal layer that has grown on the foreign substrate which enable flawless III-N single crystals to be obtained in the form of templates or even with large III-N layer thickness.

Abstract: A method for forming a wet-etchable, sacrificial lift-off layer or layers compatible with high temperature processing, a sacrificial layer, defined as consisting of a single film of one material or multiple films of multiple materials, that can tolerate high temperatures, is deposited on a substrate, called the original substrate, by sputtering or another suitable technique (e.g. evaporation, pulsed laser deposition, wet chemistry, etc.). Intermediate steps result in a lift-off layer attached to the lift-off substrate, that allow for separating the product from the original substrate.

Abstract: A wafer is formed by slicing a single crystal ingot and removing crystal strains remaining in a peripheral portion of the wafer. In the crystal strain removing step, a laser beam having such a wavelength as to be transmitted through the wafer is applied to the wafer from one side of the wafer in positions located along the margin of the wafer and spaced a predetermined distance inward from the margin, to cause growth of fine holes and amorphous regions shielding the fine holes, over the range from one side to the other side of the wafer, whereby shield tunnels are formed in an annular pattern. Then, an external force is applied to the wafer along the shield tunnels so as to break the wafer in the region of the shield tunnels, thereby removing the peripheral wafer portion where the crystal strains are remaining.

Abstract: A compound semiconductor device is disclosed. The compound semiconductor device comprises a substrate having at least a first doped region and at least a second doped region; a semiconductor layer disposed on the substrate; and a buffer layer located between said substrate and said semiconductor layer; wherein doping conditions of said first doped region and said second doped region are different from each other; wherein said semiconductor layer has different thicknesses on locations corresponding to said first doped region and said second doped region respectively, and is formed as a structure with difference in thickness.

Abstract: A substrate arrangement comprising a substrate having a surface configured to receive, by epitaxy, an epitaxial layer of semiconducting material, the substrate comprising a laminate having a handle layer and a seed layer, the seed layer having a crystal orientation arranged to receive the epitaxial layer and the handle layer having a crystal orientation different to the seed layer.

Abstract: A bulk manufacturing method for growing silicon-germanium stained-layer superlattice (SLS) using an ultra-high vacuum-chemical vapor deposition (UHV-CVD) system and a detector using it is disclosed. The growth method overcomes the stress caused by silicon and germanium lattice mismatch, and leads to uniform, defect-free layer-by-layer growth. Flushing hydrogen between the layer growths creates abrupt junctions between superlattice structure (SLS) layers. Steps include flowing a mixture of phosphine and germane gases over a germanium seed layer. This in-situ doped germanium growth step produces an n-doped germanium layer. Some of the phosphorus diffuses into the underlying germanium and reduces the stress in the underlying germanium that is initially created by the lattice mismatch between germanium and silicon. Phosphine can be replaced by diborane if a p-doped layer is desired. The reduction of stress results in a smooth bulk germanium growth.

Abstract: In one embodiment, a method of forming a semiconductor device includes forming a first porous semiconductor layer over a top surface of a substrate. A first epitaxial layer is formed over the first porous semiconductor layer. A circuitry is formed within and over the first epitaxial layer. The circuitry is formed without completely oxidizing the first epitaxial layer.

Abstract: A method of preparing a high resistivity single crystal semiconductor handle wafer comprising implanting He ions through a front surface of the high resistivity single crystal semiconductor handle wafer, which is followed by an anneal sufficient to form a nanocavity layer in the damage region formed by He ion implantation. The anneal may be prior to or concurrent with thermal oxidation to prepare a front oxidized surface layer.

Abstract: A nitride semiconductor substrate is provided, having a concave or convex warpage on a front surface side, wherein when a rear surface side is placed on a flat surface, an average roughness of the rear surface at a part not in contact with the flat surface and at a part where a height from the flat surface to the rear surface is a prescribed value or more is set to be greater than an average roughness of the rear surface at a part where the height from the flat surface including a part in contact with the flat surface to the rear surface is less than the prescribed value.

Abstract: An AlN single crystal Schottky barrier diode including: an AlN single crystal substrate having a defect density of 106 cm?2 or less and a thickness of 300 ?m or more; a first electrode formed on one surface of the AlN single crystal substrate; and a second electrode formed on one surface of the AlN single crystal substrate while being spaced apart from the first electrode, the AlN single crystal Schottky barrier diode being provided with: a rectifying property such that an on-off ratio at the time of applying 10 V and ?40 V is at least 103 even at a high temperature of 573 K; a high voltage resistance such that a voltage can be applied at least within a range of ?40 V to 10 V; and a low on-resistance characteristic such that a current begins to flow at no greater than 5 V.

Abstract: An AlN single crystal Schottky barrier diode including: an AlN single crystal substrate having a defect density of 106 cm?2 or less and a thickness of 300 ?m or more; a first electrode formed on one surface of the AlN single crystal substrate; and a second electrode formed on one surface of the AlN single crystal substrate while being spaced apart from the first electrode, the AlN single crystal Schottky barrier diode being provided with: a rectifying property such that an on-off ratio at the time of applying 10 V and ?40 V is at least 103 even at a high temperature of 573 K; a high voltage resistance such that a voltage can be applied at least within a range of ?40 V to 10 V; and a low on-resistance characteristic such that a current begins to flow at no greater than 5 V.

Abstract: A method for reducing dislocations or other defects in a light emitting device, such as light emitting diode (LED), by in-situ introducing nanoparticles into at least one of a defect-controlling layer, an n-type layer, a p-type layer, and a quantum well of the light emitting device. A light emitting device is provided, and nanoparticles are dispensed in-situ in at least one of a defect-controlling layer, an n-type layer, a p-type layer, and a quantum well of the light emitting device.

Abstract: Semiconductor devices and manufacturing and design methods thereof are disclosed. In one embodiment, a semiconductor device includes an active FinFET disposed over a workpiece comprising a first semiconductive material, the active FinFET comprising a first fin. An electrically inactive FinFET structure is disposed over the workpiece proximate the active FinFET, the electrically inactive FinFET comprising a second fin. A second semiconductive material is disposed between the first fin and the second fin.

Abstract: Thin flat crack-free freestanding nitride layers are fabricated by laser patterning of the interface and/or opposing surface of the nitride layer. The nitride layer is substantially flat once removed from the non-native substrate. The thin flat crack free nitride layers are between 3 and 250 microns thick and can have areas greater than 1 cm2.

Abstract: Non-polar (11 20) a-plane gallium nitride (GaN) films with planar surfaces are grown on (1 102) r-plane sapphire substrates by employing a low temperature nucleation layer as a buffer layer prior to a high temperature growth of the non-polar (11 20) a-plane GaN thin films.

Abstract: Non-destructive pretreatment methods are generally provided for a surface of a SiC substrate with substantially no degradation of surface morphology thereon. In one particular embodiment, a molten suspension mixture (e.g., including KOH (or KOH eutectic) and a buffering agent) is applied directly onto the surface of the SiC substrate to form a treated surface thereon. An epitaxial film (e.g., SiC) can then be grown on the treated surface to achieve very high (e.g., up to and including 100%) BPD to TED conversion rate close to the epilayer/substrate interface.

Abstract: A method to grow single phase group III-nitride articles including films, templates, free-standing substrates, and bulk crystals grown in semi-polar and non-polar orientations is disclosed. One or more steps in the growth process includes the use of additional free hydrogen chloride to eliminate undesirable phases, reduce surface roughness, and increase crystalline quality. The invention is particularly well-suited to the production of single crystal (11.2) GaN articles that have particular use in visible light emitting devices.

Abstract: The present invention is to provide a method for growing a group III nitride crystal that has a large size and has a small number of pits formed in the main surface of the crystal by using a plurality of tile substrates. A method for growing a group III nitride crystal includes a step of preparing a plurality of tile substrates 10 including main surfaces 10m having a shape of a triangle or a convex quadrangle that allows two-dimensional close packing of the plurality of tile substrates; a step of arranging the plurality of tile substrates 10 so as to be two-dimensionally closely packed such that, at any point across which vertexes of the plurality of tile substrates 10 oppose one another, 3 or less of the vertexes oppose one another; and a step of growing a group III nitride crystal 20 on the main surfaces 10m of the plurality of tile substrates arranged.

Abstract: The present disclosure generally relates to systems and methods for growing and preferentially volumetrically enhancing group III-V nitride crystals. In particular the systems and methods include diffusing constituent species of the crystals through a porous body composed of the constituent species, where the species freely nucleate to grow large nitride crystals. The systems and methods further include using thermal gradients and/or chemical driving agents to enhance or limit crystal growth in one or more planes.

Abstract: A method of producing a CVD single crystal diamond layer on a substrate includes adding into a DVD synthesis atmosphere a gaseous source comprising silicon. The method can be used to mark the diamond material, for instance to provide means by which its synthetic nature can more easily be determined. It can also be exploited to generate single crystal diamond material of high color.

Abstract: In a method of manufacturing a silicon carbide single crystal, a silicon carbide substrate having a surface of one of a (11-2n) plane and a (1-10n) plane, where n is any integer number greater than or equal to 0, is prepared. An epitaxial layer having a predetermined impurity concentration is grown on the one of the (11-2n) plane and the (1-10n) plane of the silicon carbide substrate by a chemical vapor deposition method so that a threading dislocation is discharged from a side surface of the epitaxial layer. A silicon carbide single crystal is grown into a bulk shape by a sublimation method on the one of the (11-2n) plane and the (1-10n) plane of the epitaxial layer from which the threading dislocation is discharged.

Abstract: Synthetic monocrystalline diamond compositions having one or more monocrystalline diamond layers formed by chemical vapor deposition, the layers including one or more layers having an increased concentration of one or more impurities (such as boron and/or isotopes of carbon), as compared to other layers or comparable layers without such impurities. Such compositions provide an improved combination of properties, including color, strength, velocity of sound, electrical conductivity, and control of defects. A related method for preparing such a composition is also described., as well as a system for use in performing such a method, and articles incorporating such a composition.

Abstract: Methods and apparatus for generating and delivering atomic hydrogen to the growth front during the deposition of a III-V film are provided. The apparatus adapts HWCVD technology to a system wherein the Group III precursor and the Group V precursor are delivered to the surface in isolated processing environments within the system. Multiple HWCVD units may be incorporated so that the atomic hydrogen parameters may be varied in a combinatorial manner for the development of III-V films.

Abstract: A method of manufacturing a silicon wafer provides a silicon wafer which can reduce the precipitation of oxygen to prevent a wafer deformation from being generated and can prevent a slip extension due to boat scratches and transfer scratches serving as a reason for a decrease in wafer strength, even when the wafer is provided to a rapid temperature-rising-and-falling thermal treatment process.

Abstract: The present invention provides a method for providing a crystalline germanium layer on a crystalline base substrate having a crystalline surface. The method comprises cleaning the base substrate for removing contaminants and/or native oxides from the surface, providing an amorphous germanium layer on the surface of the base substrate while exposing to the base substrate to a hydrogen source such as e.g. a hydrogen plasma, a H2 flux or hydrogen originating from dissociation of GeH4 and/or to a non-reactive gas source such as N2, He, Ne, Ar, Kr, Xe, Rn or mixtures thereof, and crystallizing the amorphous germanium layer by annealing the base substrate so as to provide a crystalline germanium layer.

Abstract: Methods for depositing a material, such as a metal or a transition metal oxide, using an ALD (atomic layer deposition) process and resulting structures are disclosed. Such methods include treating a surface of a semiconductor structure periodically throughout the ALD process to regenerate a blocking material or to coat a blocking material that enables selective deposition of the material on a surface of a substrate. The surface treatment may reactivate a surface of the substrate toward the blocking material, may restore the blocking material after degradation occurs during the ALD process, and/or may coat the blocking material to prevent further degradation during the ALD process. For example, the surface treatment may be applied after performing one or more ALD cycles. Accordingly, the presently disclosed methods enable in situ restoration of blocking materials in ALD process that are generally incompatible with the blocking material and also enables selective deposition in recessed structures.

Abstract: Method for crystal growth from a surfactant of a metal-nonmetal (MN) compound, including the procedures of providing a seed crystal, introducing atoms of a first metal to the seed crystal thus forming a thin liquid metal wetting layer on a surface of the seed crystal, setting a temperature of the seed crystal below a minimal temperature required for dissolving MN molecules in the wetting layer and above a melting point of the first metal, each one of the MN molecules being formed from an atom of a second metal and an atom of a first nonmetal, introducing the MN molecules which form an MN surfactant monolayer, thereby facilitating a formation of the wetting layer between the MN surfactant monolayer and the surface of the seed crystal, and regulating a thickness of the wetting layer, thereby growing an epitaxial layer of the MN compound on the seed crystal.

Abstract: A method for making an epitaxial structure is provided. The method includes the following steps. A substrate is provided. The substrate has an epitaxial growth surface for growing epitaxial layer. A carbon nanotube layer is placed on the epitaxial growth surface. An epitaxial layer is epitaxially grown on the epitaxial growth surface. The carbon nanotube layer is removed. The carbon nanotube layer can be removed by heating.

Abstract: There is provided a method capable of obtaining an aluminum-based group III nitride crystal layer having a smooth surface and high crystallinity by employing only HVPE in which inexpensive raw materials can be used to reduce production costs and high-speed film formation is possible without employing MOVPE. To produce a group III nitride crystal by HVPE comprising the step of growing a group III nitride crystal layer by vapor-phase growth on a single crystal substrate by contacting the heated single crystal substrate with a raw material gas containing a group III halide and a compound having a nitrogen atom, the group III nitride crystal is grown by vapor-phase growth on the single crystal substrate heated at a temperature of 1,000° C. or more and less than 1,200° C. to form an intermediate layer and then, a group III nitride crystal is further grown by vapor-phase growth on the intermediate layer on the substrate heated at a temperature of 1,200° C. or higher.

Abstract: A method for manufacturing an epitaxial wafer includes: a step of pulling a single crystal from a boron-doped silicon melt in a chamber based on a Czochralski process; and a step of forming an epitaxial layer on a surface of a silicon wafer sliced from the single crystal. The single crystal is allowed to grow while passed through a temperature region of 800 to 600° C. in the chamber in 250 to 180 minutes during the pulling step. The grown single crystal has an oxygen concentration of 10×1017 to 12×1017 atoms/cm3 and a resistivity of 0.03 to 0.01 ?cm. The silicon wafer is subjected to pre-annealing prior to the step of forming the epitaxial layer on the surface of the silicon wafer, for 10 minutes to 4 hours at a predetermined temperature within a temperature region of 650 to 900° C. in an inert gas atmosphere. The method is to fabricate an epitaxial wafer that has a diameter of 300 mm or more, and that attains a high IG effect, and involves few epitaxial defects.

Abstract: In a base material with a single-crystal silicon carbide film according to an embodiment of the invention, a plurality of recessed portions is formed on the surface of a silicon substrate, an insulating film including silicon oxide is formed across the surface of the silicon substrate including the inner surfaces of the recessed portions, the top surfaces of side wall portions of recessed portions of the insulating film form flat surfaces, a single-crystal silicon carbide film is joined on the flat surfaces, and the recessed portions below the single-crystal silicon carbide film form holes.

Abstract: The invention provides a process for producing polycrystalline silicon, including introduction of a reaction gas containing a silicon-containing component and hydrogen by means of one or more nozzles into a reactor including at least one heated filament rod on which silicon is deposited, wherein an Archimedes number Arn which describes flow conditions in the reactor, as a function of the fill level FL which states the ratio of one rod volume to one empty reactor volume in percent, for a fill level FL of up to 5% is within the range limited at the lower end by the function Ar=2000×FL?0.6 and at the upper end by the function Ar=17 000×FL?0.9, and at a fill level of greater than 5% is within a range from at least 750 to at most 4000.

Abstract: A method of forming an epitaxial layer to increase flatness of an epitaxial silicon wafer is provided. In particular, a method of controlling the epitaxial layer thickness in a peripheral part of the wafer is provided. An apparatus for manufacturing an epitaxial wafer by growing an epitaxial layer with reaction of a semiconductor wafer and a source gas in a reaction furnace comprising: a pocket in which the semiconductor wafer is placed; a susceptor fixing the semiconductor; orientation-dependent control means dependent on a crystal orientation of the semiconductor wafer and/or orientation-independent control means independent from the crystal orientation of the semiconductor wafer, wherein the apparatus may improve flatness in a peripheral part of the epitaxial layer.

Abstract: The object is to provide a photoelectric surface member which allows higher quantum efficiency. In order to achieve this object, a photoelectric surface member 1a is a crystalline layer formed by a nitride type semiconductor material, and comprises a nitride semiconductor crystal layer 10 where the direction from the first surface 101 to the second surface 102 is the negative c polar direction of the crystal, an adhesive layer 12 formed along the first surface 101 of the nitride semiconductor crystal layer 10, and a glass substrate 14 which is adhesively fixed to the adhesive layer 12 such that the adhesive layer 12 is located between the glass substrate 14 and the nitride semiconductor crystal layer 10.

Abstract: Relaxed germanium buffer layers can be grown economically on misoriented silicon wafers by low-energy plasma-enhanced chemical vapor deposition. In conjunction with thermal annealing and/or patterning, the buffer layers can serve as high-quality virtual substrates for the growth of crack-free GaAs layers suitable for high-efficiency solar cells, lasers and field effect transistors.

Abstract: There is provided an n type (100) oriented single crystal diamond semiconductor film into which phosphorous atoms have been doped and a method of producing the same. The n type (100) oriented single crystal diamond semiconductor film, characterized in that (100) oriented diamond is epitaxially grown on a substrate under such conditions that; the diamond substrate is (100) oriented diamond, a means for chemical vapor deposition provides hydrogen, hydrocarbon and a phosphorous compound in the plasma vapor phase, the ratio of phosphorous atoms to carbon atoms in the plasma vapor phase is no less than 0.1%, and the ratio of carbon atoms to hydrogen atoms is no less than 0.05%, and the method of producing the same.

Abstract: A base at least one principal plane of which is a nitride is prepared for use in epitaxial growth. The base is placed on a susceptor in an epitaxial growth reactor and heated to a predetermined temperature (step A). The heating is started with inactive, nitrogen gas being supplied into the reactor. Then, active, NH3 gas is supplied. Then, a growth step (step B) of a first nitride semiconductor layer is started without an intervening step of thermally cleaning the principal nitride plane of the base. In step B, the first nitride semiconductor layer is epitaxially grown on a principal nitride plane of a base without supply of an Si source material. Then, a relatively thick, second nitride semiconductor layer is epitaxially grown on the first nitride semiconductor layer by supplying an n-type dopant source material (step C).