Electrical Contact Material Patents (Class 204/192.17)
  • Patent number: 8696875
    Abstract: A magnetron sputter reactor (410) and its method of use, in which SIP sputtering and ICP sputtering are promoted is disclosed. In another chamber (412) an array of auxiliary magnets positioned along sidewalls (414) of a magnetron sputter reactor on a side towards the wafer from the target is disclosed. The magnetron (436) preferably is a small one having a stronger outer pole (442) of a first polarity surrounding a weaker inner pole (440) of a second polarity all on a yoke (444) and rotates about the axis (438) of the chamber using rotation means (446, 448, 450). The auxiliary magnets (462) preferably have the first polarity to draw the unbalanced magnetic field (460) towards the wafer (424), which is on a pedestal (422) supplied with power (454). Argon (426) is supplied through a valve (428). The target (416) is supplied with power (434).
    Type: Grant
    Filed: November 14, 2002
    Date of Patent: April 15, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Peijun Ding, Rong Tao, Zheng Xu, Daniel C. Lubben, Suraj Rengarajan, Michael A. Miller, Arvind Sundarrajan, Xianmin Tang, John C. Forster, Jianming Fu, Roderick C. Mosely, Fusen Chen, Praburam Gopalraja
  • Publication number: 20140087063
    Abstract: The present invention provides a method for preparing an ion optical device. A substrate is fabricated with a hard material adapted for a grinding process, the substrate at least including a planar surface, and including at least one insulating material layer. Next, one or more linear grooves are cut on the planar surface, to form multiple discrete ion optical electrode regions on the planar surface separated by the linear grooves. Then, conductive leads are fabricated on other substrate surfaces than the planar surface and in a through hole inside the substrate, to provide voltages required on ion optical electrodes. By using high-hardness materials in cooperation with high-precision machining, higher precision and a desired discrete electrode contour can be obtained.
    Type: Application
    Filed: December 2, 2013
    Publication date: March 27, 2014
    Applicant: SHIMADZU RESEARCH LABORATORY (SHANGHAI) CO. LTD.
    Inventors: Hui Mu, Gongyu Jiang, Li Ding, Jianliang Li, Wenjian Sun
  • Patent number: 8663430
    Abstract: In the present invention, in forming a LaB6 thin film by magnetron sputtering, the single-crystal properties in the wide domain direction in the obtained LaB6 thin film are improved. In one embodiment of the present invention, in a magnetron sputtering apparatus, parallel magnetic field strength on a surface of the substrate is set to 0.1 times or less parallel magnetic field strength on a surface of the target.
    Type: Grant
    Filed: May 19, 2009
    Date of Patent: March 4, 2014
    Assignee: Canon Anelva Corporation
    Inventor: Seishi Horiguchi
  • Publication number: 20140050857
    Abstract: A method for using an integrated battery and device structure includes using two or more stacked electrochemical cells integrated with each other formed overlying a surface of a substrate. The two or more stacked electrochemical cells include related two or more different electrochemistries with one or more devices formed using one or more sequential deposition processes. The one or more devices are integrated with the two or more stacked electrochemical cells to form the integrated battery and device structure as a unified structure overlying the surface of the substrate. The one or more stacked electrochemical cells and the one or more devices are integrated as the unified structure using the one or more sequential deposition processes. The integrated battery and device structure is configured such that the two or more stacked electrochemical cells and one or more devices are in electrical, chemical, and thermal conduction with each other.
    Type: Application
    Filed: October 22, 2013
    Publication date: February 20, 2014
    Applicant: Sakti3, Inc.
    Inventors: Fabio ALBANO, Chia Wei WANG, Ann Marie SASTRY
  • Patent number: 8636876
    Abstract: In accordance with the present invention, deposition of LiCoO2 layers in a pulsed-dc physical vapor deposition process is presented. Such a deposition can provide a low-temperature, high deposition rate deposition of a crystalline layer of LiCoO2 with a desired <101> or <003> orientation. Some embodiments of the deposition address the need for high rate deposition of LiCoO2 films, which can be utilized as the cathode layer in a solid state rechargeable Li battery. Embodiments of the process according to the present invention can eliminate the high temperature (>700° C.) anneal step that is conventionally needed to crystallize the LiCoO2 layer.
    Type: Grant
    Filed: December 7, 2005
    Date of Patent: January 28, 2014
    Inventors: Hongmei Zhang, Richard E. Demaray
  • Publication number: 20140008006
    Abstract: Provided is a method of manufacturing a lithium battery. The method of manufacturing the lithium battery includes providing a anode part including a anode collector, a anode layer, and a anode electrolyte layer which are successively stacked on a first pouch film, providing a cathode part including a cathode collector, a cathode layer, and a cathode electrolyte layer which are successively stacked on a second pouch film, and sealing the first and second pouch films to couple the anode part to the cathode part.
    Type: Application
    Filed: March 15, 2013
    Publication date: January 9, 2014
    Applicant: Electronics and Telecommunications Research Institute
    Inventor: Electronics and Telecommunications Research Institute
  • Patent number: 8603304
    Abstract: A method for making nickel silicide nano-wire, the method includes the following steps. Firstly, a silicon substrate and a growing device, and the growing device including a reacting room are provided. Secondly, a silicon dioxide layer is formed on a surface of the silicon substrate. Thirdly, a titanium layer is formed on the silicon dioxide layer. Fourthly, the silicon substrate is placed into the reacting room, and the reacting room is heated to a temperature of 500˜1000° C. Finally, a plurality of nickel cluster is formed onto the surface of the silicon substrate.
    Type: Grant
    Filed: August 17, 2012
    Date of Patent: December 10, 2013
    Assignees: Tsinghua University, Hon Hai Precision Industry Co., Ltd.
    Inventors: Hai-Lin Sun, Kai-Li Jiang, Qun-Qing Li, Shou-Shan Fan
  • Publication number: 20130319971
    Abstract: A method for manufacturing a flexible circuit electrode array adapted to electrically communicate with organic tissue including the following steps: a) providing a flexible polymer base layer; b) curing the base layer; c) depositing a metal layer on base layer; d) patterning the metal layer and forming metal traces on the base layer; e) roughening the surface of the base layer; f) chemically reverting the cure of the surface of the base layer; g) depositing a flexible polymer top layer on the surface of the base layer and the metal traces; h) curing the top layer and the surface of the base layer forming one single flexible polymer layer; and i) creating openings through the single layer to the metal trace layer.
    Type: Application
    Filed: November 2, 2012
    Publication date: December 5, 2013
    Applicant: Second Sight Medical Products, Inc.
    Inventor: Second Sight Medical Products, Inc.
  • Patent number: 8591990
    Abstract: An arrangement of elongated nanowires that include titanium silicide or tungsten silicide may be grown on the exterior surfaces of many individual electrically conductive microfibers of much larger diameter. Each of the nanowires is structurally defined by an elongated, centralized titanium silicide or tungsten silicide nanocore that terminates in a distally spaced gold particle and which is co-axially surrounded by a removable amorphous nanoshell. A gold-directed catalytic growth mechanism initiated during a low pressure chemical vapor deposition process is used to grow the nanowires uniformly along the entire length and circumference of the electrically conductive microfibers where growth is intended. The titanium silicide- or tungsten silicide-based nanowires can be used in a variety electrical, electrochemical, and semiconductor applications.
    Type: Grant
    Filed: March 25, 2011
    Date of Patent: November 26, 2013
    Assignees: GM Global Technology Operations LLC, The University of Western Ontario
    Inventors: Mei Cai, Xueliang Sun, Yong Zhang, Mohammad Norouzi Banis, Ruying Li
  • Patent number: 8585874
    Abstract: Disclosed is a method of preparing a positive active material for a lithium battery. The method comprises: depositing a positive active material on an electrode on a substrate (1); and putting metal chips on a metal oxides target and performing a sputtering process, thereby depositing mixed metal-oxides on the positive active material (2). In another aspect, the method comprises: preparing an electrode active material; preparing a precursor solution including the electrode active material; and printing the precursor solution on the substrate, and evaporating a solvent at a temperature of 80-120° C.
    Type: Grant
    Filed: November 25, 2009
    Date of Patent: November 19, 2013
    Assignee: Korea Institue of Science and Technology
    Inventors: Kyung Yoon Chung, Byung Won Cho, Seong-rae Lee, Hwa Young Lee, Ji-Ae Choi
  • Patent number: 8568571
    Abstract: A method of fabricating a layer of a thin film battery comprises providing a sputtering target and depositing the layer on a substrate using a physical vapor deposition process enhanced by a combination of plasma processes. The deposition process may include: (1) generation of a plasma between the target and the substrate; (2) sputtering the target; (3) supplying microwave energy to the plasma; and (4) applying radio frequency power to the substrate. A sputtering target for a thin film battery cathode layer has an average composition of LiMaNbZc, wherein 0.20>{b/(a+b)}>0 and the ratio of a to c is approximately equal to the stoichiometric ratio of a desired crystalline structure of the cathode layer, N is an alkaline earth element, M is selected from the group consisting of Co, Mn, Al, Ni and V, and Z is selected from the group consisting of (PO4), O, F and N.
    Type: Grant
    Filed: May 21, 2008
    Date of Patent: October 29, 2013
    Assignee: Applied Materials, Inc.
    Inventors: Byung Sung Kwak, Michael Stowell, Nety Krishna
  • Publication number: 20130270105
    Abstract: Conventional electrochromic devices frequently suffer from poor reliability and poor performance. Improvements are made using entirely solid and inorganic materials. Electrochromic devices are fabricated by forming an ion conducting electronically insulating interfacial region that serves as an IC layer. In some methods, the interfacial region is formed after formation of an electrochromic and a counter electrode layer. The interfacial region contains an ion conducting electronically insulating material along with components of the electrochromic and/or the counter electrode layer. Materials and microstructure of the electrochromic devices provide improvements in performance and reliability over conventional devices.
    Type: Application
    Filed: September 26, 2012
    Publication date: October 17, 2013
    Applicant: View, Inc.
    Inventor: Soladigm, Inc.
  • Patent number: 8524049
    Abstract: A method for forming a metallic nitride film includes the steps of a) providing a target made of titanium or zirconium and a substrate in a vacuum chamber, and b) forming a metallic film, which is a TiN film or a ZrN film, on a surface of the substrate by sputtering deposition under the conditions of maintaining a working pressure of the vacuum chamber in a range of 5×10?4 Torr to 5×10?2 Torr; introducing a gas mixture of air and argon into the vacuum chamber at a flow rate ratio of the air to the argon ranging from 5:100 to 15:100, and applying a direct current power ranging from 100 Watts to 5000 Watts by a power supply. Because air can be conveniently collected and the requirement of the base pressure is lower than that of a prior art method, the method of the present invention has the advantages of simple equipment requirement, time-effective manufacturing processes and low cost.
    Type: Grant
    Filed: July 3, 2008
    Date of Patent: September 3, 2013
    Inventors: Fu-Hsing Lu, Jiun-Huei Yang, Po-Lun Wu, Mu-Hsuan Chan
  • Publication number: 20130209917
    Abstract: An electrical conductive member (20) includes a metal substrate (21), an intermediate layer (23) formed on the metal substrate (21), and an electrical conductive layer (25) formed on the intermediate layer (23). The intermediate layer (23) contains a constituent of the metal substrate (21), a constituent of the electrical conductive layer (25), and a crystallization inhibiting component that inhibits crystallization in the intermediate layer (23). According to this configuration, the electrical conductive member having excellent electrical conductivity and resistance to corrosion can be obtained.
    Type: Application
    Filed: July 14, 2011
    Publication date: August 15, 2013
    Inventors: Tomokatsu Himeno, Keisuke Yamamoto, Atsushi Miyazawa, Motoki Yaginuma
  • Patent number: 8500963
    Abstract: A plasma sputtering method for metal chalcogenides, such as germanium antimony telluride (GST), useful in forming phase-change memories. The substrate is held at a selected temperature at which the material deposits in either an amorphous or crystalline form. GST has a low-temperature amorphous range and a high-temperature crystalline range separated by a transition band of 105-120° C. Bipolar pulsed sputtering with less than 50% positive pulses of less than 10:s pulse width cleans the target while maintain the sputtering plasma. The temperature of chamber shields is maintained at a temperature favoring crystalline deposition or they may be coated with arc-spray aluminum or with crystallographically aligned copper or aluminum.
    Type: Grant
    Filed: July 17, 2007
    Date of Patent: August 6, 2013
    Assignee: Applied Materials, Inc.
    Inventors: Mengqi Ye, Keith A. Miller, Peijun Ding, Goichi Yoshidome, Rong Tao
  • Publication number: 20130186746
    Abstract: An enhanced sputtered film processing system and associated method comprises one or more sputter deposition sources each having a sputtering target surface and one or more side shields extending therefrom, to increase the relative collimation of the sputter deposited material, such as about the periphery of the sputtering target surface, toward workpiece substrates. One or more substrates are provided, wherein the substrates have a front surface and an opposing back surface, and may have one or more previously applied layers, such as an adhesion or release layer. The substrates and the deposition targets are controllably moved with respect to each other. The relatively collimated portion of the material sputtered from the sputtering target surface travels beyond the side shields and is deposited on the front surface of the substrates.
    Type: Application
    Filed: March 5, 2013
    Publication date: July 25, 2013
    Applicant: ADVANTEST (SINGAPORE) PTE LTD
    Inventor: ADVANTEST (SINGAPORE) PTE LTD
  • Publication number: 20130182307
    Abstract: An electrochromic device comprising a counter electrode layer comprised of lithium metal oxide which provides a high transmission in the fully intercalated state and which is capable of long-term stability, is disclosed. Methods of making an electrochromic device comprising such a counter electrode are also disclosed.
    Type: Application
    Filed: July 20, 2012
    Publication date: July 18, 2013
    Applicants: NATIONAL RENEWABLE ENERGY LABORATORY, SAGE ELECTROCHROMICS, INC.
    Inventors: Dane T. Gillaspie, Douglas G. Weir
  • Patent number: 8475634
    Abstract: A method of magnetically enhanced sputtering an electrically-conductive material onto interior surfaces of a trench described herein includes providing a magnetic field adjacent to a target formed at least in part from the electrically-conductive material, and applying a DC voltage between an anode and the target as a plurality of pulses. A high-frequency signal is applied to the pedestal supporting the semiconductor substrate to generate a self-bias field adjacent to the semiconductor substrate. The high-frequency signal is applied to the pedestal in pulses, during periods of time that overlap with the periods during which the DC voltage pulses are applied. The periods of time that the high-frequency signals are applied include a duration that extends beyond termination of the DC voltage pulse applied between the anode and the target. During each DC voltage pulse the electrically-conductive material is sputter deposited onto the side walls of the trench formed in the semiconductor substrate.
    Type: Grant
    Filed: October 24, 2008
    Date of Patent: July 2, 2013
    Assignee: OC Oerlikon Balzers AF
    Inventors: Jurgen Weichart, Stanislav Kadlec
  • Publication number: 20130153022
    Abstract: The electric power generation efficiency of a photoelectric conversion device is improved by reducing an absorption loss of light at a back-surface electrode layer. The photoelectric conversion device includes photoelectric conversion units that convert light into electricity, a first zinc oxide layer (40a) formed on the photoelectric conversion units, a second zinc oxide layer (40b) which is formed on the first zinc oxide layer (40a) and to which aluminum and silicon are added, and a reflective metal layer (40c) formed on the second zinc oxide layer (40b).
    Type: Application
    Filed: February 15, 2013
    Publication date: June 20, 2013
    Applicant: SANYO Electric Co., Ltd.
    Inventor: SANYO Electric Co., Ltd.
  • Patent number: 8460519
    Abstract: Sputtering in a physical vapor deposition (PVD) chamber may, in one embodiment, utilize a target laterally offset from and tilted with respect to the substrate. In another aspect, target power may be reduced to enhance film protection. In yet another aspect, magnetron magnets may be relatively strong and well balanced to enhance film protection. In another aspect, a shutter may be provided to protect the substrate in start up conditions. Other embodiments are described and claimed.
    Type: Grant
    Filed: March 23, 2006
    Date of Patent: June 11, 2013
    Assignee: Applied Materials Inc.
    Inventors: Mengqi Ye, Zhendong Liu, Peijun Ding
  • Patent number: 8454804
    Abstract: Sputtering in a physical vapor deposition (PVD) chamber may, in one embodiment, utilize a target laterally offset from and tilted with respect to the substrate. In another aspect, target power may be reduced to enhance film protection. In yet another aspect, magnetron magnets may be relatively strong and well balanced to enhance film protection. In another aspect, a shutter may be provided to protect the substrate in start up conditions. Other embodiments are described and claimed.
    Type: Grant
    Filed: October 28, 2005
    Date of Patent: June 4, 2013
    Assignee: Applied Materials Inc.
    Inventors: Mengqi Ye, Zhendong Liu, Peijun Ding
  • Patent number: 8454805
    Abstract: A method of depositing an amorphous layer of AlON includes providing an aluminum sputter target in a chamber, exposing the target and chamber to O2 to saturate the exposed surfaces with oxygen, introducing a substrate into the chamber in an atmosphere containing at least nitrogen and oxygen, and sputtering the target in the nitrogen and oxygen atmosphere to deposit an amorphous AlON film.
    Type: Grant
    Filed: March 20, 2009
    Date of Patent: June 4, 2013
    Assignee: SPTS Technologies Limited
    Inventor: Anthony Wilby
  • Patent number: 8449731
    Abstract: Local plasma density, e.g., the plasma density in the vicinity of the substrate, is increased by providing an ion extractor configured to transfer ions and electrons from a first region of magnetically confined plasma (typically a region of higher density plasma) to a second region of plasma (typically a region of lower density plasma). The second region of plasma is preferably also magnetically shaped or confined and resides between the first region of plasma and the substrate. A positively biased conductive member positioned proximate the second region of plasma serves as an ion extractor. A positive bias of about 50-300 V is applied to the ion extractor causing electrons and subsequently ions to be transferred from the first region of plasma to the vicinity of the substrate, thereby forming higher density plasma. Provided methods and apparatus are used for deposition and resputtering.
    Type: Grant
    Filed: February 23, 2011
    Date of Patent: May 28, 2013
    Assignee: Novellus Systems, Inc.
    Inventors: Anshu A. Pradhan, Douglas B. Hayden, Ronald L. Kinder, Alexander Dulkin
  • Patent number: 8435695
    Abstract: The present invention provides a gas diffusion electrode in which flooding therein is suppressed. The gas diffusion electrode includes: a membrane formed of conductive fibers; a layer formed of conductive fine particles existing while coming into contact with one of surfaces of the membrane; and a catalyst, in which the membrane formed of the conductive fibers includes a region carrying the catalyst and a region free from carrying the catalyst, the region carrying the catalyst including a surface of the membrane formed of the conductive fibers on an opposite side of a surface of the membrane formed of the conductive fibers, which is brought into contact with the layer formed of the conductive fine particles. The catalyst can be formed by a reactive sputtering method.
    Type: Grant
    Filed: January 31, 2008
    Date of Patent: May 7, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventor: Kazuhiro Yamada
  • Patent number: 8431033
    Abstract: A physical vapor deposition (PVD) system and method includes a chamber including a target and a pedestal supporting a substrate. A target bias device supplies DC power to the target during etching of the substrate. The DC power is greater than or equal to 8 kW. A magnetic field generating device, including electromagnetic coils and/or permanent magnets, creates a magnetic field in a chamber of the PVD system during etching of the substrate. A radio frequency (RF) bias device supplies an RF bias to the pedestal during etching of the substrate. The RF bias is less than or equal to 120V at a predetermined frequency. A magnetic field produced in the target is at least 100 Gauss inside of the target.
    Type: Grant
    Filed: December 21, 2010
    Date of Patent: April 30, 2013
    Assignee: Novellus Systems, Inc.
    Inventors: Chunming Zhou, Liqi Wu, Karthik Colinjivadi, Emery Kuo, Huatan Qiu, KieJin Park
  • Publication number: 20130065050
    Abstract: A method of dispersing a metal or metal oxide within a CNT or CNT array, comprising exposing the CNT or CNT array to a solution containing a metal compound in a non-aqueous liquid; and removing the non-aqueous liquid from the CNT or CNT array. Nanoparticles were homogenously deposited within millimeter-long carbon nanotube array (CNTA). After modified with nanoparticles, CNTA changes from hydrophobic to hydrophilic. The hydrophilic composite electrodes present ideal capacitive behavior with high reversibility. The novel, nano-architectured composite demonstrates strong promise for high-performance thick and compact electrochemical supercapacitors.
    Type: Application
    Filed: May 19, 2011
    Publication date: March 14, 2013
    Applicant: The Governors of the University of Alberta
    Inventors: Weixing Chen, Xinwei Cui
  • Patent number: 8349145
    Abstract: The present invention provides the technology for burying metal even in a fine concave portion such as trench and via. According to an embodiment of the present invention, a vapor of the metal as the objective material, a gas containing halogen for etching the metal, and a metal halide vapor made up of the metal element and the halogen element are supplied to the substrate, which thus forms a metal halide layer in the concave portion, and thereby deposits the metal under the metal halide layer. The procedure can achieve the above object.
    Type: Grant
    Filed: August 13, 2010
    Date of Patent: January 8, 2013
    Assignee: Canon Anelva Corporation
    Inventors: Suguru Noda, Satoshi Takashima
  • Patent number: 8349146
    Abstract: A method for making nickel silicide nano-wire, the method includes the following steps. Firstly, providing a silicon substrate and a growing device, and the growing device including a reacting room. Secondly, forming a silicon dioxide layer on a surface of the silicon substrate. Thirdly, forming a titanium layer on the silicon dioxide layer. Fourthly, placing the silicon substrate into the reacting room, and heating the reacting room to a temperature of 500˜1000° C. Finally, forming a plurality of nickel cluster onto the surface of the silicon substrate.
    Type: Grant
    Filed: November 6, 2008
    Date of Patent: January 8, 2013
    Assignees: Tsinghua University, Hon Hai Precision Industry Co., Ltd.
    Inventors: Hai-Lin Sun, Kai-Li Jiang, Qun-Qing Li, Shou-Shan Fan
  • Patent number: 8337675
    Abstract: A method induces plasma vapor deposition of metal into a recess in a workpiece. The method achieves re-sputtering of the metal at the base of the recess with a sputter gas by utilizing a mixture of Ar and He and/or Ne as the sputter gas with a ratio of He and/or Ne:Ar of at least about 10:1.
    Type: Grant
    Filed: January 26, 2010
    Date of Patent: December 25, 2012
    Assignee: SPTS Technologies Limited
    Inventors: Mark Ian Carruthers, Stephen Burgess, Anthony Wilby, Amit Rastogi, Paul Rich, Nicholas Rimmer
  • Patent number: 8257561
    Abstract: Methods are generally provided for forming a conductive oxide layer on a substrate. In one particular embodiment, the method can include sputtering a transparent conductive oxide layer on a substrate at a sputtering temperature from about 10° C. to about 100° C. A cap layer including cadmium sulfide can be deposited directly on the transparent conductive oxide layer. The transparent conductive oxide layer can be annealed at an anneal temperature from about 450° C. to about 650° C. Methods are also generally provided for manufacturing a cadmium telluride based thin film photovoltaic device. An intermediate substrate is also generally provided for use to manufacture a thin film photovoltaic device.
    Type: Grant
    Filed: March 30, 2010
    Date of Patent: September 4, 2012
    Assignee: Primestar Solar, Inc.
    Inventors: Scott Daniel Feldman-Peabody, Jennifer Ann Drayton, Robert Dwayne Gossman, Mehran Sadeghi
  • Patent number: 8252151
    Abstract: In a layout method of a bridging electrode, the method includes the steps of: providing a substrate; forming a transparent electro-conductive layer on the substrate and the transparent electro-conductive layer having a plurality of neighboring patterned blocks; forming an alignment film layer on the substrate and the alignment film layer having a plurality of bridging grooves of a bridging insulation unit crossing between the patterned blocks; forming an electro-conductive layer on the substrate and the electro-conductive layer having a plurality of wires respectively disposed on the bridging grooves, wherein the wires of the electro-conductive layer being formed through an optical compensation mask in conjunction with at least one of over-exposure and over-development; and forming a protection layer on the substrate to enhance optical transmission and to protect the substrate, the transparent electro-conductive layer, the alignment film layer and the electro-conductive layer.
    Type: Grant
    Filed: March 24, 2010
    Date of Patent: August 28, 2012
    Inventor: Li-Li Fan
  • Patent number: 8231766
    Abstract: A novel board for printed wiring comprising a fine conductor wiring having a clear and favorable boundary line and fabricated by an ordinal printing method such as screen printing, a printed wiring board using the same, and methods for manufacturing them. A board for printed wiring and a method for manufacturing the same are characterized in that the surface of a board is subjected to one of the surface treatments: (a) roughening, (2) plasma treatment, (3) roughening and then plasma treatment, and (4) roughening and then forming of a metal film coating by sputtering. A printed wiring board and a method for manufacturing the same is characterize in that a conductor wiring is fabricated by printing using a conductive paste containing metal particles the average particle diameter of which is 4 ?m or less and the maximum particle diameter of which is 15 ?m or less.
    Type: Grant
    Filed: October 25, 2007
    Date of Patent: July 31, 2012
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Noriki Hayashi, Yoshio Oka, Masahiko Kanda, Narito Yagi, Kenji Miyazaki, Kyouichirou Nakatsugi
  • Patent number: 8216434
    Abstract: A micromachined sensor for measuring vascular parameters, such as fluid shear stress, includes a substrate having a front-side surface, and a backside surface opposite the front-side surface. The sensor includes a diaphragm overlying a cavity etched within the substrate, and a heat sensing element disposed on the front-side surface of the substrate and on top of the cavity and the diaphragm. The heat sensing element is electrically couplable to electrode leads formed on the backside surface of the substrate. The sensor includes an electronic system connected to the backside surface and configured to measure a change in heat convection from the sensing element to surrounding fluid when the sensing element is heated by applying an electric current thereto, and further configured to derive from the change in heat convection vascular parameters such as the shear stress of fluid flowing past the sensing element.
    Type: Grant
    Filed: March 3, 2008
    Date of Patent: July 10, 2012
    Assignee: University of Southern California
    Inventors: Tzung K. Hsiai, Gopikrishnan Soundararajan, Eun Sok Kim, Hongyu Yu, Mahsa Rouhanizadeh, Christina Tiantian Lin
  • Publication number: 20120168742
    Abstract: A bulk barium copper sulfur fluoride (BCSF) material can be made by combining Cu2S, BaS and BaF2, heating the ampoule between 400 and 550° C. for at least two hours, and then heating the ampoule at a temperature between 550 and 950° C. for at least two hours. The BCSF material may be doped with potassium, rubidium, or sodium. Additionally, a p-type transparent conductive material can comprise a thin film of BCSF on a substrate where the film has a conductivity of at least 1 S/cm. The substrate may be a plastic substrate, such as a polyethersulfone, polyethylene terephthalate, polyimide, or some other suitable plastic or polymeric substrate.
    Type: Application
    Filed: March 6, 2012
    Publication date: July 5, 2012
    Inventors: Jesse A. Frantz, Jasbinder S. Sanghera, Vinh Q. Nguyen, Woohong Kim, Ishwar D. Aggarwal
  • Patent number: 8206562
    Abstract: The invention relates to a method and apparatus for the application of material to form a layer of an organic electroluminescent device. The material is sputter deposited typically from at least one target of material held in respect to a magnetron in a coating chamber. The magnetrons used can be unbalanced magnetrons and/or are provided with other magnetrons and/or magnet arrays in a closed field configuration. The material is found to be deposited in a manner which prevents or minimises damage to the device and hence reduces or removes the need for a barrier layer to be applied.
    Type: Grant
    Filed: February 16, 2006
    Date of Patent: June 26, 2012
    Assignees: Cambridge Display Technology Limited, System Control Technologies Limited
    Inventors: John Michael Walls, Desmond Gibson, William Young, Nalinkumar Patel, Nicoletta Anathassopoulou
  • Publication number: 20120125765
    Abstract: It is an object of the present invention to provide a wiring board plasma processing apparatus capable of improving throughput and achieving reduction in running cost while a sputtering process is employed in manufacturing a wiring board. The wiring board plasma processing apparatus of the present invention has, in a same plasma processing chamber, a surface processing portion provided with a plasma source and performing a pretreatment of a board to be processed, and a plurality of sputtering film forming portions forming a seed layer formed of a plurality of films.
    Type: Application
    Filed: July 16, 2010
    Publication date: May 24, 2012
    Applicants: TOKYO ELECTRON LIMITED, TOHOKU UNIVERSITY
    Inventors: Tadahiro Ohmi, Tetsuya Goto, Takaaki Matsuoka
  • Publication number: 20120086649
    Abstract: A manufacturing method of conductive circuits of a touch panel includes the following steps: providing a substrate with a conductive area thereon; providing at least one hard coating layer on the conductive area of the substrate; forming a plurality of grooves on the hard coating layer; forming a metal layer on the hard coating layer and in the grooves; and heating the metal layer so as to condense the metallic materials thereof in the grooves due to surface tension, thus forming a plurality of conductive circuits.
    Type: Application
    Filed: October 12, 2010
    Publication date: April 12, 2012
    Applicant: INNOVATION & INFINITY GLOBAL CORP.
    Inventor: CHAO-CHIEH CHU
  • Publication number: 20120006781
    Abstract: A metal vanadium film is used as an extraction electrode contacting with a vanadium oxide or doped vanadium oxide film. The electrode material is adapted for a detector, sensor and optical switch based on a vanadium oxide or doped vanadium oxide film. The metal vanadium film is in favor of reducing the thermal conductivity of the support structure of the array unit. The preparation process of the vanadium film using the metal vanadium as the source material is more easily controlled than that of NiCr film using the NiCr alloy as the source material. The extraction electrode of the present invention easily obtains an excellent metal-semiconductor contact characteristic. The preparation process and patterning process of the metal vanadium film have an excellent technology compatibility with the IC and MEMS manufacturing processes.
    Type: Application
    Filed: July 6, 2010
    Publication date: January 12, 2012
    Inventors: Yadong Jiang, Tao Wang, Deen Gu, Kai Yuan
  • Patent number: 8092558
    Abstract: There is disclosed a microchannel reactor module for the immediate catalytic release of hydrogen from hydrogenated organic molecules along with the recovery of hydrogen gas and the recovery of dehydrogenated organic molecules as a liquid. More specifically, the disclosure provides a polyimide-based microchannel plate that is particularly useful for a process of immediate catalytic release of hydrogen from a hydrogenated organic molecule or formulation of molecules.
    Type: Grant
    Filed: January 20, 2009
    Date of Patent: January 10, 2012
    Assignee: Asemblon, Inc.
    Inventors: David G. O'Connor, Robert B. Nelson
  • Publication number: 20110308929
    Abstract: Disclosed herein is a touch panel 100, including: a transparent electrode 120 including a conductive polymer and formed on one surface of a transparent substrate 110, connection electrodes 130 formed on both ends of the transparent electrode 120, and silver electrode 140 formed on the connection electrodes 130 to correspond to the connection electrodes 130, wherein the connection electrodes 130 prevent the transparent electrode 120 from contacting the silver electrodes 140. The connection electrode 130 is interposed between the transparent electrode 120 and the silver electrode 140 to prevent a chemical reaction between the transparent electrode 120 and the silver electrode 140, thereby maintaining electric resistance constantly.
    Type: Application
    Filed: September 17, 2010
    Publication date: December 22, 2011
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jae Il Kim, Woon Chun Kim, Yong Soo Oh, Jong Young Lee
  • Publication number: 20110303960
    Abstract: Embodiments described herein provide a semiconductor device and methods and apparatuses of forming the same. The semiconductor device includes a substrate having a source and drain region and a gate electrode stack on the substrate between the source and drain regions. The gate electrode stack includes a conductive film layer on a gate dielectric layer, a refractory metal nitride film layer on the conductive film layer, a silicon-containing film layer on the refractory metal nitride film layer, and a tungsten film layer on the silicon-containing film layer. In one embodiment, the method includes positioning a substrate within a processing chamber, wherein the substrate includes a source and drain region, a gate dielectric layer between the source and drain regions, and a conductive film layer on the gate dielectric layer.
    Type: Application
    Filed: June 9, 2011
    Publication date: December 15, 2011
    Applicant: APPLIED MATERIALS, INC.
    Inventors: YONG CAO, Xianmin Tang, Srinivas Gandikota, Wei D. Wang, Zhendong Liu, Kevin Moraes, Muhammad M. Rasheed, Thanh X. Nguyen, Ananthkrishna Jupudi
  • Patent number: 8062486
    Abstract: Proposed are a lithium-containing transition metal oxide target formed from a sintered compact of lithium-containing transition metal oxides showing a hexagonal crystalline system in which the sintered compact has a relative density of 90% or higher and an average grain size of 1 ?m or greater and 50 ?m or less, and a lithium-containing transition metal oxide target formed from a sintered compact of lithium-containing transition metal oxides showing a hexagonal crystalline system in which the intensity ratio of the (003) face, (101) face and (104) face based on X-ray diffraction using CuK? ray satisfies the following conditions: (1) Peak intensity ratio of the (101) face in relation to the (003) face is 0.4 or higher and 1.1 or lower; and (2) Peak ratio of the (101) face in relation to the (104) face is 1.0 or higher.
    Type: Grant
    Filed: April 27, 2007
    Date of Patent: November 22, 2011
    Assignee: JX Nippon Mining & Metals Corporation
    Inventors: Ryuichi Nagase, Yoshio Kajiya
  • Patent number: 8062484
    Abstract: A method of performing physical vapor deposition of copper onto an integrated circuit in a vacuum chamber of a plasma reactor, includes providing a copper target near a ceiling of the chamber, placing an integrated circuit wafer on a wafer support pedestal facing the target, introducing a carrier gas into the vacuum chamber, and establishing a deposition rate on the wafer by applying D.C. power to the copper target while establishing a plasma ionization fraction by applying VHF power to the copper target. The method can further include promoting re-sputtering of copper on vertical surfaces on the wafer by coupling HF or LF power to the wafer. The method preferably includes maintaining a target magnetic field at the target and scanning the target magnetic field across the target.
    Type: Grant
    Filed: September 7, 2005
    Date of Patent: November 22, 2011
    Assignee: Applied Materials, Inc.
    Inventors: Karl M. Brown, John Pipitone, Vineet Mehta
  • Publication number: 20110278531
    Abstract: The electrode of a phase change memory may be formed with a mixture of metal and a non-metal, the electrode having less nitrogen atoms than metal atoms. Thus, in some embodiments, at least a portion of the electrode has less nitrogen than would be the case in a metal nitride. The mixture can include metal and nitrogen or metal and silicon, as two examples. Such material may have good adherence to chalcogenide with lower reactivity than may be the case with metal nitrides.
    Type: Application
    Filed: May 11, 2010
    Publication date: November 17, 2011
    Inventors: Davide Erbetta, Camillo Bresolin, Andrea Gotti
  • Patent number: 8048492
    Abstract: A magnetoresistive effect element is produced by forming a first magnetic layer, a spacer layer including an insulating layer and a conductive layer which penetrates through the insulating layer and passes a current, on the first magnetic layer, and a second magnetic layer all of which or part of which is treated with ion, plasma or heat, on the formed spacer layer.
    Type: Grant
    Filed: December 20, 2006
    Date of Patent: November 1, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideaki Fukuzawa, Hiromi Yuasa, Yoshihiko Fuji, Hitoshi Iwasaki
  • Patent number: 8038850
    Abstract: A sputter deposition apparatus and method, and a substrate holder for use with a sputter deposition apparatus is disclosed. According to one embodiment of the invention, a sputter deposition apparatus is provided, including at least one sputter target, a first plasma, a substrate holder, and a further plasma. In one embodiment, the further plasma is an ECWR plasma. According to an additional embodiment of the invention, an anode is provided between the further plasma, and the substrate holder. According to a further embodiment, the substrate holder includes a dielectric layer with varying thickness.
    Type: Grant
    Filed: June 23, 2006
    Date of Patent: October 18, 2011
    Assignee: Qimonda AG
    Inventor: Klaus Ufert
  • Publication number: 20110236736
    Abstract: An object is to provide an energy storage device capable of supplying stable voltage and easily detecting remaining capacity and charging capacity. The energy storage device includes a positive electrode, a negative electrode formed so as to face the positive electrode, and an electrolyte interposed between the positive electrode and the negative electrode, in which a discharging curve or a charging curve of the positive electrode has plateaus (also referred to as flat portions of the potential). Specifically, the discharging curve or the charging curve of the positive electrode has a plurality of plateaus, and positive electrode potential can be monitored in plural steps, whereby the remaining capacity and the charging capacity can be easily detected.
    Type: Application
    Filed: March 21, 2011
    Publication date: September 29, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Mikio YUKAWA
  • Publication number: 20110233051
    Abstract: In a layout method of a bridging electrode, the method includes the steps of: providing a substrate; forming a transparent electro-conductive layer on the substrate and the transparent electro-conductive layer having a plurality of neighboring patterned blocks; forming an alignment film layer on the substrate and the alignment film layer having a plurality of bridging grooves of a bridging insulation unit crossing between the patterned blocks; forming an electro-conductive layer on the substrate and the electro-conductive layer having a plurality of wires respectively disposed on the bridging grooves, wherein the wires of the electro-conductive layer being formed through an optical compensation mask in conjunction with at least one of over-exposure and over-development; and forming a protection layer on the substrate to enhance optical transmission and to protect the substrate, the transparent electro-conductive layer, the alignment film layer and the electro-conductive layer.
    Type: Application
    Filed: March 24, 2010
    Publication date: September 29, 2011
    Inventor: Li-Li Fan
  • Patent number: 8022291
    Abstract: Certain example embodiments of this invention relate to a photovoltaic (PV) device including an electrode such as a front electrode/contact, and a method of making the same. In certain example embodiments, the front electrode has a textured (e.g., etched) surface that faces the photovoltaic semiconductor film of the PV device. The front electrode has a transparent conductive oxide (TCO) film having first and second layers (continuous or discontinuous) of the same material (e.g., zinc oxide, zinc aluminum oxide, indium-tin-oxide, or tin oxide), where the first TCO layer is sputter-deposited using a ceramic sputtering target(s) and the second TCO layer of the same material is sputter-deposited using a metallic or substantially metallic sputtering target(s). This allows the better quality TCO of the film, deposited more slowly via the ceramic target(s), to be formed using the ceramic target and the lesser quality TCO of the film to be deposited more quickly and cost effectively via the metallic target(s).
    Type: Grant
    Filed: October 15, 2008
    Date of Patent: September 20, 2011
    Assignee: Guardian Industries Corp.
    Inventors: Scott V. Thomsen, Yiwei Lu, Alexey Krasnov
  • Patent number: 8012315
    Abstract: A method of fabricating by co-sputtering deposition a lanthanoid aluminate film with enhanced electrical insulativity owing to suppression of deviation in composition of the film is disclosed. Firstly within a vacuum chamber, hold two separate targets, one of which is made of lanthanoid aluminate (LnAlO3) and the other of which is made of aluminum oxide (Al2O3). Then, transport and load a substrate into the vacuum chamber. Next, introduce a chosen sputtering gas into this chamber. Thereafter, perform sputtering of both the targets at a time to thereby form a lanthanoid aluminate film on the substrate surface. This film is well adaptable for use as ultra-thin high dielectric constant (high-k) gate dielectrics in highly miniaturized metal oxide semiconductor (MOS) transistors.
    Type: Grant
    Filed: December 28, 2007
    Date of Patent: September 6, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tsunehiro Ino, Akira Takashima