Forming Nonelectrolytic Coating Before Depositing Predominantly Single Metal Or Alloy Electrolytic Coating Patents (Class 205/183)
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Publication number: 20020139686Abstract: A composition and method for cleaning and conditioning a non-conductive surface defined by a through hole in a printed circuit board (PCB) is disclosed. The through hole surface is contacted with the composition of the invention to provide a cleaned and conditioned surface. The clean and conditioned surface is coated with conductive carbon particles (usually graphite) to provide a carbon-coated surface. The carbon-coated surface is electro plated and then soldered using hot solder. Those surfaces that have been soldered and also treated with the composition of the invention exhibit fewer blow hole problems. The composition of the invention comprises carbonates, binders, and resins, and combinations thereof, that improve the adhesion and coverage of a coating containing graphite to a surface defined by a through hole bore or other substrate. (“Through holes” as used herein refers both to through holes and to vias.Type: ApplicationFiled: March 1, 2002Publication date: October 3, 2002Inventors: Michael V. Carano, Frank Polakovic
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Publication number: 20020139680Abstract: A method for fabricating an abrasive tool. A tool substrate is provided. A surface of the substrate is coated with an electroplatable bonding material. The electroplatable bonding material comprises a mixture of a conductive material and an adhesive material. Abrasive particles are adhered to the bonding material. The abrasive particles are adhered so as to have a predetermined distribution over the coated surface of the substrate. A metal layer is electroplated to the electroplatable bonding material to secure the abrasive particles to the substrate. Thus, in accordance with the present invention, the fabricated abrasive tool has abrasive particles having the predetermine distribution and fixed to the substrate by the adhesive material and the electroplated metal layer.Type: ApplicationFiled: March 27, 2002Publication date: October 3, 2002Inventor: Kosta Louis George
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Publication number: 20020130047Abstract: According to the invention, an article that is exposed to high temperature e.g., over 1000° C. during operation is disclosed. In one embodiment, a method for a gas turbine engine includes a directionally solidifed metallic substrate, e.g., a superalloy, which defines an airfoil, a root and a platform located between the blade and root. The platform has an underside adjacent the root, and a corrosion resistant overlay coating such as an MCrAlY or a noble metal containing aluminide or corrosion inhibiting ceramic is located on portions or the blade not previously covered with such coatings, e.g., the underside of the platform and the neck. The applied coating prevents corrosion and stress corrosion cracking of blade in these regions. Where the airfoil is also created, the airfoil coating may have a composition different from that of the coating on the underplatform surfaces.Type: ApplicationFiled: January 29, 2002Publication date: September 19, 2002Applicant: United Technologies CorporationInventors: William Patrick Allen, Walter E. Olson, Dilip M. Shah, Alan David Cetel
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Publication number: 20020100693Abstract: An improved method for forming a copper layer (100). After the copper seed layer (116) is formed, any oxidized copper (118) at the surface is electrochemically reduced back to copper rather than being dissolved. Copper (120) is then electrochemically deposited (ECD) over the intact seed layer (116).Type: ApplicationFiled: January 30, 2002Publication date: August 1, 2002Inventors: Jiong-Ping Lu, David Jay Rose, Linlin Chen
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Patent number: 6423200Abstract: A method for making semiconductor interconnect features in a dielectric layer is provided. The method includes depositing a copper seed layer over a barrier layer that is formed over the dielectric layer and into etched features of the dielectric layer. The copper seed layer is then treated to remove an oxidized layer from over the copper seed layer. The method then moves to electroplating a copper fill layer over the treated copper seed layer. The copper fill layer is configured to fill the etched features of the dielectric layer.Type: GrantFiled: September 30, 1999Date of Patent: July 23, 2002Assignee: Lam Research CorporationInventor: Diane J. Hymes
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Publication number: 20020088716Abstract: The present invention provides a method and apparatus for forming a copper layer on a substrate, preferably using a sputtering process. The sputtering process involves bombarding a conductive member of enhanced hardness with ions to dislodge the copper from the conductive member. The hardness of the target may be enhanced by alloying the copper conductive member with another material and/or mechanically working the material of the conductive member during its manufacturing process in order to improve conductive member and film qualities. The copper may be alloyed with magnesium, zinc, aluminum, iron, nickel, silicon and any combination thereof.Type: ApplicationFiled: March 6, 2002Publication date: July 11, 2002Inventors: Vikram Pavate, Murali Abburi, Murali Narasimhan, Seshadri Ramaswami
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Publication number: 20020070120Abstract: This invention provides a composite foil comprising an organic release layer between a metal carrier layer and an ultra-thin copper foil, and a process for producing such composite foils comprising the steps of depositing the organic release layer on the metal carrier layer and then forming an ultra-thin copper foil layer on said organic release layer, preferably by electrodeposition. The organic release layer preferably is a heterocyclic compound selected from triazoles, thiazoles, imidazoles, or their derivatives, and provides a uniform bond strength which is adequate to prevent separation of the carrier and ultra-thin copper foil during handling and lamination, but which is significantly lower than the peel strength of a copper/substrate bond, so that the carrier can easily be removed after lamination of the composite foil to an insulating substrate. The invention also includes laminates made from such composite foils and printed wiring boards made from such laminates.Type: ApplicationFiled: October 26, 2001Publication date: June 13, 2002Inventors: Takashi Kataoka, Yutaka Hirasawa, Takuya Yamamoto, Kenichiro Iwakiri
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Patent number: 6395161Abstract: A gas sensor and a method for its manufacture are described. The gas sensor has a solid electrolyte having at least one measuring electrode and one porous protective coating. The measuring electrode has an electrically conductive base layer and a further layer, the further layer god being deposited in the pores of the porous protective coating adjacent to the base layer via galvanic deposition. In order to deposit the further layer via galvanic deposition, the basic body, which has been fused with the base layer and the protective coating via vitrification, is immersed in a galvanizing bath, the base layer being connected as the cathode.Type: GrantFiled: March 23, 2000Date of Patent: May 28, 2002Assignee: Robert Bosch GmbHInventors: Jens Stefan Schneider, Harald Neumann, Johann Riegel, Frank Stanglmeier, Bernd Schumann
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Patent number: 6391181Abstract: An article includes a colored electroplated metallic coating comprising both nickel and zinc, on an underplate of copper, brass, bright nickel or matt nickel, supported on a metallic or plastic substrate, various colors in the electroplated coating being exemplified. The electrolyte contains Ni2+, Zn2+, (NH4)+ and thiocyanate ions in specified concentrations, but no oxidative ion, color variation of the coating being achieved exclusively by variation of current density, time of the electroplating step and current quantity, provided that the current density at the cathode underplate is within the range of 0.01 to 0.5 A/dm2.Type: GrantFiled: August 31, 1999Date of Patent: May 21, 2002Assignee: Nickel Rainbow LimitedInventors: Larisa Gorodetski, Leonid Levinson
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Patent number: 6391476Abstract: A brazing sheet product having a core sheet (1) made of an aluminium alloy, having one or both of the surfaces of the core sheet clad with an aluminium clad layer (2), and a layer (3) comprising nickel on the outersurface of one or both the aluminium clad layer or layers (2). There is a layer (4) comprising zinc or tin as a bonding layer between the outersurface of the aluminium clad layer or layers (2) and the layer (3) comprising nickel. The aluminium clad alloy layer comprises, in weight percent: Si 2 to 18, Mg up to 8.0, Zn up to 5.0, Cu up to 5.0, Mn up to 0.30, In up to 0.30, Fe up to 0.80, Sr up to 0.20, at least one element selected from the group consisting of: Bi 0.01 to 1.0, Pb 0.01 to 1.0, Li 0.01 to 1.0, Sb 0.01 to 1.0, impurities each up to 0.05, total up to 0.20; and balance aluminium.Type: GrantFiled: March 9, 2001Date of Patent: May 21, 2002Assignee: Corus Aluminium Walzprodukte GmbHInventors: Adrianus Jacobus Wittebrood, Jacques Hubert Olga Joseph Wijenberg
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Patent number: 6383357Abstract: A three-dimensional formed metallic structure with varying thickness including sloping flanks is formed on a substrate. A conductive layer is applied to the substrate initially, in the form of laterally spaced electrically isolated conductive islands. A cathodic potential is connected to at least one of the islands, leaving others unconnected, and deposition proceeds due to the cathodic potential. As metallic material is deposited and builds up, it eventually contacts adjacent islands, thereby coupling the cathodic potential to a wider area where deposition commences. Deposition is thickest at the at least one island initially coupled to the cathodic potential and thinner progressing away, forming flanks that are linearly sloped, curved or similarly formed by thickness variations the vary proceeding away from the initially coupled island or islands.Type: GrantFiled: December 29, 1998Date of Patent: May 7, 2002Assignee: Fraunhofer-Gesellschaft zur Forderung der Angewandten Forschung, E.V.Inventor: Andreas Maciossek
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Patent number: 6365030Abstract: A method of manufacturing R—Fe—B bonded magnets, capable of forming various corrosion resisting films on a R—Fe—B bonded magnet uniformly with a very high bonded strength so as to attain such a very high corrosion resistance thereof that prevents the bonded magnet from being rusted even in a long-period high-temperature high-humidity test; comprising barrel-polishing a porous R—Fe—B bonded magnet by a dry method using as media an abrasive stone formed by sintering inorganic powder of Al2O3, SiC, ZrO and MgO, or a mixture of an abrasive for metal balls and vegetable media, such as vegetable skin chips, sawdust, rind of a fruit and a core of corn, or a mixture of vegetable media the surfaces of which are modified by the above-mentioned abrasive and the above-mentioned inorganic pulverized bodies, so as to enable a surface of the magnet to be smoothed and sealed.Type: GrantFiled: May 10, 2000Date of Patent: April 2, 2002Assignee: Sumitomo Special Metals Co., Ltd.Inventors: Kohshi Yoshimura, Fumiaki Kikui, Takeshi Nishiuchi
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Patent number: 6358392Abstract: The invention is directed to the use of electrochemical deposition to fabricate thin films of a material (e.g., bismuth) exhibiting a superior magnetoresistive effect. The process in accordance with a preferred embodiment produces a thin film of bismuth with reduced polycrystallinization and allows for the production of single crystalline thin films. Fabrication of a bismuth thin film in accordance with a preferred embodiment of the invention includes deposition of a bismuth layer onto a substrate using electrochemical deposition under relatively constant current density. Preferably, the resulting product is subsequently exposed to an annealing stage for the formation of a single crystal bismuth thin film. The inclusion of these two stages in the process produces a thin film exhibiting superior MR with a simple field dependence in the process suitable for a variety of field sensing applications.Type: GrantFiled: November 18, 1999Date of Patent: March 19, 2002Assignee: The Johns Hopkins UniversityInventors: Fengyuan Yang, Kai Liu, Chia-Ling Chien, Peter C. Searson
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Publication number: 20020027081Abstract: There is provided a copper-plating liquid free from an alkali metal and a cyanide which, when used in plating of a substrate having an outer seed layer and fine recesses of a high aspect ratio, can reinforce the thin portion of the seed layer and can embed copper completely into the depth of the fine recesses.Type: ApplicationFiled: June 29, 2001Publication date: March 7, 2002Inventors: Mizuki Nagai, Shuichi Okuyama, Ryoichi Kimizuka, Takeshi Kobayashi
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Publication number: 20020023838Abstract: A gas sensor and a method for its manufacture are described. The gas sensor has a solid electrolyte (11) having at least one measuring electrode (15) and one porous protective coating (16). The measuring electrode (15) has an electrically conductive base layer (25) and a further layer (27), the further layer (27) being deposited in the pores of the porous protective coating (16) adjacent to the base layer (25) via galvanic deposition. In order to deposit the further layer (27) via galvanic deposition, the basic body (10), which has been fused with the base layer (25) and the protective coating (16) via vitrification, is immersed in a galvanizing bath, the base layer (25) being connected as the cathode.Type: ApplicationFiled: March 23, 2000Publication date: February 28, 2002Inventors: JENS STEFAN SCHNEIDER, HARALD NEUMANN, JOHANN RIEGEL, FRANK STANGLMEIER, BERND SCHUMANN
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Publication number: 20020023845Abstract: This invention relates to polyolefin alloys that are receptive to metal plating. These compositions also have enhanced properties and are easily processed into articles by various molding methods. The blends of the invention preferably include polyolefin homopolymers or copolymers, acrylonitrile-butadiene-styrene polymers, and a blend of at least one styrene monoolefin copolymer and at least one styrene diolefin copolymer. These blends have excellent platability and superior physical properties including enhanced rigidity, toughness, and dimensional stability.Type: ApplicationFiled: September 18, 2001Publication date: February 28, 2002Inventors: Ruidong Ding, Satchit Srinivasan, Scott Matteucci
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Publication number: 20020011415Abstract: A method and apparatus for electrochemically depositing a metal into a high aspect ratio structure on a substrate are provided. In one aspect, a method is provided for processing a substrate including positioning a substrate having a first conductive material disposed thereon in a processing chamber containing an electrochemical bath, depositing a second conductive material on the first conductive material as the conductive material is contacted with the electrochemical bath by applying a plating bias to the substrate while immersing the substrate into the electrochemical bath, and depositing a third conductive material in situ on the second conductive material by an electrochemical deposition technique to fill the feature. The bias may include a charge density between about 20 mA*sec/cm2 and about 160 mA*sec/cm2. The electrochemical deposition technique may include a pulse modulation technique.Type: ApplicationFiled: May 10, 2001Publication date: January 31, 2002Applicant: Applied Materials, Inc.Inventors: Peter Hey, Byung-Sung Leo Kwak
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Publication number: 20020011417Abstract: The present invention provides a method and apparatus that plates/deposits a conductive material on a semiconductor substrate and then polishes the same substrate. This is achieved by providing multiple chambers in a single apparatus, where one chamber can be used for plating/depositing the conductive material and another chamber can be used for polishing the semiconductor substrate. The plating/depositing process can be performed using brush plating or electro chemical mechanical deposition and the polishing process can be performed using electropolishing or chemical mechanical polishing. The present invention further provides a method and apparatus for intermittently applying the conductive material to the semiconductor substrate and also intermittently polishing the substrate when such conductive material is not being applied to the substrate.Type: ApplicationFiled: August 28, 2001Publication date: January 31, 2002Applicant: NuTool, Inc.Inventors: Homayoun Talieh, Cyprian Emeka Uzoh
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Publication number: 20020008034Abstract: A process for metallization of a workpiece, such as a semiconductor workpiece. In an embodiment, an alkaline electrolytic copper bath is used to electroplate copper onto a seed layer, electroplate copper directly onto a barrier layer material, or enhance an ultra-thin copper seed layer which has been deposited on the barrier layer using a deposition process such as PVD. The resulting copper layer provides an excellent confirm copper coating that fills trenches, vias, and other microstructures in the workpiece. When used for seed layer enhancement, the resulting copper seed layer provide an excellent conformal copper coating that allows the microstructures to be filled with a copper layer having good uniformity using electrochemical deposition techniques. Further, copper layers that are electroplated in the disclosed manner exhibit low sheet resistance and are readily annealed at low temperatures.Type: ApplicationFiled: December 7, 2000Publication date: January 24, 2002Inventors: Linlin Chen, Gregory J. Wilson, Paul R. McHugh, Robert A. Weaver, Thomas L. Ritzdorf
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Publication number: 20020000382Abstract: Disclosed are methods of repairing metal seed layers prior to subsequent metallization. Such repair methods provide metal seed layers disposed on a substrate that are substantially free of metal oxide and substantially free of discontinuities.Type: ApplicationFiled: December 15, 2000Publication date: January 3, 2002Applicant: Shipley Company, L.L.C. of MarlboroughInventors: Denis Morrissey, David Merricks, Leon R. Barstad, Eugene N. Step, Jeffrey M. Calvert, Robert A. Schetty, James G. Shelnut, Mark Lefebvre, Martin W. Bayes, Donald E. Storjohann
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Publication number: 20010052467Abstract: The present invention relates to a method and apparatus of fabricating electromagnetic coil vanes. The method involves photolithographically exposing high resolution, dense wire patterns in a flash coat of copper, on both sides of a ceramic vane substrate. The substrate can be pre-drilled with a through hole to connect the two copper coil patterns. Additional copper is then deposited on both high resolution patterns and in the through hole by plating until the desired thickness is obtained. A firing operation is then performed that eutectically bonds the copper to the ceramic.Type: ApplicationFiled: December 23, 1999Publication date: December 20, 2001Inventor: DAVID J. PINCKNEY
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Publication number: 20010050100Abstract: A Cu plated ceramic substrate is used in a semiconductor. On a ceramic substrate layer, a thin-film Cr layer is put, and a thin-firm Au layer is put on the Cr layer. The Au layer is plated with Cu. By providing the Au and Cr layers between the ceramic plate and Cu layer, adhesibility is increased. A Pertier element which includes the Cu plated ceramic layer is employed in a semiconductor to absorb and generate heat efficiently.Type: ApplicationFiled: April 11, 2001Publication date: December 13, 2001Inventors: Iwao Numakura, Noriaki Tsukada
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Patent number: 6328871Abstract: The invention generally provides a method for preparing a surface for electrochemical deposition comprising forming a high conductance barrier layer on the surface and depositing a seed layer over the high conductance barrier layer. Another aspect of the invention provides a method for filling a structure on a substrate, comprising depositing a high conductance barrier layer on one or more surfaces of the structure, depositing a seed layer over the barrier layer, and electrochemically depositing a metal to fill the structure.Type: GrantFiled: August 16, 1999Date of Patent: December 11, 2001Assignee: Applied Materials, Inc.Inventors: Peijun Ding, Tony Chiang, Tse-Yong Yao, Barry Chin
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Publication number: 20010042689Abstract: This invention employs a novel approach to the copper metallization of a workpiece, such as a semiconductor workpiece. In accordance with the invention, an alkaline electrolytic copper bath is used to electroplate copper onto a seed layer, electroplate copper directly onto a barrier layer material, or enhance an ultra-thin copper seed layer which has been deposited on the barrier layer using a deposition process such as PVD. The resulting copper layer provides an excellent conformal copper coating that fills trenches, vias, and other microstructures in the workpiece. When used for seed layer enhancement, the resulting copper seed layer provide an excellent conformal copper coating that allows the microstructures to be filled with a copper layer having good uniformity using electrochemical deposition techniques. Further, copper layers that are electroplated in the disclosed manner exhibit low sheet resistance and are readily annealed at low temperatures.Type: ApplicationFiled: June 20, 2001Publication date: November 22, 2001Applicant: Semitool, Inc.Inventor: Linlin Chen
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Publication number: 20010040264Abstract: A method of forming a multi-layer structure over an insulating layer comprises the steps of: selectively depositing a barrier layer on a predetermined region of an insulating layer by use of a first deposition mask; selectively depositing a metal seed layer made of a metal which is different in substance from the barrier layer by use of a second deposition mask, so that the metal seed layer extends not only on an entire surface of the barrier layer but also a peripheral region positioned outside the predetermined region of the insulating layer; and forming a metal plating layer made of the metal as the seed layer, so that the metal layer is adhered on the metal seed layer whereby the metal plating layer is separated from the barrier layer and also from the insulating layer.Type: ApplicationFiled: July 31, 2001Publication date: November 15, 2001Inventor: Nobukazu Ito
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Patent number: 6306457Abstract: A coating system and a method for its manufacture are provided. An electrically conductive base coat and a porous overcoat lying over the base coat are arranged on a ceramic substrate. At least one additional deposited layer is arranged on the base coat in such a way that the additional layer is formed in the pores of the porous overcoat adjacent to the base coat. The additional layer is deposited either by currentless or electrolytic deposition. For electrolytic deposition of the additional layer, the ceramic substrate sintered with the base coat and the overcoat is submerged in an electrolytic bath and the base coat is connected as a cathode. The currentless deposition takes place from a solution of the metal to be deposited with the addition of a reducing agent.Type: GrantFiled: July 23, 1999Date of Patent: October 23, 2001Assignee: Robert Bosch GmbHInventors: Jens Stefan Schneider, Frank Stanglmeier, Bernd Schumann
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Publication number: 20010027922Abstract: A composite material includes a structural carrier layer and a relatively thin metal foil layer separated by a release layer. The release layer, that may be an admixture of a metal such as nickel or chromium and a non-metal such as chromium oxide, nickel oxide, chromium phosphate or nickel phosphate, provides a peel strength for the metal foil layer from the carrier strip that is typically on the order of 0.1 pound per inch to 2 pounds per inch. This provides sufficient adhesion to prevent premature separation of the metal foil layer from the carrier layer, but easy removal of the carrier layer when desired. Typically, the metal foil layer is subsequently bonded to a dielectric and the carrier layer then removed. The metal foil layer is then imaged into circuit features in the manufacture of printed circuit boards and flexible circuits.Type: ApplicationFiled: April 26, 2001Publication date: October 11, 2001Inventors: Szuchain Chen, Julius Fister, Andrew Vacco, Nina Yukov, A. James Brock
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Publication number: 20010014406Abstract: An object of the invention is to provide a surface-treated copper foil capable of consistently attaining a percent loss in resistance against hydrochloric acid degradation of 10% or less as measured on a copper pattern prepared from the copper foil and having a line width of 0.2 mm, by bringing out the maximum effect of the silane coupling agent employed in copper foil coated with an anti-corrosive layer formed of a zinc-copper-nickel ternary alloy. Another object is to impart excellent moisture resistance to the surface-treated copper foil.Type: ApplicationFiled: January 26, 2001Publication date: August 16, 2001Applicant: Mitsui Mining & Smelting Co., Ltd.Inventors: Masakazu Mitsuhashi, Takashi Kataoka, Naotomi Takahashi
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Publication number: 20010014408Abstract: An object of the invention is to provide a surface-treated copper foil capable of consistently attaining a percent loss in peel strength in resistance against hydrochloric acid degradation of 10% or less as measured on a copper pattern prepared from the copper foil and having a line width of 0.2 mm, by bringing out the maximum effect of the silane coupling agent employed in copper foil coated with an anti-corrosive layer formed of a zinc-copper-tin ternary alloy. Another object is to impart excellent moisture resistance and heat resistance to the surface-treated copper foil.Type: ApplicationFiled: January 26, 2001Publication date: August 16, 2001Applicant: Mitsui Mining & Smelting Co. Ltd.Inventors: Masakazu Mitsuhashi, Takashi Kataoka, Naotomi Takahashi
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Patent number: 6248184Abstract: A process for sealing the surface coating formed by anodizing an aluminum or aluminum alloy substrate (for example, aerospace, commercial, and architectural products), the process including the steps of: (a) providing an aluminum or aluminum alloy substrate with a surface coating formed thereon by anodizing the aluminum or aluminum alloy substrate; (b) providing a sealing solution comprising a dilute solution of a rare earth metal salt selected from the group consisting of cerium salts and yttrium salts; and (c) contacting the substrate with the sealing solution for a sufficient amount of time to seal the surface coating on the substrate. Also disclosed is a chemical sealing solution for sealing the surface coating formed by anodizing an aluminum or aluminum alloy substrate, the solution being a dilute solution of a rare earth metal salt selected from the group consisting of cerium salts and yttrium salts.Type: GrantFiled: May 11, 1998Date of Patent: June 19, 2001Assignees: The Boeing Company, University of Southern CaliforniaInventors: Dennis L. Dull, Florian B. Mansfeld
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Patent number: 6207035Abstract: A method for manufacturing a metal composite strip for the production of electrical contact components. A film made of tin or a tin alloy is first applied onto an initial material made of an electrically conductive base material. A film of silver is then deposited thereonto. Copper or a copper alloy is preferably used as the base material. The tin film can be applied in the molten state, and the silver film by electroplating. Furthermore, both the tin film and the silver film can be deposited by electroplating. A further alternative provides for manufacturing the tin film in the molten state and the silver film by cathodic sputtering. The diffusion operations which occur in the coating result in a homogeneous film of a tin-silver alloy. This formation can be assisted by way of a heat treatment of the composite strip.Type: GrantFiled: November 20, 1998Date of Patent: March 27, 2001Assignee: Stolberger Metallwerke GmbH & Co. KGInventors: Udo Adler, Klaus Schleicher
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Patent number: 6197181Abstract: A process for applying a metallization interconnect structure to a semiconductor workpiece having a barrier layer deposited on a surface thereof is set forth. The process includes the forming of an ultra-thin metal seed layer on the barrier layer. The ultra-thin seed layer having a thickness of less than or equal to about 500 Angstroms. The ultra-thin seed layer is then enhanced by depositing additional metal thereon to provide an enhanced seed layer. The enhanced seed layer has a thickness at all points on sidewalls of substantially all recessed features distributed within the workpiece that is equal to or greater than about 10% of the nominal seed layer thickness over an exteriorly disposed surface of the workpiece.Type: GrantFiled: March 20, 1998Date of Patent: March 6, 2001Assignee: Semitool, Inc.Inventor: LinLin Chen
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Patent number: 6126806Abstract: A process and structure for enhancing electromigration resistance within a copper film using impurity lamination and other additives to form intermetallic compounds to suppress metal grain boundary growth and metal surface mobility of a composite copper film. The present invention provides an alloy seed layer and laminated impurities to incorporate indium, tin, titanium, their compounds with oxygen, and their complexes with oxygen, carbon, and sulfur into other films. The intermetallics form and segregate to grain boundaries during an annealing process to reduce copper atom mobility. A further aspect of the present invention is the use of high-temperature, inter-diffusion of additives included in an alloy seed layer to form a barrier layer by combining with materials otherwise unsuitable for barrier material functions.Type: GrantFiled: December 2, 1998Date of Patent: October 3, 2000Assignee: International Business Machines CorporationInventor: Cyprian E. Uzoh
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Patent number: 6123825Abstract: An electromigration-resistant copper film structure and the process for forming the structure. The film structure contains a high impurity content, is resistant to grain growth, and possesses superior metallurgical, thermo-mechanical, and electrical properties. The process comprises the steps of: (a) providing a seed layer at least indirectly on a substrate, the seed layer having an exposed surface; (b) immersing the substrate in a plating solution; (c) electrodepositing a copper-containing film on the exposed surface of the seed layer, the copper-containing film having a first surface; (d) maintaining the substrate in an immersed state within the plating solution; (e) electrodepositing a further copper-containing film from the plating solution onto the first surface; (f) removing the substrate from the plating solution; and (g) drying the substrate.Type: GrantFiled: December 2, 1998Date of Patent: September 26, 2000Assignee: International Business Machines CorporationInventors: Cyprian E. Uzoh, Steven H. Boettcher, Patrick W. DeHaven, Christopher C. Parks, Andrew H. Simon
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Patent number: 6120670Abstract: There is provided a method of fabricating a multi-layered printed wiring board, including the steps of (a) forming a multi-layered substrate with a hole which will make a blind via-hole, (b) plating the multi-layered substrate, (c) forming an internal layer circuit pattern and an external layer circuit pattern, (d) laying one multi-layered substrate on another, (e) forming a product of the step (d) with a through-hole, (f) covering surfaces of a product of the step (e) including an inner wall surface of the through-hole with an electrically conductive film, (g) forming a resist in an area other than the through-hole, (h) plating the inner wall surface of the through-hole, (i) removing the resist, and (j) removing the electrically conductive film formed on the surfaces of the product of the step (e).Type: GrantFiled: January 26, 1998Date of Patent: September 19, 2000Assignee: NEC CorporationInventor: Shigeki Nakajima
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Patent number: 6086743Abstract: In one embodiment, the present invention relates to a method of treating metal foil including sequentially contacting the metal foil with a metal foil oxidizer solution containing water and at least about 7 ppm dissolved oxygen, contacting the metal foil with a chromium containing electrolytic bath and electrolyzing the bath, wherein the bath contains about 0.1 to about 5 g/l of a chromium compound, and contacting the metal foil with a silane solution containing from about 0.1 to about 10% v/v of a silane compound.Type: GrantFiled: July 30, 1998Date of Patent: July 11, 2000Assignee: Gould Electronics, Inc.Inventors: Thomas J. Ameen, Stacy A. Riley
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Patent number: 6048445Abstract: The invention relates to a method of forming a metal line. A photoresist layer is formed on a substrate and patterned so that a metal part on the substrate is exposed. A metal seed layer is then deposited over the photoresist layer utilizing a directional deposition technique. A portion of the metal seed layer is then removed. A metal plating is then formed on the metal seed layer utilizing a technique selected from the group consisting of electroplating and electroless plating. The photoresist layer is then removed.Type: GrantFiled: March 24, 1998Date of Patent: April 11, 2000Assignee: Intel CorporationInventor: Ruth A. Brain
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Patent number: 6039859Abstract: The invention relates to a conductive dispersions used for diverse purposes such a base for electroplating nonconductors. The dispersion are characterized by use of a stabilizing quantity of a stabilizer having repeating alylkene oxide groups and a hydrophilic--lipophilic balance in excess of 12. It has been found that the stabilizers utilized in the subject compositions does result in a significant loss of conductivity in coatings formed from the dispersion.Type: GrantFiled: May 20, 1998Date of Patent: March 21, 2000Assignee: Shipley Company, L.L.C.Inventors: Wade Sonnenberg, Patrick J. Houle, Thong B. Luong, James G. Shelnut, Gordon Fisher
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Patent number: 6036835Abstract: A microetch composition for a circuit board containing sulfuric acid in combination with a carboxylic acid having 2 to 6 carbon atoms, wherein the volume of the carboxylic acid is preferably greater than the amount of sulfuric acid. The method discloses the contacting of a electrically conductive polymer with the microetch composition disclosed above to expose copper underlying the electrically conductive polymer.Type: GrantFiled: September 24, 1997Date of Patent: March 14, 2000Assignee: Shipley Company, L.L.C.Inventors: Wade Sonnenberg, John J. Bladon, David Oglesby, Jeffrey P. Burress
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Patent number: 6036836Abstract: A process to create metallic stand-offs or studs on a printed circuit board (PCB). The process allows to obtain studs constituted by three successive layers of metal (Cu1, Cu2 and Cu3 or Ni) of which at least the two first layers are made of copper. The height of the so-created stand-off is sufficient to use it in the flip chip technology to assemble chips to a printed circuit board. The present process is implemented according either to the electro-plating (galvano-plating) or to the electrochemical-plating technique.Type: GrantFiled: December 19, 1997Date of Patent: March 14, 2000Inventors: Joris Antonia Franciscus Peeters, Louis Joseph Vandam, Koenraad Juliaan Georges Allaert, Ann Marie Ackaert, Andre Michel Van Calster, Maria Eugenie Andre Vereeken, Suixin Zhang, Johan De Baets, Bart Leo Alfons Maurice Vandevelde
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Patent number: 5976342Abstract: A method for manufacturing an orifice plate that is built up in multiple layers and includes a complete axial through passage for a fluid. The orifice plate includes inlet openings, outlet openings, and at least one conduit lying between them. The layers or functional planes of the orifice plate are built up on one another by electroplating metal deposition (multilayer electroplating). Orifice plates manufactured in this manner are particularly suitable for use on injection valves in fuel injection systems, in paint nozzles, inhalers, or inkjet printers, or in freeze-drying processes, for spraying or injecting fluids such as beverages.Type: GrantFiled: March 3, 1998Date of Patent: November 2, 1999Assignee: Robert Bosch GmbHInventors: Stefan Arndt, Dietmar Hahn, Heinz Fuchs, Gottfried Flik, Guenter Dantes, Gilbert Moersch, Detlef Nowak, Joerg Heyse, Beate Ader, Frank Schatz
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Patent number: 5961808Abstract: The present invention relates to an alloy film resistor containing mainly nickel and phosphorus having an excellent fuse function and a method for producing the alloy film resistor. After the conductivity is given to the surface of an electrical insulating substrate such as ceramics by sequentially performing an etching treatment, an activating treatment and an electroless plating treatment to the electrical insulating substrate, an alloy film containing mainly nickel and phosphorus is formed by not an electroless plating process but an electrolytic plating process. By adopting the electrolytic plating process, a film thickness of the formed alloy film of the middle part on the surface of the insulating substrate is thinner than that of the alloy film of the corner or ridge parts on the surface of the insulating substrate, and the thin part of the film thickness serves as a suitable fusing start part when applying an overload.Type: GrantFiled: November 6, 1998Date of Patent: October 5, 1999Assignee: Kiyokawa Mekki Kougyo Co., Ltd.Inventor: Tadashi Kiyokawa
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Patent number: 5948232Abstract: The present invention provides electronically conducting polymer films formed from formulations of pyrrole and an electron acceptor. The formulations may include photoinitiators, flexibilizers, solvents and the like. These formulations can be used to manufacture multichip modules on typical multichip module substrates, such as alumina, fiberglass epoxy, silicon and polyimide. The formulations and methods of the invention enable the formation of passive electronic circuit elements such as resistors, capacitors and inductors in multichip modules or printed wiring boards.Type: GrantFiled: June 23, 1997Date of Patent: September 7, 1999Assignee: Lynntech, Inc.Inventors: Oliver J. Murphy, G. Duncan Hitchens, Dalibor Hodko, Eric T. Clarke, David L. Miller, Donald L. Parker
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Patent number: 5944975Abstract: A method of fabricating an emitter plate 12 for use in a field emission device comprising the steps of providing an insulating substrate 18 and forming a first conductive layer 13 on the insulating substrate 18. This is followed by the steps of forming an insulating layer 20 on the first conductive layer 13 and forming a second conductive layer 22 on the insulating layer 20. Then, a plurality of apertures 34 are formed through the second conductive layer 22 and through the insulating layer 20. A lift-off layer 36 is then formed on the second conductive layer 22. The lift-off layer 36 is formed by a plating process wherein the plating bath has a pH between 2.25 and 4.5, and current densities of 1 to 2O mA/cm.sup.2. The method may further comprise depositing conductive material through the plurality of apertures 34 to form a microtip 14 in each of the plurality of apertures 34. The excess deposited conductive material 14' and the lift-off layer 36 are then removed from the second conductive layer 22.Type: GrantFiled: January 24, 1997Date of Patent: August 31, 1999Assignee: Texas Instruments IncorporatedInventors: Arthur M. Wilson, Chi-Cheong Shen, Saroja Ramamurthi
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Patent number: 5935407Abstract: A process is provided for producing an abrasive coating on a substrate surface by applying a bond coat by low pressure plasma spraying and anchoring to the bond coat abrasive particles by electroplating and embedding the particles into an oxidation resistant matrix by entrapment plating.Type: GrantFiled: November 6, 1997Date of Patent: August 10, 1999Assignee: Chromalloy Gas Turbine CorporationInventors: Krassimir P. Nenov, Richard Fenton, Joseph A. Fuggini, Peter Howard
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Patent number: 5895563Abstract: An iron immersion composition of matter is disclosed comprising a compound having a divalent or trivalent iron ion, a compound having a fluoride ion, and a compound having an acid hydrogen ion. A process for treating an aluminum substrate to improve the adhesion of metal layers to the substrate is also disclosed comprising contacting the substrate with the acidic iron immersion composition to produce an iron immersion coating on the alloy, and contacting the iron immersion coating with an etchant to substantially remove the coating and produce a microporous surface on the substrate.Type: GrantFiled: December 23, 1996Date of Patent: April 20, 1999Assignee: Atotech USA, Inc.Inventor: Yoshihisa Muranushi
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Patent number: 5879530Abstract: This self-supported, anisotropic conductive film has a partly annealed polymer layer (46) containing through holes, nail-shaped conductive elements (51) filling the through holes, having a central portion and ends, and the central portion of the nails is made from a hard material (52) and each end respectively of a first and a second meltable materials (44, 54).Type: GrantFiled: May 29, 1997Date of Patent: March 9, 1999Assignee: Commissariat a l'Energie AtomiqueInventor: Patrice Caillat
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Patent number: 5879531Abstract: Electrical conductors (2) embedding filaments (4) of a fabric (3), and substantially filling interstices (5) that coextend with the imbedded filaments (4), are fabricated by plating conductive material onto a surface (14) of a passivated cathode against which the fabric (3) is held. Resist material (19) conforms the conductive material to form an array of electrical conductors (2).Type: GrantFiled: September 27, 1996Date of Patent: March 9, 1999Assignee: The Whitaker CorporationInventors: George Robert Schmedding, Basil Daniel Washo
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Patent number: 5858198Abstract: A process for electroplating a metal clad substrate by coating the substrate with a coating of carbonaceous particles. The coating of particles is applied to the substrate from an aqueous dispersion and then the coating is saturated with an etchant for the metal cladding on the substrate to undercut the carbonaceous coating and facilitate its removal from areas where plating is undesired.Type: GrantFiled: September 8, 1997Date of Patent: January 12, 1999Assignee: Shipley Company, L.L.C.Inventors: Steven M. Florio, Jeffrey P. Burress, Carl J. Colangelo, Edward C. Couble, Mark J. Kapeckas
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Patent number: RE37765Abstract: Described herein is an improved process for electroplating a conductive metal layer to the surface of a nonconductive material comprising pretreating the material with a carbon black dispersion followed by a graphite dispersion before the electroplating step.Type: GrantFiled: February 22, 1999Date of Patent: June 25, 2002Assignee: MacDermid, IncorporatedInventors: Catherine M. Randolph, Barry F. Nelsen