Treating Electrolytic Or Nonelectrolytic Coating After It Is Formed Patents (Class 205/220)
-
Patent number: 7087315Abstract: A method for forming a plating film, comprising the steps of: applying a plating film onto an object to be plated at a first current density for a predetermined period in a plating bath having a cathode capable of varying current and an anode and; and maintaining the object to be plated at a second current density lower than the first current density. According to the present invention, it is possible to improve solderability of a plating film for conventional lead-free solder by a simple method, which allows the productivity to further enhanced, resulting in a plating film with reduced production costs.Type: GrantFiled: September 21, 2004Date of Patent: August 8, 2006Assignees: Sharp Kabushiki Kaisha, Kobe Leadmikk Co., Ltd.Inventors: Yoshihiko Matsuo, Ryukichi Ikeda, Kimihiko Yoshida, Fumio Okuda
-
Patent number: 7070687Abstract: Apparatus and method for treating a surface of a substrate for electrolytic or electroless plating of metals in integrated circuit manufacturing. In one embodiment the method includes forming a barrier layer on a substrate. A metal-seed layer is then formed on the barrier layer. The method continues by performing in situ surface treatment of the metal-seed layer to form a passivation layer on the metal-seed layer. In another embodiment of a method of this invention, a substrate is provided into an electroplating tool chamber. The substrate has a barrier layer formed thereon, a metal seed layer formed on the barrier layer and a passivation layer formed over the metal seed layer. The method continues by annealing the substrate in forming gas to reduce the passivation layer. A conductive material is deposited on the substrate using an electrolytic plating or electroless plating process.Type: GrantFiled: August 14, 2001Date of Patent: July 4, 2006Assignee: Intel CorporationInventors: Vinay B. Chikarmane, Chi-Hwa Tsang
-
Patent number: 7029597Abstract: A process for selectively etching a surface of an anodized aluminum article. A preferred process includes: providing an aluminum sheet or web including first and second sides having anodized finishes; etching the first side to improve the adhesion capabilities of that side but not etching the second side so that the second side retains its anodized finish. The anodized aluminum may be colored before etching, thus the second side retains its color after etching. In a more preferred embodiment, sodium hydroxide or phosphoric acid is used to etch the anodized aluminum. Optionally, the etching of the second side is prevented by administering gas or liquid over the second side, masking the second side with a protective film, or shielding the second side with a shield. Further, the gas or liquid administered over the second side may be controlled to increase or decrease the rate of etching on the first side.Type: GrantFiled: July 5, 2001Date of Patent: April 18, 2006Assignee: Lorin Industries, Inc.Inventors: Gregory S. Marczak, Rick A. Minner
-
Patent number: 7011738Abstract: The present invention relates to a method for activation of a cathode comprising at least a cathode substrate wherein the cathode is cleaned by means of an acid, the cleaned cathode is coated with at least one electrocatalytic coating solution, drying the coated cathode until it is at least substantially dry, and thereafter contacting the cathode with a solvent redissolving precipitated electrocatalytic salts or acids formed on the cathode, originating from the electrocatalytic solution, to form dissolved electrocatalytic metal ions on the cathode surface, so that said electrocatalytic metal ions can precipitate as metals on the cathode. The invention also comprises a cathode obtainable by the method and the use of an activated cathode in an electrolytic cell for producing chlorine and alkali hydroxide.Type: GrantFiled: June 25, 2001Date of Patent: March 14, 2006Assignee: Akzo Nobel N.V.Inventors: Lars-Erik Bergman, Erik Zimmerman, Tomas Widenfalk, Bernd Busse
-
Patent number: 7011737Abstract: An electrical resistive device, including: an array of titania nanotubes open at an outwardly-directed end formed by anodizing at least a portion of a titanium layer; a plurality of palladium (or other noble metal) clusters having been deposited atop the nanotube array; and the nanotube array mechanically supported by an integral support member. The array of titania nanotubes may include a dopant. An exposure of titania nanotube array to radiant energy emitted within a range of frequencies from visible to ultraviolet, in the presence of oxygen, removes a contaminant, if present. The titanium layer may be deposited atop the integral support; or the unique doped titanium layer can be produced, prior to the anodizing thereof, by depositing titanium along with dopant atop the integral support member by a co-deposition process. Also, supported: method(s) of producing the electrical resistive devices.Type: GrantFiled: April 2, 2004Date of Patent: March 14, 2006Assignee: The Penn State Research FoundationInventors: Oomman K. Varghese, Gopal Mor, Maggie Paulose, Craig A. Grimes
-
Patent number: 6989087Abstract: A method of forming a surface finish of trivalent chromium on metal or plastics substrates by electrodeposition from an aqueous plating solution of trivalent chromium ions in which the trivalent chromium is deposited on a layer of silver or silver alloy whereby the color and/or corrosion resistance of the trivalent chromium is comparable to surface finishes of hexavalent chromium. The invention avoids the health and safety risks associated with the electrodeposition of hexavalent chromium surface finishes.Type: GrantFiled: December 10, 2001Date of Patent: January 24, 2006Assignee: Kohler Mira Ltd.Inventors: Paul Averell William Lansdell, John Peter George Farr
-
Patent number: 6932896Abstract: Systems and methods to remove or lessen the size of metal particles that have formed on, and to limit the rate at which metal particles form or grow on, workpiece surface influencing devices used during electrodeposition are presented. According to an exemplary method, the workpiece surface influencing device is occasionally placed in contact with a conditioning substrate coated with an inert material, and the bias applied to the electrodeposition system is reversed. According to another exemplary method, the workpiece surface influencing device is conditioned using mechanical contact members, such as brushes, and conditioning of the workpiece surface influencing device occurs, for example, through physical brushing of the workpiece surface influencing device with the brushes. According to a further exemplary method, the workpiece surface influencing device is rotated in different direction during electrodeposition.Type: GrantFiled: October 17, 2001Date of Patent: August 23, 2005Assignee: Nutool, Inc.Inventors: Bulent M. Basol, Cyprian Uzoh, Homayoun Talieh
-
Patent number: 6905587Abstract: A method for enhancing the solderability of a metallic surface is disclosed where the metallic surface is plated with an immersion silver plate prior to soldering, which immersion silver plate is treated with an additive selected from the group consisting of fatty amines, fatty amides, quaternary salts, amphateric salts, resinous amines, resinous amides, fatty acids, resinous acids, ethoxylated derivatives of any of the foregoing, and mixtures of any of the foregoing. The immersion silver deposits created are resistant to electromigration.Type: GrantFiled: January 14, 2003Date of Patent: June 14, 2005Inventors: Ronald Redline, David Sawoska, Peter Kukanskis
-
Patent number: 6887367Abstract: The invention relates to a process which is suitable for applying a permanently adhering, stable, dirt and water repellent coating to metallic surfaces, specifically chromium surfaces, specifically sanitary and kitchen fixtures, and also to the components coated in this manner. The process is based on first chemically activating the surface and then coating it by means of a sol.Type: GrantFiled: July 10, 2002Date of Patent: May 3, 2005Assignees: Fraunhofer-Gesellschaft zur Forderung der Angewandten Forschung E.V., FEW Chemicals GmbHInventors: Siegfried Berg, Thomas Bolch, Friedrich Auer
-
Patent number: 6884334Abstract: The present invention relates to a containment chamber that is used for carrying out multiple processing steps such as depositing on, polishing, etching, modifying, rinsing, cleaning, and drying a surface on the workpiece. In one example of the present invention, the chamber is used to electro chemically mechanically deposit a conductive material on a semiconductor wafer. The same containment chamber can then be used to rinse and clean the same wafer. As a result, the present invention eliminates the need for separate processing stations for depositing the conductive material and cleaning the wafer. Thus, with the present invention, costs and physical space are reduced while providing an efficient apparatus and method for carrying out multiple processes on the wafer surface using a containment chamber.Type: GrantFiled: December 28, 2001Date of Patent: April 26, 2005Assignee: ASM NuTool, Inc.Inventors: Konstantin Volodarsky, Boguslaw A. Nigorski, Rimma Volodarsky, Douglas W. Young, Cyprian Uzoh, Homayoun Talieh
-
Patent number: 6869516Abstract: A method for cleaning the electrical contact areas or substrate contact areas of an electrochemical plating contact ring is provided. Embodiments of the method include positioning a substrate on a substrate support member having one or more electrical contacts, chemically plating a metal layer on at least a portion of a surface of the substrate, removing the processed substrate from the support member, and cleaning the one or more electrical contacts with a vapor mixture comprising an alcohol. In another aspect, the method includes spraying the vapor mixture on the electrical contacts while rotating the substrate support member.Type: GrantFiled: October 18, 2002Date of Patent: March 22, 2005Assignee: Applied Materials, Inc.Inventors: Dmitry Lubomirsky, Michael X. Yang, Girish A. Dixit, Vincent E. Burkhart, Allen L. D'Ambra, Yeuk-Fai Edwin Mok, Harald Herchen
-
Patent number: 6863796Abstract: A method for cleaning an electrodeposition surface following an electroplating process including providing a process surface including electro-chemically deposited metal following an electrodeposition process; and, cleaning the process surface with a sulfuric acidic cleaning solution to remove electrodeposited metal particles according to at least one of an immersion and spraying process the spraying process including simultaneously rotating the process surface.Type: GrantFiled: July 2, 2002Date of Patent: March 8, 2005Assignee: Taiwan Semiconductor Manufacturing Co., LtdInventors: Chia-Liang Chueh, Volume Chien, Shih-Ming Wang
-
Patent number: 6827835Abstract: A method for electroplated metal annealing process. First, a semiconductor structure is provided, wherein the semiconductor structure has a plurality of semiconductor components, such as a gate electrode, a source region and a drain region, and a field oxide region. Second, a dielectric layer is formed over the semiconductor structure, and a via which exposes a part of the semiconductor structure is formed in the dielectric layer by the use of conventional lithographic and etching processes and an electroplated metal layer is formed over the dielectric layer; meanwhile, the via is filled with the electroplated metal layer. The electroplated metal layer is then annealed by a NH3 plasma process performed by plasma enhanced chemical vapor deposition (PECVD).Type: GrantFiled: March 26, 2002Date of Patent: December 7, 2004Assignee: United Microelectronics Corp.Inventors: Neng-Hui Yang, Kuo Feng Huang, Tsung-Tang Hsieh
-
Patent number: 6825512Abstract: An active part of a sensor is formed, for example, by micro-machined silicon wafers bearing electronic elements, electrical conductors, connection pads, and pins. The pads are electrically connected to the pin ends by conductive elements. Then the wafer and the pin ends are plunged into an electrolytic bath to make an electrolytic deposit of conductive metal on the pin ends, the pads, and the conductive elements that connect them. Finally, this metal is oxidized or nitrized to form an insulating coat on the pin ends, the pads, and the conductive elements that connect them. Such a sensor may find particular application as a sensor designed to work in harsh environments.Type: GrantFiled: April 8, 2002Date of Patent: November 30, 2004Assignee: ThalesInventors: Bertrand Leverrier, Marie-Dominique Bruni-Marchionni
-
Patent number: 6814849Abstract: A porous silicon structure is stabilized by anodically oxidizing the structure and then subjecting it to chemical functionalization to protect non-oxidized surface regions, preferably in the presence of 1-decene under thermal conditions. This process creates a protective organic monolayer on the surface of the structure, rendering it highly stable.Type: GrantFiled: December 10, 2001Date of Patent: November 9, 2004Assignee: National Research CouncilInventors: David John Lockwood, Rabah Boukherroub, Danial D. M. Wayner, Nobuyoshi Koshida
-
Patent number: 6808617Abstract: A polishing method and polishing apparatus able to easily flatten an initial unevenness with an excellent efficiency of removal of excess copper film and suppress damage to a lower interlayer insulation film, and a plating method and plating apparatus able to deposit a flat copper film. The polishing method comprises the steps of measuring thickness equivalent data of a film on a wafer, making a cathode member smaller than the surface face a region thereof, interposing an electrolytic solution between the surface and the cathode member, applying a voltage using the cathode member as a cathode and the film an anode, performing electrolytic polishing by electrolytic elution or anodic oxidation and chelation and removal of a chelate film in the same region preferentially from projecting portions of the film until removing the target amount of film obtained from the thickness equivalent data, and repeating steps of moving the cathode member to another region to flattening the regions over the entire surface.Type: GrantFiled: September 19, 2001Date of Patent: October 26, 2004Assignee: Sony CorporationInventors: Shuzo Sato, Yuji Segawa, Akira Yoshio, Takeshi Nogami
-
Patent number: 6805785Abstract: The following steps are conducted: preparing a metal salt carried-substrate A by soaking a sintered nickel substrate in an acidic solution containing cobalt ions and at least one metal ions of magnesium ions, iron ions and manganese ions, and drying thus soaked substrate; preparing a hydroxide carried-substrate B by soaking the substrate A in an alkaline solution to deposit cobalt hydroxide and at least one metal hydroxide of magnesium hydroxide, iron hydroxide and manganese hydroxide in the pores and on the surface of the substrate A; obtaining an oxide carried-substrate C by oxidizing the cobalt hydroxide to produce cobalt oxide having a mean cobalt valence of over 2; and obtaining an active material carried-substrate D by soaking the substrate C in a solution containing nickel nitrate dissolved therein, drying thus soaked substrate C, and then soaking thus dried substrate C in an alkaline solution, to fill the active material in the substrate C.Type: GrantFiled: July 26, 2002Date of Patent: October 19, 2004Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Tetsuo Nanno, Yohei Hattori, Fumihiko Yoshii
-
Publication number: 20040200728Abstract: A method and apparatus for forming interconnects embedding a metal such as copper (Cu) into recesses for interconnects formed on the surface of a substrate such as a semiconductor substrate. The method includes providing a substrate having fine recesses formed in the surface, subjecting the surface of the substrate to plating in a plating liquid, and subjecting the plated film formed on the surface of the substrate to electrolytic etching in an etching liquid.Type: ApplicationFiled: May 4, 2004Publication date: October 14, 2004Inventors: Akihisa Hongo, Naoki Matsuda, Kanji Ohno, Ryoichi Kimizuka
-
Patent number: 6797144Abstract: A method for in-situ cleaning an electrodeposition surface following an electroplating process including providing a first electrode assembly and a second electrode assembly; applying a first current density across the first electrode assembly and the second electrode assembly for carrying out the electrodeposition process; carrying out the electrodeposition process to electrodeposit a metal onto an electrodeposition surface of the second electrode assembly; and, applying a second current density having a second polarity reversed with reference to the first polarity across the first electrode assembly and the second electrode assembly the second current density having a relatively lower current density compared to the first current density.Type: GrantFiled: May 8, 2002Date of Patent: September 28, 2004Assignee: Taiwan Semiconductor Manufacturing Co., LtdInventors: Hung-Wen Su, Shih-Wei Chou, Ching-Hua Hsieh, Shau-Lin Shue
-
Patent number: 6790336Abstract: A copper damascene process for a mechanically weak low k dielectric layer is described. Electropolishing is used to etch back the copper. A sacrificial conductive layer beneath the barrier layer assures complete planarization of the copper.Type: GrantFiled: June 19, 2002Date of Patent: September 14, 2004Assignee: Intel CorporationInventor: Tatyana Andryushchenko
-
Publication number: 20040168926Abstract: The present invention provides a method for forming a conductive film with uniform properties on a wafer surface that has features or cavities. During the process, the workpiece is rotated and laterally moved while an electrodeposition solution is delivered onto the wafer surface at a predetermined flow rate, and a potential difference is applied between the workpiece surface and the electrode. The workpiece is rotated about an axis at predetermined revolutions per minute so that an edge region of the workpiece has a first predetermined linear velocity due to the rotation. The workpiece has a second predetermined linear velocity due to the lateral motion. The second predetermined velocity may be larger than the first predetermined velocity. Further, the wafer may not be rotated.Type: ApplicationFiled: December 22, 2003Publication date: September 2, 2004Inventors: Bulent M. Basol, Homayoun Talieh
-
Patent number: 6777108Abstract: To control peel strength at an organic release interface between a carrier foil and a copper-microparticle layer which constitute an electrodeposited copper foil with carrier. In the present invention, (1) a barrier copper layer is formed on the release interface layer and copper microparticles are formed on the barrier layer; (2) the anti-corrosion treatment is carried out by use of a plating bath containing a single metallic component or a plurality of metallic components for forming an alloy, the plating bath(s) having a deposition potential less negative than −900 mV (vs. AgCl/Ag reference electrode); and (3) methods (1) and (2) are combined.Type: GrantFiled: May 18, 2001Date of Patent: August 17, 2004Assignee: Mitsui Mining & Smelting Co., Ltd.Inventors: Shin-ichi Obata, Makoto Dobashi
-
Patent number: 6770184Abstract: The present invention provides a solder plating system with automatic monitoring of wash fluid pressure. The system automatically activates an alarm and/or initiates shutdown of a solder plating machine when the pressure reading indicates a failure of the wash fluid supply. The system thereby reduces the number of parts that are affected by failures in the wash fluid supply system. In some cases, problems with the wash fluid supply are detected before any parts are affected.Type: GrantFiled: February 13, 2001Date of Patent: August 3, 2004Assignee: Advanced Micro Devices, Inc.Inventors: Watcharin Pinlam, Chalor Moogdaharn, Youthachai Bupparit
-
Publication number: 20040144654Abstract: The present invention enables one to easily and immediately distinguish between grades, dimensions and manufacturers of cemented carbide by color coding. This invention further provides for a semi-permanent coloration of the carbide and this coloration does not interfere with the brazing process. When the process disclosed here is applied to carbide parts, the coloration can be used as a means to distinguish between grades of carbide or to classify visually indistiguishable dimensional changes. In addition, the coloration can provide a record of the manufacturing origin of each individual carbide part.Type: ApplicationFiled: January 28, 2003Publication date: July 29, 2004Inventor: Fletcher Walls
-
Patent number: 6767445Abstract: The present invention is a process for manufacturing resistors integral with the printed circuit board by plating the resistors onto the insulative substrate. The invention uses a mask during the activation step so as to selectively activate only selected portions of the surface thus enabling smaller areas to be plated on the printed circuit board because no plating mask is used. The process of the instant invention produced printed circuit boards having greater uniformity and reliability as compared to the prior art.Type: GrantFiled: October 16, 2002Date of Patent: July 27, 2004Inventors: Peter Kukanskis, Frank Durso, David Sawoska
-
Publication number: 20040129575Abstract: A plating apparatus and a plating liquid removing method removes a plating liquid remaining on a substrate-contacting portion, or portions in its vicinity, of a substrate holding member. The plating apparatus comprises a head having a rotatable housing provided with a substrate holding member for holding a substrate, a plating process container, disposed below the head, for holding a plating liquid therein, and a plating liquid removing mechanism for removing plating liquid remaining on the substrate-contacting portion, or the portions in its vicinity, at an inner circumferential edge of the substrate holding member.Type: ApplicationFiled: December 22, 2003Publication date: July 8, 2004Inventors: Satoshi Sendai, Kenya Tomioka, Katsumi Tsuda
-
Patent number: 6758956Abstract: The invention relates to a method for darkening a superficial layer of a workpiece which contains zinc by anodic oxidation. The workpiece is oxidized in a soaking bath containing an aqueous solution comprised of a hydroxide and of a nitrate. The anodic oxidation may be carried out in an aqueous solution containing NH4NO3 or NaNO3, and having a pH value ranging from 8 to 14, at a dipping bath temperature (T) ranging from 15 to 45° C., and with a current density (i) ranging from 3×10−4 to 0.5 A/cm2. The workpiece is placed in the soaking bath at the beginning of the anodic oxidation after the voltage has already been applied.Type: GrantFiled: June 15, 2001Date of Patent: July 6, 2004Assignee: Ewald Dorken AGInventors: Thomas Kruse, Peter Meisterjahn
-
Patent number: 6755957Abstract: A method of plating for filling via holes, in which each via hole is formed in an insulation layer covering a substrate so as to expose, at its bottom, part of a conductor layer located on the substrate. A copper film is formed on the top surface of the insulation layer covering the substrate, and the side walls and bottoms of the respective via holes. A strike plating of copper is provided on the copper film, and the substrate is immersed in an aqueous solution containing a plating promoter to thereby deposit the plating promoter on the surface of the copper strike. The plating promoter is removed from the copper strike plating located on the top surface insulation layer while leaving the plating promoter on the side walls and bottoms of the respective via holes. The substrate is subsequently electroplated with copper to fill the via holes.Type: GrantFiled: January 30, 2001Date of Patent: June 29, 2004Assignee: Shinko Electric Industries Co., Ltd.Inventors: Kenji Nakamura, Masao Nakazawa
-
Patent number: 6749953Abstract: A zinc whiskerless galvanized product has a multi-layer rust prevention film that provides excellent rust prevention, self-repair ability, and coating adhesion. A manufacturing method provides a zinc whiskerless galvanized product having the multi-layer rust prevention film. The multi-layer rust prevention film can be provided without the use of chemicals injurious to the environment such as sexivalent chrome. The multi-layer rust prevention film can be applied to various electronic components including computer equipment, communication equipment, or the like.Type: GrantFiled: January 23, 2002Date of Patent: June 15, 2004Assignee: Sambix CorporationInventors: Akira Sawatari, Ryouichi Muroi, Takazumi Katano, Eiki Mizuno
-
Patent number: 6740222Abstract: The present invention provides a method of plating an electrical contact on an integrated circuit (IC) substrate manufactured from a rigid double-sided or multi-layered printed wiring board core with dielectric layers on both sides of the core. The method may include forming electrically connected plating layers on first and second opposing sides of a substrate and electroplating a contact layer over each of the plating layers using the plating layers. The method further includes removing a portion of the plating layers from the first and second opposing sides while leaving the plating layers under the contact layer.Type: GrantFiled: June 7, 2001Date of Patent: May 25, 2004Assignee: Agere Systems Inc.Inventor: Charles Cohn
-
Publication number: 20040074777Abstract: A method for cleaning the electrical contact areas or substrate contact areas of an electrochemical plating contact ring is provided. Embodiments of the method include positioning a substrate on a substrate support member having one or more electrical contacts, chemically plating a metal layer on at least a portion of a surface of the substrate, removing the processed substrate from the support member, and cleaning the one or more electrical contacts with a vapor mixture comprising an alcohol. In another aspect, the method includes spraying the vapor mixture on the electrical contacts while rotating the substrate support member.Type: ApplicationFiled: October 18, 2002Publication date: April 22, 2004Applicant: Applied Materials, Inc.Inventors: Dmitry Lubomirsky, Michael X. Yang, Girish A. Dixit, Vincent E. Burkhart, Allen L. D'Ambra, Yeuk-Fai Edwin Mok, Harald Herchen
-
Patent number: 6716334Abstract: A plating cell has an inner plating bath container for performing electroplating on a work piece (e.g., a wafer) submerged in a solution contained by the inner plating bath container. A reclaim inlet funnels any solution overflowing the inner plating bath container back into a reservoir container to be circulated back into the inner plating bath container. A waste channel is also provided having an inlet at a different height than the inlet of the reclaim channel. After electroplating, the wafer is lifted to a position and spun. While spinning, the wafer is thoroughly rinse with, for example, ultra pure water. The spin rate and height of the wafer determine whether the water and solution are reclaimed through the reclaim channel or disposed through the waste channel.Type: GrantFiled: April 9, 2001Date of Patent: April 6, 2004Assignee: Novellus Systems, IncInventors: Jonathan D. Reid, Steven W. Taatjes, Robert J. Contolini, Evan E. Patton
-
Patent number: 6709563Abstract: There is provided a copper-plating liquid free from an alkali metal and a cyanide which, when used in plating of a substrate having an outer seed layer and fine recesses of a high aspect ratio, can reinforce the thin portion of the seed layer and can embed copper completely into the depth of the fine recesses. The plating liquid contains divalent copper ions and a completing agent, and an optional pH adjusting agent.Type: GrantFiled: June 29, 2001Date of Patent: March 23, 2004Assignee: Ebara CorporationInventors: Mizuki Nagai, Shuichi Okuyama, Ryoichi Kimizuka, Takeshi Kobayashi
-
Patent number: 6706166Abstract: A method for improving an electrodeposited metal film uniformity and preventing metal deposition and peeling of deposited metal from an electrode during an electrodeposition and electropolishing process including providing a first anode electrode assembly and a semiconductor wafer plating surface disposed in an electrolyte bath including a plating metal for deposition onto the semiconductor wafer plating surface; providing at least one additional anode electrode assembly including the plating metal disposed peripheral to the first anode electrode assembly for selectively applying the cathodic electrical potential during an electropolishing process; and, periodically alternating between an electrodeposition process and electropolishing process with respect to the semiconductor wafer plating surface such that the plating metal is preferentially plated onto the at least one additional electrode assembly.Type: GrantFiled: May 6, 2002Date of Patent: March 16, 2004Assignee: Taiwan Semiconductor Manufacturing Co. Ltd.Inventors: Shih-Wei Chou, Ming-Hsing Tsai
-
Patent number: 6701613Abstract: In a method of manufacturing a multilayer circuit board, cable patterns in a plurality of cable layers can be precisely formed, and the cable layer are formed with higher density, with higher reliability. The multilayer circuit board comprises: a plurality of cable layers, each of which includes electric conductive sections; a plurality of first insulating layers, each of which encloses the electric conductive sections in each cable layer and fills spaces between the electric conductive sections; and post vias electrically connecting the electric conductive sections in one cable layer to those in another cable layer. Height of the electric conductive sections in each cable layer are equal to that of the first insulating layer enclosing those electric conductive sections.Type: GrantFiled: February 22, 2001Date of Patent: March 9, 2004Assignee: Fujitsu LimitedInventor: Kenji Iida
-
Publication number: 20040040859Abstract: A method of forming a surface finish of trivalent chromium on metal or plastics substrates by electrodeposition from an aqueous plating solution of trivalent chromium ions in which the trivalent chromium is deposited on a layer of silver or silver alloy whereby the color and/or corrosion resistance of the trivalent chromium is comparable to surface finishes of hexavalent chromium. The invention avoids the health and safety risks associated with the electrodeposition of hexavalent chromium surface finishes.Type: ApplicationFiled: June 9, 2003Publication date: March 4, 2004Inventors: Paul Averell William Lansdell, John Peter Farr
-
Patent number: 6699380Abstract: Embodiments of the invention generally provide a substrate processing system and method. The substrate processing system generally includes two primary components. The first component is an interface section having at least one first substrate transfer robot positioned therein, and the second component is at least one processing module in communication with the interface section, the at least one processing module having a pretreatment and post treatment cell, a processing cell, at a second substrate transfer robot positioned therein. The substrate processing method generally includes transporting a dry substrate to a processing module via a dry interface. Once the substrate is positioned in the processing module, a robot transfers the substrate between a treatment cell and a processing cell contained within the processing module to complete a predetermined sequence of processing steps.Type: GrantFiled: October 18, 2002Date of Patent: March 2, 2004Assignee: Applied Materials Inc.Inventors: Guan-Shian Chen, Michael X. Yang
-
Publication number: 20040004004Abstract: A method for cleaning an electrodeposition surface following an electroplating process including providing a process surface including electro-chemically deposited metal following an electrodeposition process; and, cleaning the process surface with a sulfuric acidic cleaning solution to remove electrodeposited metal particles according to at least one of an immersion and spraying process the spraying process including simultaneously rotating the process surface.Type: ApplicationFiled: July 2, 2002Publication date: January 8, 2004Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chia-Liang Chueh, Volume Chien, Shih-Ming Wang
-
Patent number: 6649039Abstract: A process of surface treating an aluminum or aluminum alloy article includes the steps of: (1) forming an oxide layer on the aluminum or aluminum alloy article by anodizing; (2) sealing the oxide layer of the article; and (3) forming a protective film on the sealed oxide layer of the article. The process may further comprise a step of coloring the oxide layer of the aluminum or aluminum alloy article between the steps (1) and (2). The aluminum or aluminum alloy article is corrosion-resistant and resistant to damage by contact, by virtue of the protective film formed on the scaled oxide layer in the step (3). In addition, the protective film can also give the aluminum or aluminum alloy article a long-lasting attractive appearance by preventing a colored sealed oxide layer of the aluminum or aluminum alloy article from fading.Type: GrantFiled: December 29, 2001Date of Patent: November 18, 2003Assignee: Hon Hai Precision Ind. Co., Ltd.Inventors: Che-Yuan Hsu, Fu-Keng Yang, Wen-Shan Chien
-
Patent number: 6632344Abstract: The invention is directed to a process for electroplating a non-conducting surface such as through-hole walls within a printed circuit board substrate. The process comprises formation of a conductive oxide coating over a substrate, preferably by immersion of said substrate in an aqueous oxidative desmear solution for a time sufficient to form a coating containing conductive dielectric oxidation residue and then, in the absence of a step of forming an additional conductive coating over the residue coating or removing the coating, electroplating metal onto said surface by immersion of the substrate having the coating in an electroplating solution.Type: GrantFiled: March 24, 2000Date of Patent: October 14, 2003Inventors: Robert L. Goldberg, Michael Gulla
-
Patent number: 6632342Abstract: In a method of fabricating an array of microstructures, a substrate with an electrically-conductive portion is provided, an insulating mask layer is formed on the electrically-conductive portion of the substrate, a plurality of openings are formed in the insulating mask layer to expose the electrically-conductive portion, and a first plated or electrodeposited layer is deposited in the openings and on the insulating mask layer by electroplating or electrodeposition. A second plated layer is further formed on the first plated or electrodeposited layer and on the electrically-conductive portion by electroless plating to reduce a size distribution of microstructures over the array.Type: GrantFiled: March 24, 2000Date of Patent: October 14, 2003Assignee: Canon Kabushiki KaishaInventors: Takayuki Teshima, Takayuki Yagi, Yasuhiro Shimada, Takashi Ushijima
-
Patent number: 6632343Abstract: A method and apparatus for electrolytic plating of selected areas of printed circuit board traces is disclosed. The method is characterized by its elimination of the need for plating bus bars and plating contacts on the printed circuit board to facilitate a spot-plating process. In one embodiment, a printed circuit board substrate is provided which is at least partially conductive, such that a plating voltage may be applied to any one or more points on the substrate during a spot plating operation. In another embodiment, the substrate material is initially partially conductive, but following the spot-plating operation, is subjected to a curing treatment or the like to cause degeneration of the substrate's conductivity. Carbon-impregnated polyimide, partially-cured polyimide, FR4 or FR5, with appropriate contaminants introduced therein are contemplated as materials suitable for a printed circuit board substrate in accordance with the invention.Type: GrantFiled: August 30, 2000Date of Patent: October 14, 2003Assignee: Micron Technology, Inc.Inventors: Warren M. Farnworth, Kevin G. Duesman
-
Patent number: 6613603Abstract: A photovoltaic device is provided which comprises a back reflection layer, a zinc oxide layer and a semiconductor layer stacked in this order on a substrate, wherein the zinc oxide layer contains a carbohydrate. The content of the carbohydrate is preferably in the range of from 1 &mgr;g/cm3 to 100 mg/cm3. Thereby, the zinc oxide layer can be formed without abnormal growth to have a rough surface to achieve sufficient optical confinement effect, and the photovoltaic device is improved in the durability and the photoelectric conversion efficiency.Type: GrantFiled: July 21, 1998Date of Patent: September 2, 2003Assignee: Canon Kabushiki KaishaInventor: Masafumi Sano
-
Publication number: 20030159935Abstract: Local electrochemical deplating of alignment mark regions of semiconductor wafers is disclosed. A tank holds an electrolytic solution. A primary cathode submersed within the solution is at least partially insulated therefrom. An electrochemically metal plated semiconductor wafer submersed within the solution acts as an anode, and has alignment mark regions. Extension cathodes submersed within the electrolytic solution are each at least partially insulated, except for a part of a first end and a second end thereof. The first end part is closely positioned over a corresponding alignment mark region, whereas the second end is situated on a corresponding exposed part of the primary cathode. A power source has its positive terminal operatively coupled to the primary cathode and its negative terminal operatively coupled to the wafer. Current from the power source electrochemically deplates the metal substantially from the alignment mark regions, substantially exposing the alignment marks within these regions.Type: ApplicationFiled: February 23, 2002Publication date: August 28, 2003Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chen-Ming Huang, Sen-Shan Yang
-
Patent number: 6596150Abstract: Disclosed is a production method of an aluminum support for a lithographic printing plate, capable of stable and low-cost production of an aluminum support for a lithographic printing plate, the support being scarcely subject to generation of treatment unevenness called streaks or grainy unevenness ascribable to the different in the aluminum dissolving rate due to the difference in the orientation of the crystal grain. The aluminum support is produced by surface graining and then polishing an aluminum plate or by polishing an aluminum plate while etching it in an aqueous acid or alkali solution. The aluminum plate may be subjected to polishing and then to anodization or may be subjected to polishing, to surface graining, again to or not to polishing and then to anodization. A production method for producing a high-quality support for a lithographic printing plate, free of local unevenness is also disclosed.Type: GrantFiled: May 27, 1999Date of Patent: July 22, 2003Assignee: Fuji Photo Film Co., Ltd.Inventors: Atsuo Nishino, Yoshitaka Masuda, Hirokazu Sawada, Akio Uesugi, Masahiro Endo
-
Patent number: 6589414Abstract: Nitride layer formation includes a method wherein a material is electrodeposited on a substrate and converted, at least in part, to a layer comprising nitrogen and the electrodeposited material. The electrodepositing may occur substantially selective on a conductive portion of the substrate. Also, the converting may comprise exposing the electrodeposited material to a nitrogen-comprising plasma. Chromium nitride and chromium oxynitride are examples of nitrogen-comprising materials. Copper or gold wiring of an integrated circuit are examples of a substrate. The processing temperature during the electrodepositing and the converting may be selected not to exceed 500° C. The thickness and composition of the nitride layer may be effective to limit diffusion of the wiring through the nitride layer. A diffusion barrier forming method may include forming a patterned layer of integrated circuit copper wiring over a substrate.Type: GrantFiled: June 4, 2001Date of Patent: July 8, 2003Assignee: Micron Technology, Inc.Inventor: Rita J. Klein
-
Publication number: 20030116440Abstract: A method for rinsing a substrate held by a substrate holder in an electroplater includes positioning at least a first portion of the substrate holder and an electroplating bath in the electroplater relative to one another such that the substrate and the first portion of the substrate holder are removed from the electroplating bath. A retractable shutter in the electroplater is closed to where the closed retractable shutter is located between the first portion of the substrate holder and the electroplating bath as positioned. The substrate is rinsed with a solution wherein the closed retractable shutter prevents substantially all of the solution from entering into the electroplating bath.Type: ApplicationFiled: December 21, 2001Publication date: June 26, 2003Applicant: Texas Instruments IncorporatedInventors: Richard L. Guldi, Jiong-Ping Lu, David Gonzalez
-
Publication number: 20030116439Abstract: An advanced back-end-of-line (BEOL) integration scheme for semiconductor devices using very low-k dielectric materials is disclosed. The disclosed method for forming a metal interconnect structure in a semiconductor integrated circuit device comprises forming the metal interconnects using a through-mask plating (TMP) process, and encapsulating the interconnects with a barrier layer by selectively depositing a barrier layer material using an electroless liner plating process or by non-selectively depositing a blanket insulator diffusion barrier layer using PVD or CVD techniques.Type: ApplicationFiled: December 21, 2001Publication date: June 26, 2003Applicant: International Business Machines CorporationInventors: Soon-Chen Seo, Carlos J. Sambucetti, Xiaomeng Chen, Zheng Chen, Vincent McGahay, Daniel C. Edelstein
-
Publication number: 20030106801Abstract: A porous silicon structure is stabilized by anodically oxidizing the structure and then subjecting it to chemical functionalization to protect non-oxidized surface regions, preferably in the presence of 1-decene under thermal conditions. This process creates a protective organic monolayer on the surface of the structure, rendering it highly stable.Type: ApplicationFiled: December 10, 2001Publication date: June 12, 2003Applicant: National Research CouncilInventors: David John Lockwood, Rabah Boukherroub, Danial D.M. Wayner, Nobuyoshi Koshida
-
Publication number: 20030102227Abstract: A method is provided for forming an inorganic layer on a surface of a copper material, made of copper or of a copper-based alloy: a browning anodic oxidation process is performed on the copper material in an electrolytic bath containing only an alkali (for example NaOH) at a specified concentration in aqueous solution, under controlled condition of temperature and anodic current density and for a period of time suitable to form a continuous layer basically formed of copper (I) oxide (Cu2O): layers highly adherent to the copper substrate and having good mechanical behaviour are produced: different colors and optical properties may be obtained by controlling the process conditions so as to influence the crystalline form of the Cu2O layers.Type: ApplicationFiled: March 27, 2002Publication date: June 5, 2003Applicant: EUROPA METALLI S.p.A.Inventors: Alberto Billi, Stephan Hoveling, Stefan Priggemeyer