Filling Or Coating Of Groove Or Through Hole With A Conductor To Form An Electrical Interconnection Patents (Class 216/18)
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Patent number: 8778194Abstract: A method is described for manufacturing a component having a through-connection. The method includes providing a substrate; forming a trench structure in the substrate, a substrate area which is completely surrounded by the trench structure being produced; forming a closing layer for closing off the trench structure, a cavity girded by the closing layer being formed in the area of the trench structure; removing substrate material from the substrate area surrounded by the closed-off trench structure; and at least partially filling the substrate area surrounded by the closed-off trench structure with a metallic material. A component having a through-connection is also described.Type: GrantFiled: January 18, 2013Date of Patent: July 15, 2014Assignee: Robert Bosch GmbHInventors: Jochen Reinmuth, Yvonne Bergmann
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Publication number: 20140190932Abstract: A mechanism is provided for fabricating nanochannels for a nanodevice. Insulating film is deposited on a substrate. A nanowire is patterned on the film. Insulating material is deposited on the nanowire and film. A first circular hole is formed in the insulating material as an inlet, over a first tip of the nanowire to expose the first tip. A second circular hole is formed as an outlet, over a second tip of the nanowire opposite the first tip to expose the second tip. A nanochannel connects the first and second holes by etching away the nanowire via an etchant in the first and the second holes. A first reservoir is attached over the first hole in connection with the nanochannel at a previous location of the first tip. A second reservoir is attached over the second hole in connection with the nanochannel at a previous location of the second tip.Type: ApplicationFiled: January 10, 2013Publication date: July 10, 2014Applicant: International Business Machines CorporationInventors: Ali Afzali-Ardakani, Binquan Luan, Gustavo A. Stolovitzky, Chao Wang, Deqiang Wang
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Publication number: 20140175047Abstract: A method of manufacturing a printed circuit board, according to one embodiment, includes forming a circuit pattern and a via pad, which is disposed by being spaced apart from the circuit pattern and has concavo-convex patterns, on a first insulating layer; forming a second insulating layer on the circuit pattern and the via pad having the concavo-convex patterns formed thereon; forming a via hole by etching a portion of the second insulating layer on the via pad; and forming a copper foil layer on the second insulating layer having the via hole formed therein.Type: ApplicationFiled: February 27, 2014Publication date: June 26, 2014Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Watanabe RYOICHI, Se Won Park
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Publication number: 20140174809Abstract: Disclosed herein is a circuit board including: a core layer including a via hole; a metal film covering an inner wall of the via hole; a circuit pattern connected to the metal film on the core layer; and a plug surrounded by the metal film in the via hole and having a thickness thinner than a thickness of the core layer.Type: ApplicationFiled: March 14, 2013Publication date: June 26, 2014Applicant: Samsung Electro-Mechanics Co., Ltd.Inventors: Seung Wook PARK, Jae Kul Lee, Jin Gu Kim, Chang Bae Lee
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Publication number: 20140176280Abstract: Disclosed herein is a common mode filter, inlcuding: an external magnetic layer; an insulating layer formed on the external magnetic layer and having coil electrodes therein; a protecting layer formed on the insulating layer; an internal magnetic layer formed inside an opening part formed in one surface of the protecting layer; and external electrode terminals passing through the protecting layer and connected with end portions of the coil electrodes, so that there can be provided a common mode filter having excellent durability, moisture resistance, and heat resistance.Type: ApplicationFiled: December 23, 2013Publication date: June 26, 2014Applicant: Samsung Electro-Mechanics Co., Ltd.Inventors: Jong Yun LEE, Sung Kwon WI
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Publication number: 20140175046Abstract: In a Cu wiring forming method for forming a Cu wiring by filling Cu in a recess which is formed in a substrate in a predetermined pattern, a barrier film formed of a TaAlN film is formed at least on the surface of the recess by thermal ALD or thermal CVD. Then a Cu film is formed to fill the recess with the Cu film. Further, the Cu wiring is formed in the recess by polishing the entire surface of the substrate by CMP.Type: ApplicationFiled: December 20, 2013Publication date: June 26, 2014Applicant: Tokyo Electron LimitedInventors: Tadahiro ISHIZAKA, Toshio HASEGAWA
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Patent number: 8756804Abstract: Disclosed is a printed circuit board, including a base member, an insulating layer formed on each of both surfaces of the base member so that the surfaces of the base member are flattened, a circuit layer formed on the insulating layer, and a via for connecting the circuit layer formed on one surface of the base member with the circuit layer formed on the other surface of the base member. A method of manufacturing the printed circuit board is also provided.Type: GrantFiled: August 19, 2011Date of Patent: June 24, 2014Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Hyung Jin Jeon, Young Do Kweon, Seung Wook Park, Seon Hee Moon
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Publication number: 20140166345Abstract: A transparent conducting glass includes a glass substrate and a conducting glue. The glass substrate includes a first surface and a second surface opposite to the first surface, and defines a number of strip recesses on the first surface according to a circuit route. The conducting glue is infilled into the strip recesses and forms a circuit for transmitting signals.Type: ApplicationFiled: February 20, 2013Publication date: June 19, 2014Applicant: HON HAI PRECISION INDUSTRY CO., LTD.Inventor: SEI-PING LOUH
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Publication number: 20140157887Abstract: The invention relates to a miniaturised sensor having a heating element, and to an associated production method. The sensor includes a substrate, a cavity and a heat-insulating structure suspended above the cavity by areas connecting to the substrate. The heat-insulating structure includes at least two bridges extending above the cavity, the heating element being supported by said bridges, extending transversely thereto.Type: ApplicationFiled: July 12, 2012Publication date: June 12, 2014Applicants: ECOLE CENTRALE DE LILLE, CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUEInventors: Romain Viard, Abdelkrim Talbi, Philippe Jacques Pernod, Alain Merlen, Vladimir Preobrazhensky
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Patent number: 8734657Abstract: A method for making a liquid barrier includes forming a liquid barrier layer on a substrate, forming a mask layer on the liquid barrier layer such that part of the liquid barrier remains exposed, forming a contact layer on the exposed liquid barrier layer, and removing the mask layer to expose the part of the liquid barrier layer which was covered by the mask layer. A liquid wetting boundary is formed when the wettability on the liquid barrier surface area is less than the wettability of the contact surface area.Type: GrantFiled: February 19, 2010Date of Patent: May 27, 2014Assignee: R.S.M. Electron Power, Inc.Inventors: Ching Au, Krithika Kalyanasundaram
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Patent number: 8734656Abstract: A capacitor forming method includes forming an electrically conductive support material over a substrate, forming an opening through at least the support material to the substrate, and, after forming the opening, forming a capacitor structure contacting the substrate and the support material in the opening. The support material contains at least 25 at % carbon. Another capacitor forming method includes forming a support material over a substrate, forming an opening through at least the support material to the substrate, and, after forming the opening, forming a capacitor structure contacting the substrate and the support material in the opening. The support material contains at least 20 at % carbon. The support material has a thickness and the opening has an aspect ratio 20:1 or greater within the thickness of the support material.Type: GrantFiled: January 29, 2013Date of Patent: May 27, 2014Assignee: Micron Technology, Inc.Inventor: Mark Kiehlbauch
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Publication number: 20140138345Abstract: A method of forming a conductive pattern includes forming a first partition and a second partition which are spaced apart from each other on a substrate, the first and second partitions defining a trench. The method includes discharging ink into the trench to form ink droplets pinned in a boundary region of the first and second partitions. The method further includes the boundary region including a region between a top side and an outer side of the first and second partitions, the ink including conductive particles. The method includes performing drying and sintering processes to form the conductive pattern in the trench, the conductive pattern including the conductive particles.Type: ApplicationFiled: May 29, 2013Publication date: May 22, 2014Inventors: Jin-seok HONG, Young-ki HONG, Joong-hyuk KIM, Sung-gyu KANG, Seung-ho LEE
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Publication number: 20140138132Abstract: Disclosed herein are a printed circuit board and a manufacturing method thereof. In the manufacturing method of the printed circuit board according to the exemplary embodiment of the present invention, primary copper plating layers are first formed on each of upper and lower surface portions of a core layer in a symmetrical structure, an insulating layer is formed on the primary copper plating layer of the upper surface side, and a secondary copper plating layer is continuously formed on the primary copper plating layer of only the lower surface side. Therefore plating thicknesses required for the front side and the rear side in an asymmetric structure may be uniform to have no plating deviation and non-peeling of an insulating layer (a dry film) for a circuit protection is prevented to have no short defect, thereby making it possible to form a fine circuit pattern.Type: ApplicationFiled: October 3, 2013Publication date: May 22, 2014Applicant: Samsung Electro-Mechanics Co., Ltd.Inventor: John Su Kyon
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Publication number: 20140134404Abstract: This invention provides processing steps, methods and materials strategies for making patterns of structures for integrated electronic devices and systems. Processing methods of the present invention are capable of making micro- and nano-scale structures, such as Dual Damascene profiles, recessed features and interconnect structures, having non-uniform cross-sectional geometries useful for establishing electrical contact between device components of an electronic device. The present invention provides device fabrication methods and processing strategies using sub pixel-voting lithographic patterning of a single layer of photoresist useful for fabricating and integrating multilevel interconnect structures for high performance electronic or opto-electronic devices, particularly useful for Very Large Scale Integrated (VLSI) and Ultra large Scale Integrated (ULSI) devices.Type: ApplicationFiled: January 16, 2014Publication date: May 15, 2014Applicant: THE BOARD OF TRUSTEES OF THE UNIVERSITY OF ILLINOISInventors: Kanti JAIN, Uttam REDDY
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Patent number: 8721901Abstract: Embodiments disclosed include methods of processing substrates, including methods of forming conductive connections to substrates. In one embodiment, a method of processing a substrate includes forming a material to be etched over a first material of a substrate. The material to be etched and the first material are of different compositions. The material to be etched is etched in a dry etch chamber to expose the first material. After the etching, the first material is contacted with a non-oxygen-containing gas in situ within the dry etch chamber effective to form a second material physically contacting onto the first material. The second material comprises a component of the first material and a component of the gas. In one embodiment, the first material is contacted with a gas that may or may not include oxygen in situ within the dry etch chamber effective to form a conductive second material.Type: GrantFiled: October 5, 2007Date of Patent: May 13, 2014Assignee: Micron Technology, Inc.Inventors: Nishant Sinha, Gurtej S. Sandhu
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Publication number: 20140124475Abstract: The present invention relates to a method of manufacturing a printed circuit board. The method of manufacturing a printed circuit board including: preparing two copper clad laminates, each consisting of an insulating layer and copper foil layers laminated on upper and lower surfaces of the insulating layer; bonding the two copper clad laminates after disposing the lower copper foil layers of the copper clad laminates to face each other; processing a via hole passing through the upper copper foil layer and the insulating layer of each copper clad laminate; fill-plating a via electrode inside the via hole and forming a circuit layer on an outer layer of the copper clad laminate; separating the bonded copper clad laminates; and patterning the lower copper foil layer of the separated copper clad laminate is provided.Type: ApplicationFiled: March 14, 2013Publication date: May 8, 2014Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventor: Yang Je LEE
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Publication number: 20140102770Abstract: The present invention relates to a core substrate, a manufacturing method thereof, and a structure for a metal via. In accordance with an embodiment of the present invention, a core substrate including: an insulation layer; a plurality of metal vias passing through the insulation layer and formed to become wider from upper and lower surfaces to a middle part of the insulation layer; and a conductive layer formed on the upper and lower surfaces of the insulation layer and connected to the plurality of metal vias. Further, a manufacturing method thereof and a structure for a metal via are provided.Type: ApplicationFiled: September 10, 2013Publication date: April 17, 2014Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Jae Hoon CHOI, Jong Kuk HONG
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Patent number: 8696921Abstract: In a method of manufacturing a semiconductor device, a substrate is loaded to a process chamber having, unit process sections in which unit processes are performed, respectively. The unit processes are performed on the substrate independently from one another at the unit process sections under a respective process pressure. The substrate sequentially undergoes the unit processes at the respective unit process section of the process chamber. Cleaning processes are individually performed to the unit process sections, respectively, when the substrate is transferred from each of the unit process sections and no substrate is positioned at the unit process sections. Accordingly, the process defects of the process units may be sufficiently prevented and the operation period of the manufacturing apparatus is sufficiently elongated.Type: GrantFiled: January 15, 2010Date of Patent: April 15, 2014Assignee: Samsung Electronics Co., Ltd.Inventors: Jin-Ho Park, Gil-Heyun Choi, Byung-Lyul Park, Jong-Myeong Lee, Zung-Sun Choi, Hye-Kyung Jung
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Publication number: 20140091053Abstract: A multilayer electrical device, such as a printed circuit board, having a tooth structure including a metal layer set in a dielectric. The device includes a base; a conductive layer adjacent to the base; a dielectric material adjacent to conductive layer; a tooth structure including a metal layer set in the dielectric material to join the dielectric material to the metal layer; and wherein the metal layer forms a portion of circuitry.Type: ApplicationFiled: October 8, 2013Publication date: April 3, 2014Inventors: Brian J. McDermott, Daniel McGowan, Ralph Leo Spotts, JR., Sid Tryzbiak
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Publication number: 20140076844Abstract: A method for fabricating a biocompatible hermetic housing including electrical feedthroughs, the method comprises providing a ceramic sheet having an upper surface and a lower surface, forming at least one via hole in said ceramic sheet extending from said upper surface to said lower surface, inserting a conductive thick film paste into said via hole, laminating the ceramic sheet with paste filled via hole between an upper ceramic sheet and a lower ceramic sheet to foam a laminated ceramic substrate, firing the laminated ceramic substrate to a temperature to sinter the laminated ceramic substrate and cause the paste filled via hole to form metalized via and cause the laminated ceramic substrate to form a hermetic seal around said metalized via, and removing the upper ceramic sheet and the lower ceramic sheet material from the fired laminated ceramic substrate to expose an upper and a lower surface of the metalized via.Type: ApplicationFiled: November 14, 2013Publication date: March 20, 2014Inventors: Jerry Ok, Robert J. Greenberg
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Publication number: 20140069694Abstract: A circuit board includes a circuit pattern formed on a substrate, a first solder resist layer formed on the circuit pattern, an electroless plating layer formed on the circuit pattern on which the first solder resist layer is opened, and a second solder resist layer formed on the first solder resist layer, and a method for manufacturing the same. According to certain embodiments, it is possible to cover a portion which has vulnerable plating quality due to solder resist residue or insufficient wetting around an edge of an existing solder resist layer by including an additional solder resist layer on a surface-treated plating layer. Further, it is possible to protect an undercut portion under the solder resist layer by forming the additional solder resist layer.Type: ApplicationFiled: March 14, 2013Publication date: March 13, 2014Applicant: Samsung Electro-Mechanics Co., Ltd.Inventors: Seong Min CHO, Eun Heay Iee, Jung Youn Pang, Shimoji Teruaki, Chi Seong Kim
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Publication number: 20140069705Abstract: Disclosed are a printed circuit board and a method for manufacturing the same. The printed circuit board includes a core insulating layer, at least one via formed through the core insulating layer, an inner circuit layer buried in the core insulating layer, and an outer circuit layer on a top surface or a bottom surface of the core insulating layer, wherein the via includes a first part, a second part below the first part, a third part between the first and second parts, and at least one barrier layer including a metal different from a metal of the first to third parts. The inner circuit layer and the via are simultaneously formed so that the process steps are reduced. Since odd circuit layers are provided, the printed circuit board has a light and slim structure.Type: ApplicationFiled: December 23, 2011Publication date: March 13, 2014Applicant: LG INNOTEK CO., LTD.Inventors: Sang Myung Lee, Sung Woon Yoon, Hyuk Soo Lee, Sung Won Lee, Ki Do Chun
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Publication number: 20140062916Abstract: Disclosed is a touch panel which facilitates to realize a simplified structure owing to a flexible printed circuit film which is formed on only one surface of a substrate without being formed on the other surface of the substrate, and a method of manufacturing the same, and a display device using the same.Type: ApplicationFiled: April 4, 2013Publication date: March 6, 2014Applicant: LG Display Co., Ltd.Inventors: Sunggon HONG, Soon Kwang HONG, Jae Do LEE, Yonghee HAN
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Publication number: 20140054262Abstract: Disclosed is a piezoelectric micro energy harvester and manufacturing method thereof, the method including: forming an insulation film on a substrate; patterning the insulation film and forming an electrode pad pattern, a center electrode pattern, and a side electrode pattern; forming an open cavity at an inside of the substrate for suspension of the center electrode pattern and the side electrode pattern; disposing a conductive film on the electrode pad pattern, the center electrode pattern, and the side electrode pattern and forming electrode pads, a center electrode, and a side electrode; and forming a piezoelectric film so as to cover a space between the center electrode and the side electrode and upper surfaces of the center electrode and the side electrode.Type: ApplicationFiled: October 29, 2013Publication date: February 27, 2014Applicant: Electronics and Telecommunications Research InstituteInventors: Chi Hoon JUN, Sang Choon KO, Jong Tae MOON
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Publication number: 20140054069Abstract: Disclosed are a printed circuit board and a method for manufacturing the same. The printed circuit board includes a core insulating layer, at least one via formed through the core insulating layer, an inner circuit layer buried in the core insulating layer, and an outer circuit layer on a top surface or a bottom surface of the core insulating layer, wherein the via includes a center part having a first width and a contact part having a second width, the contact part makes contact with a surface of the core insulating layer, and the first width is larger than the second width. The inner circuit layer and the via are simultaneously formed so that the process steps are reduced. Since odd circuit layers are provided, the printed circuit board has a light and slim structure.Type: ApplicationFiled: December 23, 2011Publication date: February 27, 2014Applicant: LG INNOTEK CO., LTD.Inventors: Sang Myung Lee, Sung Woon Yoon, Hyuk Soo Lee, Sung Won Lee, Ki Do Chun
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Publication number: 20140042122Abstract: Disclosed herein is a method of manufacturing a printed circuit board, the method including: preparing a base substrate having an insulating layer and a connection pad formed in the insulating layer; forming a photosensitive resist on the insulating layer; forming an opening part of which a side surface has a foot shape by patterning the photosensitive resist; forming a via hole exposing the connection pad by etching the insulating layer exposed by the opening part; and forming a via by filling the via hole.Type: ApplicationFiled: August 9, 2013Publication date: February 13, 2014Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Jae Mok Jung, Min Soo Kim, Hun June Song, Ba Wool Kim
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Publication number: 20140034602Abstract: An optical waveguide device includes: a substrate which has an electro-optical effect; an optical waveguide which is formed on the substrate and/or inside the substrate; and an in-substrate electrode which is formed of a metal and provided inside the substrate.Type: ApplicationFiled: October 10, 2013Publication date: February 6, 2014Applicant: FUJITSU LIMITEDInventors: Tetsuya MIYATAKE, Takashi SHIRAISHI, Masaharu DOI
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Publication number: 20140035935Abstract: This disclosure provides systems, methods and apparatus for glass via bars that can be used in compact three-dimensional packages, including embedded wafer level packages. The glass via bars can provide high density electrical interconnections in a package. In some implementations, the glass via bars can include integrated passive components. Methods of fabricating glass via bars are provided. In some implementations, the methods can include patterning and etching photo-patternable glass substrates. Packaging methods employing glass via bars are also provided.Type: ApplicationFiled: August 3, 2012Publication date: February 6, 2014Applicant: QUALCOMM MEMS TECHNOLOGIES, INC.Inventors: Ravindra V. Shenoy, Kwan-Yu Lai, Jon Bradley Lasiter, Jonghae Kim, Mario Francisco Velez, Chi Shun Lo, Donald William Kidwell, Philip Jason Stephanou, Justin Phelps Black, Evgeni Petrovich Gousev
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METHOD FOR MANUFACTURING QUARTZ CRYSTAL RESONATOR, QUARTZ CRYSTAL UNIT AND QUARTZ CRYSTAL OSCILLATOR
Publication number: 20140033489Abstract: In a method for manufacturing a quartz crystal resonator, the method comprising the steps of: forming a quartz crystal tuning fork resonator having a quartz crystal tuning fork base, and first and second quartz crystal tuning fork tines; forming at least one groove in at least one of opposite main surfaces of each of the first and second quartz crystal tuning fork tines so that a width of the at least one groove is greater than a distance in the width direction of the at least one groove measured from an outer edge of the at least one groove to an outer edge of the corresponding one of the first and second quartz crystal tuning fork tines; and forming a metal film on at least one of the opposite main surfaces of the first and second quartz crystal tuning fork tines so that an oscillation frequency of the quartz crystal tuning fork resonator is lower than 32.768 kHz.Type: ApplicationFiled: October 11, 2013Publication date: February 6, 2014Applicant: PIEDEK TECHNICAL LABORATORYInventor: Hirofumi KAWASHIMA -
Patent number: 8641914Abstract: Methods for fabricating arrays of nanoscaled alternating lamellae or cylinders in a polymer matrix having improved long range order utilizing self-assembling block copolymers, and films and devices formed from these methods are provided.Type: GrantFiled: May 17, 2012Date of Patent: February 4, 2014Assignee: Micron Technology, Inc.Inventor: Jennifer Kahl Regner
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Publication number: 20140028543Abstract: This disclosure provides systems, methods and apparatus for vias in an integrated circuit structure such as a passive device. In one aspect, an integrated passive device includes a first conductive trace and a second conductive trace over the first conductive trace with an interlayer dielectric between a portion of the first conductive trace and the second conductive trace. One or more vias are provided within the interlayer dielectric to provide electrical connection between the first conductive trace and the second conductive trace. A width of the vias is greater than a width of at least one of the conductive traces.Type: ApplicationFiled: July 30, 2012Publication date: January 30, 2014Applicant: QUALCOMM MEMS TECHNOLOGIES, INC.Inventors: Chi Shun Lo, Je-Hsiung Jeffrey Lan, Mario Francisco Velez, Robert Paul Mikulka, Chengjie Zuo, Changhan Hobie Yun, Jonghae Kim
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Publication number: 20140030541Abstract: Passivation integration schemes and pad structures to reduce the stress gradients and/or improve the contact surface existing between the Al in the pad and the gold wire bond. One of the pad structures provides a plurality of recessed pad areas which are formed in a single aluminum pad. An oxide mesa can he provided under the aluminum pad. Another pad structure provides a single recessed pad area which is formed in a single aluminum pad, and the aluminum pad is disposed above a copper pad and a plurality of trench/via pads. Still another pad structure provides a single recessed pad area which is formed in a single aluminum pad, and the aluminum pad is disposed above a portion of a copper pad, such that the aluminum pad and the copper pad are staggered relative to each other.Type: ApplicationFiled: October 3, 2013Publication date: January 30, 2014Applicant: LSI CORPORATIONInventors: Hemanshu Bhatt, Dilip Vijay, Jayanthi Pallinti, Sey-Shing Sun, Hong Ying, Chi-Yi Kao
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Publication number: 20140001353Abstract: A micro-reflectron for a time-of-flight mass spectrometer including a substrate and integrated with the volume of the substrate, means for application of a potential gradient in a volume suitable for constituting a flight zone of the ions. The means of application includes at least two polarization electrodes and a wall of at least one resistive material that can be polarized between these electrodes so as to generate a continuous potential gradient, itself providing the function of reflectron, this flight zone, these electrodes and this wall being obtained by the technology of microelectromechanical systems (MEMS) and this micro-reflectron having a thickness of less than 5 millimetres while its other dimensions are less than 10 times this thickness.Type: ApplicationFiled: September 4, 2013Publication date: January 2, 2014Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES (Former name: COMMISSARIAT A L'ENERGIInventors: Jean-Sebastien DANEL, Laurent DURAFFOURG, Frederic PROGENT, Charles-Marie TASSETTI
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Publication number: 20140002226Abstract: Disclosed herein are an inductor and a method of manufacturing the same. More specifically, in the inductor according to the present invention, a coil with a fine pattern may be formed, and an insulating resin composite including liquid crystal oligomer for reducing occurrence of deformation of the coil may be used for an insulating substrate.Type: ApplicationFiled: April 29, 2013Publication date: January 2, 2014Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Jin Seok Moon, Sung Kwon Wi, Jeong Kyu Lee, Keun Yong Lee, Hyun Jun Lee, Seong Hyun Yoo
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Publication number: 20140001150Abstract: A method and system for constructing a printed circuit board with multifunctional holes. A first conductive material is deposited into a hole in a substrate to form a first plating on an inner surface of the hole. At least one outer portion of the hole is modified to have a larger diameter than the original hole and to remove the first conductive material from that outer portion. A seed material is deposited into the modified hole. An etchant is applied to the hole to non-mechanically remove the first conductive material from the unmodified portion of the hole. Another conductive material is deposited to into the modified hole that adheres to the seed material in the modified outer portion via to form a second plating at the outer portion.Type: ApplicationFiled: June 29, 2012Publication date: January 2, 2014Inventor: Roy J. Lecesse
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Publication number: 20130319748Abstract: A wired circuit board includes an insulating layer to be formed with an opening extending therethrough in a thickness direction of the wired circuit board, a conductive layer formed on one surface of the insulating layer in the thickness direction and including a one-side terminal portion, an other-side terminal portion formed on the other surface of the insulating layer in the thickness direction, disposed so as to overlap the opening and the one-side terminal portion when projected in the thickness direction, and used to be connected to an electronic element via a conductive adhesive, and a conductive portion filling the opening to provide electrical conduction between the one-side terminal portion and the other-side terminal portion.Type: ApplicationFiled: May 8, 2013Publication date: December 5, 2013Applicant: NITTO DENKO CORPORATIONInventors: Jun ISHII, Saori KANEZAKI
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Publication number: 20130313006Abstract: The present disclosure relates to a touch panel and a producing method of the same.Type: ApplicationFiled: April 26, 2013Publication date: November 28, 2013Applicant: Research & Business Foundation Sungkyunkwan UniversityInventor: Research & Business Foundation Sungkyunkwan University
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Publication number: 20130316329Abstract: Among others, the present invention provides piezo-electric micro-devices for detecting at the microscopic level an electric, magnetic, electromagnetic, thermal, optical, acoustical, biological, chemical, physical, bio-chemical, bio-physical, physical-chemical, bio-physical-chemical, bio-mechanical, bio-electro-mechanical, electro-mechanical, or mechanical property of the biologic subject.Type: ApplicationFiled: October 5, 2011Publication date: November 28, 2013Inventors: Chris Chang Yu, Xuedong Du
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Patent number: 8574444Abstract: A method of fabricating a multilayer printed circuit board includes forming a first circuit-forming pattern and a via-forming pattern on a first carrier, and forming a first insulation layer; repeatedly forming inner circuit patterns and inner insulation layers over the first insulation layer by forming circuit-forming patterns and imprinting, and forming inner vias connecting the inner circuit patterns positioned on different insulation layers; forming a second circuit-forming pattern on a second carrier and inserting the first circuit-forming pattern and the second circuit-forming pattern respectively into the first insulation layer and a second insulation layer; removing the first carrier and the second carrier; forming circuit-forming grooves by removing the first circuit-forming pattern and the second circuit-forming pattern, and forming via-forming indentations connected with the circuit-forming grooves; and forming outer circuit patterns and outer vias by filling the circuit-forming grooves and the viaType: GrantFiled: August 14, 2012Date of Patent: November 5, 2013Assignee: Samsung Electro-Mechanics Co., Ltd.Inventor: Ryoichi Watanabe
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Publication number: 20130277097Abstract: The embodiment relates to a printed circuit board. The printed circuit board includes an insulating substrate having a plurality of circuit pattern grooves, a conductive absorption layer including conductive particles absorbed into inner walls of the circuit pattern grooves and circuit patterns formed on the conductive absorption layer such that the circuit pattern grooves are filled with the circuit patterns. Since the electroplating process is selectively performed with respect to inner portions of the pattern grooves by using the conductive absorption layer as a seed layer, the plating layer is not formed on the insulating layer except for the pattern grooves, so that the etching process for the electroplating layer is not necessary and the patterns are stably formed.Type: ApplicationFiled: December 23, 2011Publication date: October 24, 2013Applicant: LG INNOTEK CO., LTD.Inventor: Il Sang Maeng
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Patent number: 8562847Abstract: In a through hole closing process, a metal plate is attached to one surface of a conductive base member having a plurality of through holes by the use of a magnet, in a copper plating process, a copper plating layer is formed on the conductive base member and the metal plate exposed within the through holes, from the side of the conductive base member where the metal plate is not attached, thereby to fill up the through holes, in a film forming process, a Pd alloy film is formed by plating on the surface of the conductive base member after removal of the metal plate, and in a removal process, the copper plating layer is removed by selective etching, thereby to produce a hydrogen production filter that is used in a reformer a fuel cell so as to be capable of stably producing high purity hydrogen gas.Type: GrantFiled: September 9, 2011Date of Patent: October 22, 2013Assignee: Dai Nippon Insatsu Kabushiki KaishaInventors: Hiroshi Yagi, Takanori Maeda, Yoshinori Oota, Yasuhiro Uchida
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Publication number: 20130269974Abstract: Wire-bonded semiconductor structures using organic insulating material and methods of manufacture are disclosed. The method includes forming a metal wiring layer in an organic insulator layer. The method further includes forming a protective layer over the organic insulator layer. The method further includes forming a via in the organic insulator layer over the metal wiring layer. The method further includes depositing a metal layer in the via and on the protective layer. The method further includes patterning the metal layer with an etch chemistry that is damaging to the organic insulator layer.Type: ApplicationFiled: April 11, 2012Publication date: October 17, 2013Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Timothy H. DAUBENSPECK, Jeffrey P. GAMBINO, Zhong-Xiang HE, Christopher D. MUZZY, Wolfgang SAUTER, Timothy D. SULLIVAN
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Publication number: 20130270967Abstract: A method is provided for forming a piezoelectric ultrasonic transducer apparatus having a first electrode deposited on a dielectric layer disposed on a primary substrate. A piezoelectric material is deposited between the first electrode and a second electrode, to form a transducer device. At least the piezoelectric material is patterned such that a portion of the first electrode extends laterally outward therefrom. The primary substrate and the dielectric layer are etched to form a first via extending to the laterally outward portion of the first electrode, and a first conductive material is deposited to substantially fill the first via and form an electrically-conductive engagement with the laterally outward portion of the first electrode. The primary substrate is etched to define a second via extending therethrough, wherein the second via is laterally spaced apart from the first via. An associated method and apparatus are also provided.Type: ApplicationFiled: May 31, 2013Publication date: October 17, 2013Inventors: David Dausch, Scott H. Goodwin
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Publication number: 20130252103Abstract: Electrodes comprising metal support structures and methods for making the same are generally described. In certain embodiments, the electrodes described herein comprise a metal porous support structure, and an electrode active material at least partially contained within the pores of the porous support structure. In some embodiments, the electrical conductivity of the porous support structure material can ensure that electrons are efficiently transferred through and/or out of the electrode (e.g., to a current collector and/or to an external circuit). The pores within the porous support structure can ensure, in certain embodiments, that the electrode active material is accessible to the electrolyte, thereby enhancing performance of the electrochemical cell in which the electrode is used.Type: ApplicationFiled: March 8, 2013Publication date: September 26, 2013Applicant: Sion Power CorporationInventor: Yuriy V. Mikhaylik
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Publication number: 20130240259Abstract: A method of manufacturing a wiring board includes: forming an outer through hole in a core substrate; filling the outer through hole with an insulation resin; forming a first conductive layer on a surface of the insulation resin at a portion where a core connecting via is formed; forming a land around the first conductive layer; laminating the wiring layer on the core substrate after the forming of the first conductive layer and the forming of the land; forming an inner through hole having a smaller diameter than that of the outer through hole and penetrating through the core substrate and the wiring layer so as to penetrate through the insulation resin; and coating a first conductive film on an inner wall surface of the inner through hole, in which the core substrate and the first conductive film are electrically connected through the first conductive layer and the land.Type: ApplicationFiled: March 13, 2013Publication date: September 19, 2013Applicant: FUJITSU LIMITEDInventor: Hideaki YOSHIMURA
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Patent number: 8535547Abstract: A printed circuit board manufacturing system and a manufacturing method thereof are disclosed. A method of manufacturing printed circuit board, comprising: providing a substrate that comprises a pad and an insulation layer covering the pad; acquiring an image of the substrate; acquiring location information of the pad by analyzing the image of the substrate; forming a via hole by removing a part of the insulation layer that corresponds the location information of the pad; and forming a via by filling the via hole with a conductive material, provides improved process conformity, even if the substrate has partial or nonlinear deformation, by considering the location information of the pad in the via hole forming. The improved conformity may allow more flexibility to substrate design and more integrity for circuitries on printed circuit board.Type: GrantFiled: January 22, 2008Date of Patent: September 17, 2013Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Chung-Woo Cho, Soon-Jin Cho, Byung-Bae Seo, Ki-Young Yoo, Seok-Hwan Ahn
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Patent number: 8535546Abstract: In order to provide a method of manufacturing a multilayer wiring substrate, a base member having a copper foil separably laminated thereon is prepared, and a solder resist layer is formed on the copper foil. Openings are formed in the solder resist layer, and a metal conductor portion is formed in each of the openings. By means of sputtering, a dissimilar metal layer is formed over the surface of the metal conductor portion and the entire surface of the solder resist layer. Copper electroplating is performed so as to form connection terminals and a conductor layer on the dissimilar metal layer. After a build-up step, the base material is removed, whereby the copper foil is exposed, and the exposed copper foil and the metal conductor portion are removed through etching, whereby the surfaces of the external connection terminals are exposed from the openings.Type: GrantFiled: December 6, 2011Date of Patent: September 17, 2013Assignee: NGK Spark Plug Co., Ltd.Inventor: Shinnosuke Maeda
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Publication number: 20130223033Abstract: A printed wiring board has a core base having an opening portion, an inductor component accommodated in the opening portion, and a filler resin filling gap between the component and a side wall of the opening portion. The component has a support layer, a first conductive pattern on the support, an interlayer insulation layer on the support and first pattern, a second conductive pattern on the insulation layer, and a via conductor in the insulation layer and connecting the first and second patterns, the insulation layer includes a magnetic layer and a resin layer covering the magnetic layer, the magnetic layer includes magnetic material and resin material and has a first hole, the insulation layer has a second hole penetrating through the resin layer such that the second hole passes through the first hole and extends to the first pattern, and the via conductor is formed in the second hole.Type: ApplicationFiled: December 28, 2012Publication date: August 29, 2013Applicant: IBIDEN CO., LTD.Inventor: IBIDEN Co., Ltd.
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Publication number: 20130217168Abstract: The invention relates to an organic electronic device, particularly an OLED device (100), and to a method for its manufacturing. The device (100) comprises at least one functional unit (LU1, LU2, LU3) with an organic layer (120). On top of this functional unit (LU1, LU2, LU3), at least one inorganic encapsulation layer (140, 141) and at least one organic encapsulation layer (150, 151) are disposed in which at least one conductive line (161, 162) is embedded. In this way an OLED with a thin film encapsulation can be provided that can electrically be contacted at contact points (CL) on its back side.Type: ApplicationFiled: October 6, 2011Publication date: August 22, 2013Applicant: KONINKLIJKE PHILIPS ELECTRONICS N.V.Inventors: Sören Hartmann, Holger Schwab, Herbert Lifka, Herbert Friedrich Boerner
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Patent number: 8506826Abstract: A method for manufacturing a micro electro-mechanical system (MEMS) switch system (600, 700) includes etching each of a plurality of base circuit layers (425) and a plurality of passive component substrate layers (412, 418, 42, 426). The method continues with laser milling of a first dielectric film (406) to create a spacer layer (405). A metal cladding (402, 403) formed on a flexible dielectric film layer 404 is etched so as to form a plurality of switch component features. Further laser milling is performed with respect to the flexible dielectric film layer to form at least one switch structure (448, 450). Thereafter, a stack (400) is assembled which is comprised of the spacer layer disposed between the flexible dielectric film layer and the plurality of base circuit layers. Additional layers can also be included in the stack. When the stack is completed, heat and pressure are applied to join the various layers forming the stack.Type: GrantFiled: August 2, 2011Date of Patent: August 13, 2013Assignee: Harris CorporationInventor: John E. Rogers