Abstract: A process for producing an electronic component The electronic component includes a base material equipped with a core material and having a conductor layer on at least one surface thereof; a via hole formed through laser irradiation from the other surface side of the base material; a first plating layer formed by using the conductor layer as an electrode so as to cover the core material, which is exposed on an inner wall surface of the via hole; an electroless plating layer which is formed on the upper side of the first plating layer and which is in close contact with the inner wall surface of the via hole; and a second plating layer formed by using the conductor layer as an electrode so as to cover the electroless plating layer. A conductor part is formed in the via hole.

Abstract: A manufacturing process of a high thermal conducting circuit substrate is provided. First, a metal core substrate is provided and then the metal core substrate is etched at different etching speeds. Afterwards, two insulating layers are formed respectively on two sides of the etched metal core substrate. In addition, as an option, two conducting layers are formed respectively on two sides of the metal core substrate and are on top of the insulting layers. The conducting layers are patterned according to designs appropriate for the products. Because the high thermal conducting circuit substrate fabricated as the aforementioned manufacturing process mainly comprises the metal core substrate, it helps to elevate the thermal conduction of the circuit substrate itself.

Abstract: A method of manufacturing a printed circuit board is disclosed. The method may include: sequentially stacking an acid-resistant first cover layer and an alkali-resistant second cover layer over a copper foil, for a copper clad laminate that includes the copper foil stacked over one side of an insulation layer; forming an intaglio groove by removing portions of the second cover layer, the first cover layer, and the copper clad laminate; stacking a seed layer over the intaglio groove and the second cover layer; removing a portion of the seed layer stacked over the second cover layer, by stripping the second cover layer; forming a plating layer, by plating an inside of the intaglio groove; stripping the first cover layer; and removing the copper foil exposed by the stripping of the first cover layer.

Abstract: The present invention relates to a circuit board including a flexible film provided with an extremely fine circuit pattern, a laminated member for a circuit board, and a method for making a laminated member for a circuit board with excellent productivity. A circuit board of the present invention includes a flexible film and a circuit pattern composed of a metal provided on the flexible film, and dimensional change rate of the circuit pattern is within ±0.01%. A laminated member for a circuit board of the present invention includes a reinforcing plate, a self-stick, removable organic layer, a flexible film, and a circuit pattern composed of a metal laminated in that order.

Abstract: A method of making a fuel cell component using a mask, which is removed after further processing to yield a surface with variable properties.

Abstract: A method of manufacturing a display device includes: forming an auxiliary layer including at least one of metal and a metal oxide on an insulating substrate; forming a photoresist layer pattern partially exposing the auxiliary layer on the auxiliary layer; forming a trench on the insulating substrate by etching the exposed auxiliary layer and the insulating substrate under the exposed auxiliary layer; forming a seed layer including a first seed layer disposed on the photoresist layer pattern and a second seed layer disposed in the trench; removing the photoresist layer pattern and the first seed layer by lifting off the photoresist layer pattern; removing the auxiliary layer remaining on the insulating substrate after lifting off the photoresist layer pattern; and forming a main wiring layer on the second seed layer by electroless plating.

Abstract: In a probe manufacturing method, after a metal material for a probe is deposited on a base table, the probe can be detached from the base table relatively easily without damaging the probe. A recess corresponding to a flat surface shape of a probe is formed by a resist mask on a sacrificial layer on a base table, and a probe is formed by depositing a probe material in the recess. Thereafter, the resist mask is removed, and further the sacrificial layer is removed by an etching process with a part of the sacrificial layer remaining. For the purpose of forming an opening for control of the remaining part of the sacrificial layer in the etching process in the probe so as to let the opening pass through the probe in its plate thickness direction, a hole-forming portion for the opening is formed in the resist mask. Etching of the sacrificial layer in the etching process is promoted from an edge of the opening formed in the probe by this hole-forming portion.

Abstract: The present invention provides a method of manufacturing a double-sided printed circuit board. An insulation substrate is first formed by creating a plurality of through holes on a Copper Clad Laminate (CCL) whose copper foil surface has been removed. Next, an electro-less copper layer is plated on the substrate for forming a plurality of plated through holes. After a wire pattern is formed on the substrate, a solder preventive layer is formed on top of the wire pattern. Next, a plurality of openings is created in between the solder preventive layer for exposing the contact pads. Finally, a protective layer is plated on top of the contact pads.

Abstract: A method of manufacturing a film printed circuit board is provided. A film substrate consisting of a polyimide substrate, an alloy layer and a first copper layer is provided. A first lithographic and etching process is performed to pattern the copper layer and the alloy layer and a plurality of conductive line structures is formed on the polyimide substrate. A second copper layer is formed over the polyimide substrate and the conductive line structures. A second lithographic and etching process is performed to pattern the second copper layer.

Abstract: Embodiments disclosed include methods of processing substrates, including methods of forming conductive connections to substrates. In one embodiment, a method of processing a substrate includes forming a material to be etched over a first material of a substrate. The material to be etched and the first material are of different compositions. The material to be etched is etched in a dry etch chamber to expose the first material. After the etching, the first material is contacted with a non-oxygen-containing gas in situ within the dry etch chamber effective to form a second material physically contacting onto the first material. The second material comprises a component of the first material and a component of the gas. In one embodiment, the first material is contacted with a gas that may or may not include oxygen in situ within the dry etch chamber effective to form a conductive second material.

Abstract: A device and method of heat sinking a surface mount device (SMD) component. In an example method through holes are formed in a printed circuit board (PCB), a first copper layer is electroless plated in the holes, a second copper layer is standard plated in the holes and surrounding surfaces of the PCB, a third copper layer is masked and pulse plated in the holes, the holes are filled with non-conductive material and then is sanded flush with the second copper layer. A fourth copper layer electroless plated on the PCB over the area of the holes, a fifth copper layer (or pad) plated on the PCB over the area of the holes, and a surface mount device is attached to the fifth copper layer.

Abstract: A method for manufacturing a conductive film as well as the structure thereof and a probe card using the same are provided in the invention. The conductive film is substantially a stacked structure of a specific thickness formed by the adhering and stacking of at least an substrate in a vacuum environment by the use of surface processing and mechanical healing whereas each substrate has an array of metal micro-threads formed thereon, in which the plural metal micro-threads, each being wrapped in an insulating film, are arranged on the substrate to form the array in a unidirectional and single-layered manner by the use of a LIGA process and polymer thin film technology. In an exemplary embodiment, the insulating film can be a polymer thin film of high dielectric constant, being made of a material such as polydimethylsiloxane (PDMA) or polyimide (PI); and the metal micro-thread is made of a high conductivity and high strength Ni—Co alloy.

Abstract: A method for forming at least one micro-via on a substrate is disclosed. The method comprises drilling at least one hole in a substrate by using a first laser beam. The first laser beam has an energy distribution, which is more at edges of the first laser beam than at the center of the first laser beam. The method further comprises forming at least one blank pattern on a top surface of the substrate and around an outer periphery of the at least one hole by removing at least a portion of the substrate by using a second laser beam. At least one blank pattern of the plurality of blank pattern corresponds to pad of the at least one micro-via. Thereafter, the method comprises filling the plurality of blank patterns and the at least one micro-via with a conductive material to form at least micro-via.

Abstract: A monolithic pair of nanoscale probes, including: a substrate having a cavity that extends from a surface of the substrate into its body; a dielectric layer formed on the substrate; a pair of nanoscale probe precursors formed over the dielectric layer; a plurality of sub-monolayers of electrode material selectively atomic layer deposited over the pair of nanoscale probe precursors. The dielectric layer includes a window that extends through it to the cavity of the substrate such that a portion of the dielectric layer adjacent to the window extends over the cavity. The pair of nanoscale probe precursors includes a pair of edges facing each other across the window. These edges correspond to tips of the pair of nanoscale probes. The sub-monolayers of electrode material include the pair of edges, so that a distance between the tips of the nanoscale probes is between about 0.1 nm and about 20 nm.

Abstract: In a pressing cap forming part of a semiconductor device carrier unit, a pressing portion of a pressure body has recesses, to each of which a bump is inserted.

Abstract: A method for manufacturing an electronic component includes preparing an element substrate having a function section for providing a function of an electronic component, and an external-connection electrode; bonding a low-sandblast-resistant case plate to the element substrate through a high-sandblast-resistant adhesive layer; forming, by sandblast processing, a hole in the case plate above the external-connection electrode so that the adhesive layer is exposed to the outside; removing, by etching, an adhesive layer portion that is exposed in the hole; forming an electrode film so as to be electrically connected to the exposed external-connection electrode; and forming, by mechanical machining, a projection having a leading end surface on which a terminal electrode resulting from the electrode film is defined.

Abstract: In a method of manufacturing a multilayer printed circuit board, a plurality of insulating substrates each having a first surface and a second surface is prepared. A circuit pattern is formed on each of the first surfaces of the insulating substrates. A plurality of via holes is provided so as to extend through respective ones of the insulating substrates from a side of the second surfaces in such a manner that the via holes reach corresponding ones of the circuit patterns. Ones of a plurality of sintered bodies made of conductive particles is inserted into corresponding ones of the via holes and is fixed in the via holes. The insulating substrates are stacked so that the circuit patterns are electrically coupled through the sintered bodies.

Abstract: A printed circuit board manufacturing system and a manufacturing method thereof are disclosed. A method of manufacturing printed circuit board, comprising: providing a substrate that comprises a pad and an insulation layer covering the pad; acquiring an image of the substrate; acquiring location information of the pad by analyzing the image of the substrate; forming a via hole by removing a part of the insulation layer that corresponds the location information of the pad; and forming a via by filling the via hole with a conductive material, provides improved process conformity, even if the substrate has partial or nonlinear deformation, by considering the location information of the pad in the via hole forming. The improved conformity may allow more flexibility to substrate design and more integrity for circuitries on printed circuit board.

Abstract: A fabrication method for a multilayer printed circuit board includes: forming a first circuit-forming pattern and a first insulation layer, into which the first circuit-forming pattern is inserted, on a first carrier; forming inner circuit patterns and inner insulation layers over the first insulation layer, and forming inner vias connecting the inner circuit patterns positioned on different insulation layers; forming a second circuit-forming pattern on a second carrier and inserting the second circuit-forming pattern into a second insulation layer on an outermost side; removing the first carrier and the second carrier; forming circuit-forming grooves by removing the first circuit-forming pattern and the second circuit-forming pattern, and forming via-forming indentations connected with the circuit-forming grooves; and forming outer circuit patterns and outer vias by filling the circuit-forming grooves and the via-forming indentations with a conductive material.

Abstract: A printed circuit board having prescribed conductive patterns formed on an insulating layer is provided about 20 mm apart from an AC electrode provided in a plasma etching device. An earth electrode is provided on the side opposing the AC electrode. More specifically, the printed circuit board is provided outside a sheath layer that is a region having a high plasma density generated in the vicinity of the AC electrode. The frequency of an AC power supply is preferably not more than 1 GHz. The pressure in the device is preferably in the range from 1.33×10?2 Pa to 1.33×102 Pa. The inter-electrode distance between the AC electrode and the earth electrode is preferably not more than 150 mm, more preferably from 40 mm to 100 mm.

Abstract: A method for fabricating a solder transfer mold includes masking a substrate with a masking agent. A pattern is transferred to the substrate mask. The masked substrate is etched until cavities of a first volume are formed. The cavities of the first volume are selectively coated. The masked substrate is etched until cavities of a second volume are formed.

Abstract: A method for making an interconnect structure includes applying a first metal layer to an electronic device, wherein the electronic device comprises at least one I/O contact and the first metal layer is located on a surface of the I/O contact; applying a removable layer to the electronic device. The removable layer is adjacent to the first metal layer. An adhesive layer is applied to the electronic device or to a base insulative layer. The electronic device is secured to the base insulative layer using the adhesive layer. The first metal layer and removable layer are disposed between the electronic device and the base insulative layer.

Abstract: A method of manufacturing an interposer is provided, including the steps of providing a sheet with a copper layer and polyimide layer, laser drilling holes in the polyimide layer down to the copper layer, filling the holes with copper and extending the copper above the polyimide layer to define caps, removing portions of the copper layer to form conductive pads, and filling gaps between the conductive pads with an insulator, wherein individual conductive pads are in electrical contact with corresponding individual caps.

Abstract: There is provided a printed circuit board whose peel strength is large and a printed circuit board fabrication method and a printed circuit board machining apparatus that allow a fabrication time and a fabrication cost to be reduced. The fabrication method of the printed circuit board comprises steps of forming a resist layer on a surface of the printed circuit board whose surface is made of an insulator, of forming a hole that is connected from the surface of the resist layer to a conductor pattern of an inner layer and a hole and grooves having a depth not connected with the conductor layer of the inner layer by irradiating lasers, of filling a conductive material into the holes and the grooves to form a conductor pattern and of removing the resist layer to project a portion of the conductor pattern out of the surface of the insulating layer.

Abstract: An interconnect structure with stress buffering ability is disclosed, which comprises: a first surface, connected to a device selected form the group consisting of a substrate and an electronic device; a second surface, connected to a device selected form the group consisting of the substrate and the electronic device; a supporting part, sandwiched between and interconnecting the first and the second surfaces while enabling the areas of the two ends of the supporting part to be small than those of the first and the second surfaces in respective; and a buffer, arranged surrounding the supporting part for absorbing and buffering stresses.

Abstract: A method of manufacturing a thermal print head includes a conductor layer formation step, a first measurement step, a conductor layer splitting step and a second measurement step. In the conductor layer formation step, a single conductor layer including first and second measurement points is formed on a substrate. In the first measurement step, the electrical resistance is measured in the conductor layer, between the first and the second measurement points. In the conductor layer splitting step, a predetermined portion of the conductor layer is removed, so that a first electrode including the first measurement point and a second electrode including the second measurement point are formed. In the second measurement step, the resistance between the first and the second electrodes is measured. If the conductor layer has a disconnected portion in the first measurement step, a repairing conductor is formed on the disconnected portion.

Abstract: A manufacturing process of a high thermal conducting circuit substrate is provided. First, a metal core substrate is provided and then the metal core substrate is etched at different etching speeds. Afterwards, two insulating layers are formed respectively on two sides of the etched metal core substrate. In addition, as an option, two conducting layers are formed respectively on two sides of the metal core substrate and are on top of the insulting layers. The conducting layers are patterned according to designs appropriate for the products. Because the high thermal conducting circuit substrate fabricated as the aforementioned manufacturing process mainly comprises the metal core substrate, it helps to elevate the thermal conduction of the circuit substrate itself.

Abstract: This printed wiring board manufacturing method comprises the steps of providing a large number of through holes (for a through-hole) in a substrate made of an insulating material of which both sides are coated with a copper foil; making the inside of the through holes electrically conductive, coating the substrate with a photosensitive dry film, and developing and hardening the photosensitive dry film as a plating resist; and copper-plating the inside of the through holes and the opening periphery thereof. The manufacturing method further comprises the steps of coating the copper-plated area with a metal protective film, eliminating the photosensitive dry film; forming a circuit pattern; and conducting an overlaying treatment as a post-processing step.

Abstract: A method for etching a pattern in a material in precise target areas comprising depositing selectively onto the material droplets of a substance for dissolving or reacting chemically with the material. Droplets may be deposited from a print head of the type having a nozzle from which the material may be ejected as a series of droplets, such as an ink jet print head. In a preferred application, a series of ridges can be etched from an organic insulator layer overlying a photoemissive organic polymer. A conductive layer is then deposited and the ridges of organic insulator are dissolved by solvent washing to provide an array of conductive stripes which can be used as a cathode for an electroluminescent display device. In combination, both anode and cathode can be fabricated for a display device without the need for photolithography, which is particularly advantageous for the fabrication of large area display devices.

Abstract: An ultrasonic probe realizing a high sensitivity and a wide band thereof while miniaturizing a transducer and also taking into consideration a measure against generated heat. The ultrasonic probe includes: a backing material; a transducer array having a multi-layered structure in which a plurality of transducers are arranged in a first direction to compose a transducer group and a plurality of the transducer groups are arranged in a second direction different from the first direction; a first layer of conductive resin electrically connecting the first electrode layers of adjacent transducers with each other in each transducer group; a second layer of conductive resin electrically connecting the internal electrode layers of adjacent transducers with each other in each transducer group; and an insulating resin disposed in a predetermined region among the plurality of transducers in each transducer group.

Abstract: A droplet ejection head includes: a nozzle substrate provided with a plurality of nozzle holes for ejecting a droplet; a cavity substrate provided with a plurality of ejection cavities each having a diaphragm as a bottom wall functioning as an electrode; and an electrode substrate including: a plurality of individual electrodes each formed in a first groove, opposed to the diaphragm with a gap, and for driving the diaphragm; a driver IC for controlling driving of the plurality of individual electrodes; and input wiring formed in a second grooves, and for inputting one of power and a signal for driving the drover IC from the outside. The second grooves of the electrode substrate are formed deeper than the first grooves, and a thickness of a conductive material of the input wiring is greater than a thickness of the individual electrodes.

Abstract: Disclosed herein is a Ball Grid Array (BGA) package board. The BGA package board includes a first external layer on which a pattern comprising a circuit pattern and a wire bonding pad pattern is formed, a second external layer on which a pattern comprising a circuit pattern and a solder ball pad pattern is formed, an insulating layer formed between the first and second external layers, a first outer via hole to electrically connect the first and second external layers to each other, and a solder resist layer formed on each of the first and second external layers, with portions of the solder resist layer corresponding to the wire bonding pad pattern and the solder ball pad pattern being opened. The solder ball pad pattern is thinner than the circuit pattern of the second external layer.

Abstract: A wiring board member for forming a multilayer wiring board includes an insulation layer (11) having a hole (11a) and a metal layer (12) as a conductive layer joined to the insulation layer. The metal layer (12) includes a via portion (12b) occupying the hold of the insulation layer, a bump portion (12a) integrally connected to the via portion, and a wiring part (12c). The bump portion is disposed on one surface of the insulation layer, and has a substantially truncated quadrangular pyramid shape with a bottom surface thereof being integrally connected to the via portion. The wiring part is disposed on the other surface of the insulation layer, and has a certain pattern.

Abstract: A manufacturing method of an optical member for optical path conversion to be connected to an optical waveguide provided in a substrate includes forming plural inclined surfaces on a wafer by etching, forming openings corresponding to the inclined surfaces in a plate-like member, forming a combined body, in which the inclined surfaces and the openings correspond to each other, by bonding the wafer and the plate-like member, and dividing the combined body into small pieces each of which includes the inclined surface and the opening.

Abstract: According to this manufacturing method, a copper foil is attached to both sides of an insulating material to form a substrate. First, a large number of through-holes is made in the substrate and the inside of the through-holes is made electrically conductive. Then, after one side of the substrate is coated with a photosensitive dry film having an outer masking layer attached thereto, a developing solution is caused to infiltrate into the through-bores from the other side to develop the photosensitive dry film as a plating resist. The photosensitive dry film is then exposed to be hardened. The outer masking layer is removed to copper-electroplate the inside of the through-holes and the like. Finally, the photosensitive dry film is removed to form a circuit pattern.

Abstract: A method of fabricating a cladding region for use in MRAM devices includes the formation of a conductive bit line proximate to a magnetoresistive memory device. The conductive bit line is immersed in a first bath containing dissolved ions of a first conductive material for a time sufficient to displacement plate a first barrier layer on the conductive line. The first barrier layer is then immersed in an electroless plating bath to form a flux concentrating layer on the first barrier layer. The flux concentrating layer is immersed in a second bath containing dissolved ions of a second conductive material for a time sufficient to displacement plate a second barrier layer on the flux concentrating layer.

Abstract: A thin film resistor structure and a method of fabricating a thin film resistor structure is provided. The thin film resistor structure includes an electrical interface layer or head layer that is a combination of a Titanium (Ti) layer and a Titanium Nitride (TiN) layer. The combination of the Ti layer and the TiN layer mitigates resistance associated with the electrical interface layers.

Abstract: The present invention provides a probe manufacturing method in which, after a metal material for a probe is deposited on a base table, the probe can be detached from the base table relatively easily without giving damage on the probe. A recess corresponding to a flat surface shape of a probe is formed by a resist mask on a sacrificial layer on a base table. By depositing a probe material in the recess, a probe made of the probe material is formed over the base table via the sacrificial layer. Thereafter, the resist mask is removed, and further the sacrificial layer is removed by an etching process with a part of the sacrificial layer remaining. For the purpose of forming an opening for control of the remaining part of the sacrificial layer in the etching process in the probe so as to let the opening pass through the probe in its plate thickness direction, a hole-forming portion for the opening is formed in the resist mask.

Abstract: Disclosed is an article comprising a polymer layer containing a plurality of integral polymer conduit channels that contain at least two layers with at least one comprising a conductive material and the other serving a function beyond protection.

Abstract: There is provided a method of manufacturing a circuit board having a first fixed contact and a second fixed contact that extend substantially orthogonal to each other on the same surface, the life span required for the first fixed contact being longer than that required for the second fixed contact. The method includes: etching a copper foil formed on the entire surface of an insulating substrate to form the patterns of the first and second fixed contacts; polishing the surface of the insulating substrate with buff to remove an oxide film adhered to the copper foil; and sequentially forming a nickel layer having a thickness of about 1 to about 5 ?m and a gold layer having a thickness of about 0.01 to about 0.5 ?m on each of the first and second fixed contacts. In the method, the buffing direction is substantially aligned with a direction in which a first movable contact slides on the first fixed contact.

Abstract: In processing an integrated circuit structure including a contact arrangement that is initially covered by a stop layer, a first plasma is used to etch to form openings through an overall insulation layer covered by a patterned layer of photoresist such that one contact opening is associated with each contact. Stripping of the patterned layer of photoresist and related residues is performed. After stripping, the stop layer is removed from the contacts. In one feature, the stop layer is removed from the contacts by etching the stop layer using a plasma that is generated from a plasma gas input that includes hydrogen and essentially no oxygen. In another feature, the photoresist is stripped after the stop layer is removed. Stripping the patterned layer of photoresist and the related residues is performed, in this case, using a plasma that is formed predominantly including hydrogen without oxygen.

Abstract: A method of forming a conductive via plug is disclosed. The conductive via plug is formed by printing a solution comprising a solvent with insulating material dissolve capability and a conductive material by an inkjet method. The formed conductive via plug has a low resistivity and thus may serve as an electrical connection between two separate conductive layers. This manufacturing method of the conductive via plug may achieve simultaneously deposition, patterning and etching purposes, which significantly simplifies the manufacturing process.

Abstract: A rigid-flexible printed wire assembly which employs a blind via for interconnection is disclosed. Preferably, the assembly includes a rigid section having a through hole formed therethrough and a flexible section having an inner metal layer. Laser ablation is preferably utilized to form a blind via in the flexible section, while utilizing the through hole of the rigid section as a guide.

Abstract: A first plating foundation layer is formed by printing on a front face of a sheet-shaped insulating substrate. By inserting a punch into the sheet-shaped insulating substrate having the first plating foundation layer, a through hole is formed while leaving a piece having the plating foundation layer in the portion where the punch is inserted. A second plating foundation layer is formed by printing on a rear face of the sheet-shaped insulating substrate. A first and second wiring layers composed of a metal plating layer are formed by performing electroless plating, and at the same time, a metal plating layer connecting between the first and second wiring layers is formed in the through hole using the plating foundation layer on the piece.

Abstract: A method of manufacturing an electronic device comprises forming a wiring material layer made of aluminum or an aluminum alloy on the surface of an insulating film on a substrate, patterning the wiring material layer by a reactive ion etching treatment with a resist pattern used as a mask so as to form a wiring, and treating the surface of the insulating film including the wiring with an aqueous solution for removing the etching residue, the aqueous solution containing a peroxosulfate, a fluorine-containing compound and an acid for adjusting the pH value and having a pH value of ?1 to 3.

Abstract: A method for fabricating a multi-layer printed circuit board can include forming an etching resist layer on a first metal layer having plating grooves that selectively expose the first metal layer, forming a plated layer at the surface of the first metal layer exposed by the plating groove through a plating process to form connection protrusion, removing the etching resist layer, forming an insulation layer at the first metal layer and positioning a second metal layer at the surface of the insulation layer coupled to an end portion of the connection protrusion. By forming the connection protrusion through the plating process, a loss of material can be reduced and a strength of the connection protrusion can be increased. Further, a complexity of the fabrication process is reduced to reduce costs and increase productivity.

Abstract: A method of wiring formation includes forming a feeder film partially on a substrate, forming on the substrate a plating base film via a physical film making method so that the plate base film partially overlaps the feeder film, forming a plated wiring on the plating base film using an electrolytic plating, and selectively removing at least an area of the feeder film which is exposed from the plated wiring, using a wet etching process.

Abstract: A multilayer printed wiring board (1) in which conductor wiring layers (12, 14a, 14b) and interlayer insulating resin layers (13) are alternately stacked on both sides of a core substrate (11) and the outermost conductor wiring layer is covered with a surface insulating resin layer (16), wherein in a mounting area (10) of a semiconductor device, the surface insulating resin layer (16) formed on the interlayer insulating resin layer (13) is removed like a quadrilateral in an area other than the conductor lands (14a) and immediately below the semiconductor device to leave a removed portion (17) at the center of the mounting area (10), the conductor lands (14a) being bonded to external electrodes of the semiconductor device.

Abstract: An etching method for plasma-etching a low-k film, wherein the plasma etching is conducted under an etching gas atmosphere including a fluorocarbon gas, O2 gas and Ar gas, and under the conditions of a pressure of 60 mTorr (7999.32 mPa) or higher and a high-frequency output (RF power) of 600 W or less.

Abstract: A manufacturing process of an emboss type flexible or rigid printed circuit board includes multiple steps. First, a layer of dry film is applied to a layer of copper foil. Then a circuit pattern is formed on the copper foil through photolithography processes. An etching stop layer is electroplated on the circuit pattern. The etching stop layer is then electroplated with copper. The copper foil is softened by a high temperature process after removing the dry film. Then the layer of the copper foil is etched after coating with an organic surface layer and the organic surface layer is solidified.