Abstract: A method of processing a metal layer on a substrate. The method comprises disposing the substrate in a chamber having a dielectric member and processing gas. An interior surface of the dielectric member is heated to a temperature above about 150° C. and the metal layer is processed when processing power is passed through the heated dielectric member. Heating of the interior surface of the dielectric member essentially prevents deposits from forming on the interior surface and allows a stable power transmission through the dielectric member.

Abstract: The invention generally provides an apparatus and a method of removing metal oxides, particularly copper oxides and aluminum oxides, from a substrate surface. Primarily, the invention eliminates sputtering of copper oxide from the bottom of an interconnect feature onto the side walls of an interconnect feature, thereby preventing diffusion of the copper atom through the dielectric material and degradation of the device. The invention also eliminates sputtering of the copper oxides onto the chamber side walls that may eventually flake off and cause defects on the substrate. The method of reducing metal oxides from a substrate surface comprises placing the substrate within a plasma processing chamber, flowing a processing gas comprising hydrogen into the chamber, and maintaining a plasma of the processing gas within the chamber through inductive coupling.

Abstract: A process for the synthesis of carbon coatings on the surface of metal carbides, preferably SiC, by etching in a halogen-containing gaseous etchant, and optionally hydrogen gas, leading to the formation of a carbon layer on the metal carbide. The reaction is performed in gas mixtures containing 0 to two moles of hydrogen for every two moles of halogen gas, preferably about 0.5 to one mole of hydrogen gas for eery two moles of halogen gas, at temperatures from about 100° C. to about 4,000° C., preferably about 800° C. to about 1,000° C., over any time range, maintaining a pressure of preferably about one atmosphere.

Abstract: A method for structuring at least one layer to be structured. Initially, a mask is applied to the layer and the layer is structured using the mask. After the structuring step, the mask is then removed, while leaving behind redepositions of the material of the layer. The redepositions of the material of the layer are then removed by sound action.

Abstract: A method of manufacturing a compound layer, containing a nitrified metal as a major component thereof and having a predetermined microstructure pattern, includes: an ion implantation step for implanting hydrogen ions into a predetermined region of a compound layer formed on a substrate to form an implanted region; and an etching step for selectively etching the implanted region by using a gas containing at least oxygen, to remove the implanted region of the compound layer while maintaining the other region as a microstructure pattern. By introducing a halogen element like fluorine in addition to hydrogen, fabrication of the pattern can be executed more reliably and more easily. As a result, volatility of reaction products produced upon etching the compound layer is enhanced, and micro-loading effects are suppressed.

Abstract: Disclosed is an inventive method for etching a gold metallization in a plasma processing chamber. The method includes introducing a substrate having a gold layer and an overlying titanium hardmask layer into the plasma processing chamber. The hardmask is first etched using conventional etching techniques. Then a plasma is formed in the chamber from an oxidizing gas and an etching gas. The etching gas is preferably a hydrochloric acid containing gas which may contain a chlorine containing gas. In addition, N2 may be provided. The plasma is then used to etch the gold layer through the TiN or TiW hardmask.

Abstract: A method of low-damage, anisotropic etching of substrates including mounting the substrate upon a mechanical support located within an ac or dc plasma reactor. The mechanical support is independent of the plasma reactor generating apparatus and capable of being electrically biased. The substrate is subjected to a plasma of low-energy electrons and a species reactive with the substrate. An additional structure capable of being electrically biased can be placed within the plasma to control further the extraction or retardation of particles from the plasma.

Abstract: A sputtering target is provided which provides early stabilization of the film-deposition rate of the sputtering target from its initial stage of use. The sputtering target surface subjected to erosion is formed with a surface-deformed layer. The surface-deformed layer is reduced by precision machining and removed by etching. The extent of etching is controlled so that the surface roughness (Ra) is in a range between 0.1% and 10% of the mean crystal grain diameter of the material constituting the target. The surface roughness (Ra) is defined as the mean roughness on the center line of the surface.

Abstract: A semiconductor dry etching process that provides deep, smooth, and vertical etching of InP-based materials using a chlorinated plasma with the addition of nitrogen (N2) gas. Etching of InP-based semiconductors using an appropriate Cl2/N2 mixture without any additional gases provides improved surface morphology, anisotropy and etch rates.

Abstract: A method of fabricating a semiconductor device comprises the steps of: (a) forming a mask layer over an upper surface of a semiconductor substrate such that the mask layer has an aperture penetrating the mask layer and having an inclined lateral wall so as to make the aperture inverted taper shaped; (b) forming a first dielectric layer at a first area over the upper surface of the semiconductor substrate within the aperture by sputtering at a first sputtering incidence direction; and (c) forming a first electrode layer at a second area over the upper surface of the semiconductor substrate within the aperture by sputtering at a second sputtering incidence direction which is different from the first sputtering incidence direction.

Abstract: The present invention is embodied in a method and apparatus for etching an organic anti-reflective coating (OARC) layer and a titanium nitride anti-reflective coating (TiN ARC) layer deposited on a substrate located within a processing chamber, without the need for removing the substrate being processed from the processing chamber in which it is situated and without the need for intervening processing steps, such as chamber cleaning operations. The substrate has a base, an underlying oxide layer above the base, an overlying layer above the underlying layer, a middle conductive layer, a TiN ARC layer, and a top OARC layer spun on top of the TiN ARC.

Abstract: A process for removing and/or dry etching noble metal-based material structures, e.g., iridium for electrode formation for a microelectronic device. Etch species are provided by plasma formation involving energization of one or more halogenated organic and/or inorganic substance, and the etchant medium including such etch species and oxidizing gas is contacted with the noble metal-based material under etching conditions. The plasma formation and the contacting of the plasma with the noble metal-based material can be carried out in a downstream microwave processing system to provide processing suitable for high-rate fabrication of microelectronic devices and precursor structures in which the noble metal forms an electrode, or other conductive element or feature of the product article.

Abstract: Compositely micro-textured thin film, magnetic disc media, with methods and apparatus for producing such, which are characterized by the incorporation of a first stage of micro-texturing provided by etching of a disc substrate, with a second, disparate, micro-texturing stage depositing rounded globules of eutectic alloy on the etched substrate.

Abstract: An etching gas mixture for a transition metal thin film, and an etching method using the etching gas mixture are provided. The etching gas mixture is composed of two gases. The first gas is one selected from the group consisting of halogen gas, halide gas, halogen gas mixture, halide gas mixture and gas mixture of halogen and halide. The second gas is one selected from the group consisting of carbon oxide gas, hydrocarbon gas, nitrogen oxide gas and nitrogen-containing gas. The etching gas mixture reacts with the transition metal thin film to form a highly volatile metal halide, so that a fine pattern can be formed with a high selectivity.

Abstract: A method and apparatus for etching of a substrate comprising both a polysilicon layer and an overlying tungsten layer. The method comprises etching the tungsten layer in a chamber using a plasma formed from a gas mixture comprising a fluorinated gas (such as CF4, NF3, SF6, and the like) and oxygen.

Abstract: A metal etching process. A glue/barrier layer, a metal layer and an anti-refeletion layer are formed on a substrate. A three-stage etching step is performed. A break through step of etching is performed to pattern the glue/barrier layer. A main etching step is performed on the metal layer with chlorine, boron trichloride, and trifluoro-methane as etching gases. The trifluoro-methane is advantageous to produce a polymer during etching, so that the profile of the metal layer appears atilt. An over-etching step is then performed to ensure an insulation between neighboring wiring lines.

Abstract: The method of making the magnetic resistance element comprises the steps of: forming a first magnetizable layer, a non-magnetizable layer and a second magnetizable layer, in this order, on an insulating layer; providing a resist layer for forming a main part of the magnetic resistance element on the second magnetizable layer; etching side faces of the first magnetizable layer, the non-magnetizable layer and the second magnetizable layer to form into slope faces by ion milling from the second magnetizable layer side; forming terminals on the slope faces; and removing the resist layer, wherein a part of the first megnetizable layer which is located outside of the slope faces is left on the insulating layer when the side faces of the first magnetizable layer, the non-magnetizable layer and the second magnetizable layer are etched by ion milling.

Abstract: A method of etching an electrode layer (e.g., a platinum electrode layer or an iridium electrode layer) disposed on a substrate to produce a semiconductor device including a plurality of electrodes separated by a distance equal to or less than about 0.3 &mgr;m and having a profile equal to or greater than about 85°. The method comprises heating the substrate to a temperature greater than about 150° C., and etching the electrode layer by employing a high density inductively coupled plasma of an etchant gas comprising oxygen and/or chlorine, argon and a gas selected from the group consisting of BCl3, HBr, HCl and mixtures thereof. A semiconductor device having a substrate and a plurality of electrodes supported by the substrate. The electrodes have a dimension (e.g., a width) which include a value equal to or less than about 0.3 &mgr;m and a profile equal to or greater than about 85°.

Abstract: Dry etching of a metal oxide film exposed without being coated with a photoresist is carried out with plasma of a gas obtained by mixing hydrogen iodide with at least one gas selected from the group consisting of a group consisting of fluorine gas and fluorine-based compound gases and a group consisting of nitrogen gas and nitrogen-based compound gases, and then after the exposing of the above mentioned photoresist film to plasma of oxygen gas, the remaining photoresist film is removed by etching with plasma of a gas obtained by mixing oxygen gas with at least one gas selected from the group consisting of a group consisting of fluorine gas and fluorine-based compound gases and a group consisting of nitrogen gas and nitrogen-based compound gases.

Abstract: Field emission display and method for fabricating the same, the field emission display including a cathode array having a cathode electrode formed on a substrate, insulating layers and carbon nanotube films for use as emitter electrodes formed alternately on the cathode electrode, and a gate electrode formed on the insulating layer, thereby permitting fabrication of a large sized cathode plate at a low cost because the film is formed by screen printing and exposure, which can reduce the cumbersome steps in fabrication of the related art Spindt emitter tip, and both a low voltage and a high voltage FEDs because the carbon nanotube film used as the emitter has a low work function, with an easy and stable electron emission capability.

Abstract: The invention includes a process for the production of semiconductor devices comprising the steps of depositing a metal layer on a semiconductor substrate, depositing a hardmask layer on said metal layer, depositing a photoresist on said hardmask layer, patterning said photoresist, thereby exposing and patterning portions of said hardmask layer, etching said exposed portions of said hardmask layer with a hardmask etchant, thereby exposing and patterning portions of said metal layer, removing, or not, said photoresist, and etching said exposed portions of said metal layer with a metal etchant and semiconductor devices made by said process.

Abstract: In order to provide a method of treating a multilayer including metal and polysilicon for use in a conductor or a gate electrode of a semiconductor device with high accuracy at a high selectivity, the temperature of a sample is maintained at 100° C. or higher at the time of etching a metal film to increase the etch rate of the metal film. In order to suppress the etch rate of a polysilicon film and prevent side etching, an oxygen gas is added to a gas containing a halogen element. In order to suppress the etch rate of a silicon oxide film at the time of etching the polysilicon film, the etching is performed with etch parameters which are divided into those for the metal film and those for the polysilicon film. In the etching performed to the multilayer containing metal and polysilicon, by etching the metal film at a high temperature of 100° C. or higher, the etch rate of the metal film becomes high. Consequently, there is no partial etch residue of the metal film and a barrier film.

Abstract: A method for forming a patterned platinum layer on a microelectronic substrate includes the steps of forming a platinum layer on the microelectronic substrate, and forming a mask layer on the platinum layer. In particular, the mask layer defines exposed portions of the platinum layer, and the mask layer comprises a mask material including titanium. The exposed portions of the platinum layer are then selectively removed to form the patterned platinum layer. Related structures are also disclosed.

Abstract: A silicon article including a silicon base and columns extending from the silicon base. The columns define a gap between the columns which is devoid of material so that the article can act as a filter or heat sink. Also disclosed is a method of making the silicon article.

Abstract: A method of retaining the integrity of a photoresist pattern is provided where the patterned photoresist is treated prior to etching the principle layer. The pre-etch treatment encompasses a plasma treatment. In some embodiments employing an anti-reflective coating (ARC) layer, an isolation/protective layer is used to isolate the ARC from the photoresist. In some embodiments, the pre-etch treatment, advantageously provides for patterning the isolation/protection layer.

Abstract: A simplified method is disclosed for etching low k organic dielectric film. A substrate is provided with a hardmask layer and low k organic dielectric layer formed thereon in which hardmask layer is on the dielectric layer. A layer of photoresist is formed on the hardmask layer and imaged with a pattern by exposure through a dark field mask. As a key step, the pattern is transferred into the hardmask layer by dry etching and then the photoresist is stripped in-situ. Then, the interconnect is formed by using dry etching the low k organic dielectric layer using the hardmask layer as a mask, and readying it for the next semiconductor process.

Abstract: The method includes forming a metal layer over a substrate. Subsequently, a discrete dot masking is deposited on the surface of the metal layer. A discrete rugged polysilicon or hemispherical grained silicon (HSG-Si) can be chosen as the discrete dot masking. The source gas used to form the discrete rugged polysilicon includes Si2H6 at a temperature of about 400 to 450° C. An anisotropically etching step is performed to etch the metal layer by using the discrete dot masking as an etching mask, thereby forming a surface pattern formed thereon. Then, the discrete dot masking is removed. The metal layer is patterned to a conductive line pattern. An organic material layer with low dielectric constant is formed on the patterned metal layer. A silicon oxide layer is successively formed on the organic material layer, followed by polishing the silicon oxide layer using a chemical mechanical polishing (CMP).

Abstract: A method of forming an iridium-based electrode structure on a substrate, from an iridium-containing precursor thereof which is decomposed to deposit iridium on the substrate. The iridium-based material is formed on the substrate in a desired environment, e.g., an oxidizing ambient environment which may for example contain an oxidizing gas such as oxygen, ozone, air, or nitrogen oxide, or alternatively a reducing environment containing a reducing agent such as H.sub.2, CO or NH.sub.3. The iridium deposited on the substrate is contacted with an etching reagent such as halogen-based etch species (e.g., Cl.sub.2, Br.sub.2, F.sub.2, CCl.sub.4, Si.sub.2 F.sub.6, SiCl.sub.4, NF.sub.3, C.sub.2 F.sub.6, SF.sub.6, or CF.sub.4) formed by exposing halogen to light, laser radiation, plasma, or ion beam, or alternatively with XeF.sub.2, for sufficient time and under sufficient conditions to etch the deposited iridium-based material and form the etched iridium-based electrode structure.

Abstract: A method for depositing dielectric material into gaps between wiring lines in the formation of a semiconductor device includes the formation of a cap layer and the formation of gaps into which high density plasma chemical vapor deposition (HDPCVD) dielectric material is deposited. First and second antireflective coatings may be formed on the wiring line layer, the first and second antireflective coatings being made from different materials. Both antireflective coatings and the wiring line layer are etched through to form wiring lines separated by gaps. The gaps between wiring lines may be filled using high density plasma chemical vapor deposition.

Abstract: A new method of etching metal lines using SF.sub.6 gas during the overetch step to prevent undercutting of the anti-reflective coating layer is described. Semiconductor device structures are provided in and on a semiconductor substrate. The semiconductor device structures are covered with an insulating layer. A barrier metal layer is deposited overlying the insulating layer. A metal layer is deposited overlying the barrier metal layer. A silicon oxide layer is deposited overlying the metal layer. The silicon oxide layer is covered with a layer of photoresist which is exposed, developed, and patterned to form the desired photoresist mask. The silicon oxide layer is etched away where it is not covered by the photoresist mask leaving a patterned hard mask. The metal layer is etched away where it is not covered by the patterned hard mask to form metal lines. Overetching is performed to remove the barrier layer where it is not covered by the hard mask wherein SF.sub.

Abstract: A method in a plasma processing chamber for etching through a selected portion of a metallization layer of a wafer's layer stack. The method includes the step of etching at least partially through the metallization layer of the layer stack with an etchant source gas that consists essentially of chlorine and nitrogen. In another embodiment, the metallization layer comprises aluminum, and the flow ratio of the chlorine to the nitrogen ranges from about 1:1 to about 10:1. More preferably, the flow ratio of the chlorine to the nitrogen ranges from about 1:1 to about 4:1 and preferably ranges from about 1:1 to about 2:1.

Abstract: In one embodiment, the present invention relates to a method of etching tantalum disposed over a dielectric layer, involving etching at least a portion of the tantalum using a tantalum etch gas mixture containing from about 300 sccm to about 400 sccm of CF.sub.4 and about 200 sccm to about 600 sccm of oxygen at a temperature from about 100.degree. C. to about 150.degree. C. under a pressure from about 1 torr to about 1.5 torr. In another embodiment, the present invention relates to a method of etching at least a portion of a tantalum barrier layer, the tantalum barrier layer at least partially surrounding a copper or copper alloy interconnect, involving etching at least a portion of the tantalum barrier layer using a tantalum etch gas mixture containing from about 300 sccm to about 400 sccm of CF.sub.4 and about 200 sccm to about 600 sccm of oxygen.

Abstract: Methods and compositions for improving etch rate selectivity of photoresist to substrate material in a downstream microwave dry stripping process in the fabrication of semiconductor integrated (IC) circuits are provided. Significant improvement in selectivity is demonstrated with the addition of N.sub.2 to an etchant gas mixture of O.sub.2 and CF.sub.4.

Abstract: A method for etching platinum in which used are an etch gas and a mask having a good etch ratio with platinum when a lower electrode is made of platinum is disclosed, including the steps of depositing a platinum layer on an insulator; depositing on the platinum layer a mask layer having a high selectivity with the platinum layer; patterning the mask layer to be spaced apart by a predetermined distance; and implanting an etch gas making an etch ratio of the platinum layer and the mask layer more than 2 to etch the platinum layer by using the mask layer.

Abstract: A polysilicon layer is formed on a silicon substrate. A resist film, which has a pattern of remaining portions and opening portions, is formed on the polysilicon layer. The silicon substrate is placed in a reaction chamber, an etch gas is introduced into the reaction chamber, and the introduced gas becomes ionized whereupon dry etching is performed to selectively etch away the polysilicon layer to form projections underneath the remaining portions and recesses underneath the opening portions. By controlling the pressure of the etch gas to fall within a range above 5 millitorr and the flow rate of the etch gas to fall within a range above 100 sccm, both the rate that an etch product is discharged above a recess and the rate that an etch product sticks to a projection sidewall are controlled. Such arrangement not only reduces a critical dimension difference (i.e.

Abstract: A process for producing a strip removes photoresist and extraneous deposits of polymer residue on the top surface and sidewalls of a post-metal etch wafer. The photoresist and residue are processed simultaneously by a chemical mechanism comprising reactive species derived from a microwave-excited fluorine-containing downstream gas, and a physical mechanism comprising ion bombardment that results from a radio frequency excited plasma and accompanying wafer self bias. A vacuum pump draws stripped photoresist and residues from the surface of the wafer and exhausts them from the chamber.

Abstract: A method of fabricating an overcoated printed circuit board having a clean area free of contamination from the overcoating material. A metal-clad substrate is etched to form first and second printed circuit traces on the substrate. The first and second printed circuit traces define a channel having first and second ends. A layer of soldermask is deposited onto the substrate to cover a portion of the first and second printed circuit traces and to cover the channel except at an aperture. The aperture includes the intended clean area. The first and second printed circuit traces and the channel are covered with a capping device. An overcoating material is applied to the printed circuit board. During the applying step, the overcoating material is allowed to infiltrate into the channel under the capping device at the first and second ends, but is not allowed to reach the aperture.

Abstract: An etching method includes the steps of supplying, to the gap between two powered electrodes, a gas capable of discharge which may be produced by adding water to helium and mixing a substance of chlorine, bromine or iodine or a compound containing chlorine, bromine or iodine; applying a RF voltage to the electrodes to produce gaseous discharge between the electrodes and the grounded stage having a material to be processed, thereon i.e., a glass substrate, at a pressure close to or at atmospheric pressure; and exposing the surface of the glass substrate to active species of the gas capable of discharge, which are produced by the discharge, to thus etch an ITO film on the surface of the substrate. The method is capable of removing a metal or a metallic compound containing a metal such as Au, Al, In, Sn or the like, which cannot be easily removed by conventional etching under atmospheric pressure, by producing a compound having a low boiling point or sublimation point and vaporizing it.

Abstract: A method for etching. The etching process is to form an opening within the material layer on the substrate and then form a patterned layer on the material layer. An etching gas, an inert gas/hydrogen and an inert gas are pumped into the chamber. The inert gas is used to decrease the surface temperature of the patterned layer and a polymer thin film layer can be formed easily on the surface of the patterned layer. The opening is then formed by defining the material layer with the patterned layer. In addition, the thin film can not be formed on the bottom of the opening by raising the temperature of the substrate.

Abstract: A method for minimizing the critical dimension growth of a feature on a semiconductor wafer includes performing an etch operation in a reactor 20 and controlling the temperature of the wafer 26 by controlling the pressure of the gas contacting the backside of the wafer 26 and/or providing a heat source 56 such as for example in the chuck 46 or electrode 28 associated with the wafer 26 in order to heat the wafer 26.

Abstract: A vacuum seal suitable for use with field emission arrays is described. This seal has high reliability because the expansion coefficients of the metal and the glass are closely matched. Materials traditionally used for cathode and gate lines continue to be employed. To achieve this, a gap is introduced into each conductive line near the edges of the display. This gap is bridged by a material having an expansion coefficient that more closely matches that of the glass used for the seal and is the only material that contacts the seal. The bridge may be in the form of a deposited layer or it may be a discrete wire. A description of how the structure is manufactured is also provided.

Abstract: A process for plasma etching metal films comprising the steps of forming a noble gas plasma, then transporting the noble gas plasma to a mixing chamber. An organohalide is added to the noble gas plasma in the mixing chamber. The organohalide is selected to have a vapor pressure allowing the formation of activated complexes to etch the metal films and form organometallic compounds as the etch byproducts. The activated complexes thus formed are transported downstream to an etching chamber. In the etching chamber the selected substrate is exposed to the activated complexes, causing the substrate to be etched and organometallic compounds to be formed as byproducts from the reaction of the activated complexes and etching of the substrate. The organometallic byproducts can then be removed from the etch chamber.

Abstract: A target for sputtering is subjected to a surface treatment process and special packaging after target manufacture for improved sputtering performance and process and yield by reducing particulates. The sputtering target is first surface treated to remove oxides, impurities and contaminants. The surface treated target is then covered with a metallic enclosure and, optionally, a passivating barrier layer. The metallic enclosure protects the target surface from direct contact with subsequently employed packaging material such as plastic bags, thereby eliminating sources of organic materials during sputtering operations. The surface treatment of the target removes deformed material, smearing, twins, or burrs and the like from the target surface, reducing "burn-in" or sputter conditioning time prior to production sputtering of thin films.

Abstract: A process of patterning magnetic multilayer films including the steps of successively depositing a plurality of magnetic multilayer films on a supporting substrate, selectively removing portions of the plurality of magnetic multilayer films using a reactive plasma etch including chlorine gas, and passivating in situ, or an adjacent evacuated chamber, remaining portions of the plurality of magnetic multilayer films, i.e. the memory elements, in a post-etch fluorinated plasma.

Abstract: A catalytic method and an apparatus for selectively removing material from a solid substrate is provided. The method comprises contacting a surface of a solid substrate with a catalyst material in the presence of a reactant under conditions effective to selectively remove material from those areas of said solid substrate in contact with said catalyst material and said reactant.

Abstract: A method for forming a patterned microelectronics layer within a microelectronics fabrication. There is first provided a substrate employed within a microelectronics fabrication. There is then formed over the substrate an oxygen containing plasma etchable microelectronics layer. There is then formed upon the oxygen containing plasma etchable microelectronics layer a hard mask layer. There is then formed upon the hard mask layer a patterned photoresist layer. There is then etched through use of a first anisotropic plasma etch method the hard mask layer to form a patterned hard mask layer while employing the patterned photoresist layer as a first etch mask layer. The first anisotropic plasma etch method employs an etchant gas composition appropriate for etching a hard mask material from which is formed the hard mask layer.

Abstract: The plasma descaling process of the present invention removes surface oxides selectively from structural metal surfaces, especially titanium and its alloys, and, with appropriate control of the reaction temperature, is self-limiting to avoid cracking problems otherwise associated with intergranular attack. In a preferred embodiment of the present invention, a fluoride plasma reacts with surface oxides on a titanium alloy to remove scale and alpha case in a temperature controlled chamber without attacking the underlying crystalline metal to cause intergranular attack. Properly controlled by regulating the chamber temperature, the plasma reaction terminates when the plasma has removed the surface oxides and encounters the underlying crystalline metal. The product is a metal surface free of scale and alpha case and free of intergranular attack. The plasma descaling process replaces conventional metal finishing processes, such as chemical milling or etching.

Abstract: Copper can be pattern etched in a manner which provides the desired feature dimension and integrity, at acceptable rates, and with selectivity over adjacent materials. To provide for feature integrity, the portion of the copper feature surface which has been etched to the desired dimensions and shape must be protected during the etching of adjacent feature surfaces. To avoid the trapping of reactive species interior of the etched copper surface, hydrogen is applied to that surface. Hydrogen is adsorbed on the copper exterior surface and may be absorbed into the exterior surface of the copper, so that it is available to react with species which would otherwise penetrate that exterior surface and react with the copper interior to that surface. Sufficient hydrogen must be applied to the exterior surface of the etched portion of the copper feature to prevent incident reactive species present due to etching of adjacent feature surfaces from penetrating the previously etched feature exterior surface.

Abstract: A method for etching a metal layer of a semiconductor device is provided. A metal layer formed on a substrate is etched using a hard mask and a mixed etching gas containing chlorine and oxygen in which the ratio of oxygen gas is preferably about 0.5-0.8. Under such conditions, a metal layer pattern of a fine profile is formed. Since the hard mask is thin, it is possible to prevent etch reactants generated in a process of etching the metal layer from being deposited on the side surface of the resultant formed of the metal layer pattern and the hard mask. As a result, no additional processing is required to remove the etch reactants from the side surfaces and the metal layer etching process is simplified.

Abstract: The invention provides a method of removing surface scale from a titanium or titanium alloy substrate. The method includes the steps of heating the substrate to a temperature in the range from about 100.degree. C. to about 600.degree. C., and thereafter subjecting the heated surface to a plasma formed from a gas selected from the group of consisting of CF.sub.4 and SF.sub.6. The plasma reacts with the surface scale, removing the scale, without attacking the underlying crystalline titanium or titanium alloy. Properly controlled, the plasma reaction terminates when the plasma has penetrated the scale, and encounters the underlying crystalline metal. As a result, the method of the invention is capable of uniform removal of the entire surface scale of a crystalline titanium-containing substrate, without intergranular attack of the substrate.