Simultaneous Bonding Of Multiple Joints (e.g., Dip Soldering Of Printed Circuit Boards) Patents (Class 228/180.1)
  • Patent number: 6758387
    Abstract: The present invention is a solder coated material having a large amount of solder adhered to a difficult to solder material such as Kovar or Alloy 42 and a method which can adhere a sufficient amount of solder to a difficult to solder material without using flux. An electroplated coating is applied to a portion to be soldered of a difficult to solder material, the difficult to solder material is then passed through molten solder to which ultrasonic waves are applied, and a large amount of solder is adhered only to solder plated portions.
    Type: Grant
    Filed: August 20, 2001
    Date of Patent: July 6, 2004
    Assignee: Senju Metal Industry Co., Ltd.
    Inventor: Mitsuo Zen
  • Patent number: 6752310
    Abstract: The invention relates to an electrically conductive wire (1) comprising two spaced solder balls (2) thereon and flux (4) in the space (3) between the solder balls for making a circuit connection between electrically conductive members on opposite surfaces of a substrate. The wire (1) is inserted in a through-hole of the substrate and soldered by a customary soldering process, like wave soldering.
    Type: Grant
    Filed: December 11, 2001
    Date of Patent: June 22, 2004
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Eddy W. Vanhoutte, Gilbert De Clercq
  • Patent number: 6732907
    Abstract: A soldering method including: bonding a first electronic component having electrodes plated with a material containing lead to one surface of an interconnect substrate through solder containing no lead; and flow-soldering to bond a second electronic component to the other surface of the interconnect substrate. In the soldering method, a joint section between the first electronic component and the interconnect substrate is heated at the same time as or after the step of flow soldering to melt the joint section.
    Type: Grant
    Filed: March 5, 2002
    Date of Patent: May 11, 2004
    Assignee: Seiko Epson Corporation
    Inventor: Ikuya Miyazawa
  • Patent number: 6729532
    Abstract: A component mounting method for mounting several micro component chips aligned in parallel onto a board by soldering. An allowable offset is set for each electrode, taking into account a self-alignment effect of melted solder in soldering for bonding component terminals onto electrodes formed on the board corresponding to a component layout. Solder printing and component placement onto the electrodes are shifted by the offset. This offset is balanced by the self-alignment effect of melted solder, and each component is secured at an appropriate position. This mounting method allows less stringent spacing conditions to be applied for mounting and prevents the occurrence of defects during printing and placement.
    Type: Grant
    Filed: October 25, 2001
    Date of Patent: May 4, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masafumi Inoue, Yusuke Yamamoto, Hikaru Onizaki, Yoichi Yanai, Yasuhiro Morimitsu
  • Patent number: 6722558
    Abstract: A system and method of joining together first and second electric terminals includes providing the second terminal with an aperture extending therethrough and a notch therein. The first and second terminals are positioned in overlapping relationship with one another so the aperture overlaps the first terminal to provide access to the first terminal through the second terminal, and so the notch overlaps the first terminal. Heat is applied to the first terminal through the aperture in the second terminal to heat the first and second terminals. The end of a solder wire is positioned in engagement with the notch of the heated second terminal to locate the solder wire with respect to the terminals and to melt the solder wire to form a solder pool that contacts the first and second terminals.
    Type: Grant
    Filed: July 31, 2002
    Date of Patent: April 20, 2004
    Assignee: Robert Bosch Corporation
    Inventors: Dean Smith, James Frey, Richard Kidd, Andreas Herrmann
  • Patent number: 6722028
    Abstract: A method of manufacturing an electronic device including a first electronic component mounted on one main surface of a wiring board by being thermo-compression bonded by means of a thermo-compression bonding tool with an adhesive resin interposed between a first area of the one main surface of the wiring board and the first electronic component, and a second electronic component mounted on a second area different from the first area of the one main surface of the wiring board by melting a soldering paste material and higher than the first electronic component in post-mounting height, and wherein the first electronic component is mounted before the mounting of the second electronic component.
    Type: Grant
    Filed: February 4, 2003
    Date of Patent: April 20, 2004
    Assignees: Renesas Technology Corp., Hitachi Hokkai Semiconductor, Ltd.
    Inventor: Shigeru Nakamura
  • Publication number: 20040065718
    Abstract: A method for soldering an electronic component is provided. A first solder land containing copper and a second solder land are formed on a surface of a circuit board. A first solder section composed of a Sn—Ag—Cu solder material is formed on each of the first and the second solder lands, and a terminal of an electronic component chip is mounted on the first solder land. The first solder land and the terminal are fusion-bonded. A second solder section composed of a Sn—Zn solder material is formed on the first solder section disposed on the second solder land. A lead terminal of another electronic component is inserted into a terminal hole formed near the second solder land; and the second solder section and the lead terminal are heated at a temperature lower than the temperature in step (d) to connect the lead terminal to the second solder section by fusion bonding.
    Type: Application
    Filed: October 1, 2003
    Publication date: April 8, 2004
    Applicant: Alps Electric Co., Ltd.
    Inventors: Teruyoshi Kubokawa, Kunio Kosaka, Takafumi Nomura
  • Publication number: 20040046005
    Abstract: Disclosed are a stack package and a method of manufacturing the same, which has improved electrical properties by virtue of a reduced signal line length, and also allows reduction of production costs of the stack package. The stack package of the present invention comprises panels having an area for mounting respective CSP packages and pin-shaped connectors. The panels comprise circuit patterns for electrical connection to the CSP packages, which are formed at portions of the panels corresponding to the CSP packages to be mounted. Also, the panels have first openings for electrical connection to the circuit patterns, which are formed at both sides of the circuit patterns. The pin-shaped connectors are inserted through the first openings of the panels. The panels are stacked in at least two layers in such a manner that the first openings of one panel correspond to the first openings of the other panels, so that the connectors are electrically connected to the circuit patterns of the stacked panels.
    Type: Application
    Filed: October 25, 2002
    Publication date: March 11, 2004
    Inventor: Ki Bon Cha
  • Publication number: 20040046006
    Abstract: A method of providing thermal vias in a printed circuit board that includes one or more layers of board material is disclosed. The vias provide for conducting heat from components mounted on the board. One or more holes (4) are provided in a printed circuit board that may include several metal layers. A metal ball (6) is inserted into each hole and subjected to pressure such as to deform said ball, and tightly fixating the resultant slug against the wall (5) of said hole. The deformed ball or slug fixed in the hole, which may have a metallised inner surface, functions to conduct heat and/or electricity between a metallised topside (2) and bottom side (3) of the printed circuit board and also between intermediate metallised layers in the case of a multi-layer board.
    Type: Application
    Filed: June 30, 2003
    Publication date: March 11, 2004
    Inventor: Lars-Anders Olofsson
  • Patent number: 6685080
    Abstract: A method for reworking a ball grid array (BGA) of solder balls including one or more defective solder balls on an electronic component workpiece using a single-ball extractor/placer apparatus having a heatable capillary tube pickup head optionally augmented with vacuum suction. A defective solder ball is identified, extracted by the pickup head and disposed of. A nondefective solder ball is picked up by the pickup head, positioned on the vacated attachment site, and thermally softened for attachment to the workpiece. Flux may be first applied to the replacement solder ball or to the vacated attachment site. The extractor/placer apparatus may be automated to locate, extract and replace defective balls for completion of a fully operable BGA.
    Type: Grant
    Filed: October 20, 2000
    Date of Patent: February 3, 2004
    Assignee: Micron Technolgy, Inc.
    Inventors: Kwan Yew Kee, Chew Boon Ngee, Keith Wong Bing Chiang
  • Patent number: 6672500
    Abstract: A method and an arrangement for measuring the cooling rate and temperature differential between the top and bottom surfaces of a printed circuit board. The method is intended to facilitate control over the temperature differential which is encountered between the top and bottom of the printed circuit board so as to prevent warpage thereof during the formation of solder joints in a reflow solder oven.
    Type: Grant
    Filed: March 7, 2001
    Date of Patent: January 6, 2004
    Assignee: International Business Machines Corporation
    Inventors: David V. Caletka, Kevin Knadle, Charles G. Woychik
  • Patent number: 6648211
    Abstract: A pin standing resin substrate including a resin substrate having a substantially plate-shaped main surface and composed of one of a resin and a composite material containing a resin, and having a pin-pad exposed from the main surface; and a pin soldered to the pin-pad, wherein the pin has been thermally treated by heating so as to soften the pin. The pin has a rod-like portion composed of a copper base metal and an enlarged diameter portion made of the same material as the rod-like portion. The enlarged diameter portion has a larger diameter than the rod-like portion and is formed at one end of the rod-like portion. At least the enlarged diameter portion is soldered to the pin-pad. Also disclosed is a method of making the pin standing resin substrate, a pin for bonding with the resin substrate, and a method of making the pin.
    Type: Grant
    Filed: July 31, 2001
    Date of Patent: November 18, 2003
    Assignee: NGK Spark Plug Co., Ltd.
    Inventors: Hajime Saiki, Noritaka Miyamoto
  • Patent number: 6643920
    Abstract: An electronic component comprises a substrate having a surface on which an electrode is formed and an SAW circuit element having a surface on which a circuit is formed. The circuit element is held such that the surface of the circuit element and the surface of the substrate are opposed to each other. A bump electrode joins the circuit on the circuit element and the electrode of the substrate together, and a sealing material joins the circuit element and the substrate together in the periphery of the space between the circuit-forming surface of the circuit element and the substrate. The space between the circuit-forming surface of the circuit element and the substrate is hermetically sealed by the circuit element, the substrate, and the sealing material. Advantageously, a low-temperature soldering material such as solder, or an adhesive, is used as the sealing material.
    Type: Grant
    Filed: June 14, 2002
    Date of Patent: November 11, 2003
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Yoshitsugu Hori
  • Patent number: 6635308
    Abstract: This abstract is being provided in accordance with the provisions of Section 1.72 of the Rules of Practice in Patent and Trademark Cases (37 CFR). The applicant intends that this abstract be used only to aid in determining the general nature of the technical disclosure. The applicant does not intend that this abstract be looked to in order to aid or assist in the determination of the scope of any claim. An electronics board (150) is retained by an arrangement of support members (120) or support pins (620) during manufacturing operations conducted on the electronics board (150). The arrangement corresponds to the locations on the electronics board where support members (120) can be placed without interfering with components mounted to the electronics board (150). This information is used to form a transparent template (110, 610) which is placed atop a metallic support plate (100).
    Type: Grant
    Filed: August 22, 2000
    Date of Patent: October 21, 2003
    Assignee: Motorola, Inc.
    Inventors: Jeff Forrest, Ed Allen Klassen, Gregory Charles Wade
  • Patent number: 6595408
    Abstract: An array of solder balls is formed on a first substrate for interconnecting with conductive sites on another substrate. A ball pickup tool picks up balls with a vacuum suction from a fluidized ball reservoir and utilizes a puff of gas to release the solder ball(s) carried thereon to conductive sites of a substrate for bonding thereto. In another embodiment, the bond pads of a substrate are coated with a flux or adhesive and lowered into a fluidized ball reservoir for direct attachment of solder balls.
    Type: Grant
    Filed: October 7, 1998
    Date of Patent: July 22, 2003
    Assignee: Micron Technology, Inc.
    Inventors: Chad A. Cobbley, Michael B. Ball, Marjorie L. Waddel
  • Patent number: 6585149
    Abstract: A packaging method using lead-free solder, characterized by including a reflow-soldering step in which a surface mount device is soldered to a circuit board with a lead-free solder paste; an inserting step in which the lead or terminal of a insertion mount device is inserted into the circuit board; a step in which a warp preventing jig is attached to the circuit board; a flux applying step in which flux is applied to the foregoing circuit board; a preheating step in which, after applying flux, the lower surface of the circuit board is preheated; a flow-soldering step in which the upper surface of the circuit board the lower surface of which was preheated in the preheating step is heated, and by applying lead-free solder paste to the lower surface of the circuit board, the lead or terminal of the insertion mount device is flow-soldered to the circuit board; and a temperature controlling step where temperatures of both surfaces of a circuit board are adjusted, the upper surface of the circuit board is cooled or
    Type: Grant
    Filed: August 13, 2001
    Date of Patent: July 1, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Tetsuya Nakatsuka, Masahide Okamoto, Tomoyuki Ohmura
  • Publication number: 20030110626
    Abstract: Apparatus and methods for placing conductive spheres on prefluxed bond pads of a substrate using a stencil plate with a pattern of through-holes positioned over the bond pads. Conductive spheres are placed in the through-holes by a moving feed mechanism and the spheres drop through the through-holes onto the bond pads. In one embodiment, the feed mechanism is a sphere hopper which crosses the entire through-hole pattern. In another embodiment, a shuttle plate fed spheres from a reservoir and reversibly moves about one-half of the pitch, moving from a non-discharge position to a discharge position.
    Type: Application
    Filed: February 3, 2003
    Publication date: June 19, 2003
    Inventors: Chad A. Cobbley, Michael B. Ball, Marjorie L. Waddel
  • Publication number: 20030111517
    Abstract: An apparatus for locally applying solder to a plurality of sets of preselected conductive areas on each printed circuit board to which component leads are joined. The apparatus includes a flux station with flux nozzles, a preheater station, and a wave solder station with solder nozzles, arranged in line to receive and process printed circuit boards. The flux nozzles and the solder nozzles are arranged in a pattern identical to that of the preselected conductive areas on each of the board. A conveyor system is arranged to simultaneously transporting the boards from one station to another.
    Type: Application
    Filed: December 18, 2002
    Publication date: June 19, 2003
    Inventors: Akira Takaguchi, Masaki Wata, Chikara Numata
  • Patent number: 6577004
    Abstract: A method and apparatus for improving the laminate performance of the solder balls in a BGA package. Specifically, the ball pads on the substrate are configured to increase the shear force necessary to cause delamination of the solder balls. Conductive traces extending planarly from the pads and arranged in specified configurations will increase the shear strength of the pad.
    Type: Grant
    Filed: August 31, 2000
    Date of Patent: June 10, 2003
    Assignee: Micron Technology, Inc.
    Inventors: Brad D. Rumsey, Patrick W. Tandy, William J. Reeder, Stephen F. Moxham, Steven G. Thummel, Dana A. Stoddard, Joseph C. Young
  • Publication number: 20030102357
    Abstract: The invention is directed to techniques for forming a soldered connection using a pin having a channel. The channel enables the pin to form a secure connection with a via (e.g., by facilitating gas percolation out of the via hole during soldering to improve solder flow, by holding solder prior to pin insertion and soldering, or by facilitating accurate pin bending to hold solder or a pin insert prior to pin insertion and soldering) to improve connection system reliability and increase manufacturing yields. In one arrangement, the pin has a surface which includes (i) a first surface area, (ii) a second surface area that is substantially parallel to the first surface area, and (iii) a channel surface area which defines a channel that extends from the first surface area toward the second surface area. To form a soldered connection, the pin is inserted into a cavity defined by a via of a connecting member (e.g., a circuit board), in a direction that is parallel to a central axis of the via.
    Type: Application
    Filed: October 1, 2002
    Publication date: June 5, 2003
    Applicant: EMC Corporation
    Inventor: Stuart D. Downes
  • Publication number: 20030075589
    Abstract: A method for mounting components on an abutted circuit board. The main abutted circuit board has N first circuit boards and N second circuit boards, where N is a positive integer. Each of the abutted circuit boards has a front side and a rear side. The front sides of the first circuit boards abut on the rear sides of the second circuit boards. The method includes placing the circuit boards in a component mounter for mounting a plurality of components on the front sides of the first circuit boards and mounting a plurality of components on the rear sides of the second circuit boards. The method also includes placing the circuit boards in the component mounter for mounting a plurality of components on rear sides of the first circuit boards and mounting a plurality of components on front sides of the second circuit boards.
    Type: Application
    Filed: February 19, 2002
    Publication date: April 24, 2003
    Inventor: Szu-Hsiung Ko
  • Patent number: 6551650
    Abstract: A process for fabricating a solder bump (113) includes providing an inorganic de-wetting substrate (102). In order to form a composite substrate (20), having the desired wetting/dewetting composition, a wetting metal is first applied on the inorganic de-wetting substrate to create at least one wetting metal pad (52). The composite substrate (20) is then dipped or otherwise immersed into a reservoir of liquid solder (106). Next, the composite substrate (20) is redrawn (116), or otherwise removed, from the liquid solder to form solder bumps (113) on the at least one metal wetting pad (52).
    Type: Grant
    Filed: November 9, 2000
    Date of Patent: April 22, 2003
    Assignee: Corning Incorporated
    Inventors: Alain R. Carre, Jurriaan Gerretsen
  • Patent number: 6551863
    Abstract: A method for underfilling and encapsulating a flip chip in one step is disclosed. The flip chip is immersed in a polymer bath to apply a coating of the polymer to the surface of the flip chip except for the distal end of the conductive projections on the flip chip electrically conductive pads. The coated flip chip is exposed to ultraviolet light or heat (e.g., IR radiation) to surface cure a skin over the polymer coating. The skin-cured flip chip is placed on a substrate which is then heated to reflow the conductive material from the projections and to cause the polymer from the coating to underfill the flip chip and thermally cure to encapsulate and underfill the flip chip.
    Type: Grant
    Filed: August 30, 2001
    Date of Patent: April 22, 2003
    Assignee: Micron Technology, Inc.
    Inventors: Farrah J. Johnson, Tongbi Jiang
  • Publication number: 20030071109
    Abstract: An electronic component mounting apparatus removes an electronic component supplied to a part feeder in face-up status and mounts it to a board. A flip-chip supplied from a first holding table is removed and flipped over by a take-out head and then delivered to a mounting head, which mounts the component on the board. A die supplied from a second holding table is picked up directly and mounted to the board by the mounting head. This structure allows a single mounting apparatus to perform both die bonding and flip-chip bonding.
    Type: Application
    Filed: October 10, 2002
    Publication date: April 17, 2003
    Inventor: Kazuo Arikado
  • Patent number: 6547122
    Abstract: A method for mounting components on an abutted circuit board. The main abutted circuit board has N first circuit boards and N second circuit boards, where N is a positive integer. Each of the abutted circuit boards has a front side and a rear side. The front sides of the first circuit boards abut on the rear sides of the second circuit boards. The method includes placing the circuit boards in a component mounter for mounting a plurality of components on the front sides of the first circuit boards and mounting a plurality of components on the rear sides of the second circuit boards. The method also includes placing the circuit boards in the component mounter for mounting a plurality of components on rear sides of the first circuit boards and mounting a plurality of components on front sides of the second circuit boards.
    Type: Grant
    Filed: February 19, 2002
    Date of Patent: April 15, 2003
    Assignee: Acer Incorporated
    Inventor: Szu-Hsiung Ko
  • Patent number: 6548790
    Abstract: A novel apparatus for manufacturing Solid-Solder-Deposit Printed Circuit Boards (SSD-PCBs) by melting solder powder via induction heating consequently forming relatively thick layers of solid solder over the soldering pads of a bare-PCB 230. Solid Solder Deposit (SSD) refers to a relatively thick layer of solid solder metallurgically bonded over the soldering pads of a bare-PCB 230 such as that said SSD-PCB by itself is the source for solder alloy during a subsequent soldering operation. The manufacture of SSD-PCBs provides the electronic assembly industry with ready-to-solder PCBs consequently eliminates the need to use solder paste at the assembly floor. This invention, unlike the prior art for producing SSD-PCBs, utilizes a solder powder pile 232 that is melted by localized electromagnetic induction heating.
    Type: Grant
    Filed: October 30, 2000
    Date of Patent: April 15, 2003
    Inventor: Horacio Andrés Trucco
  • Publication number: 20030066866
    Abstract: A method for locally applying solder to a set of preselected conductor areas on a printed circuit board without causing thermal damage to adjacent sensitive surface mounted devices and connectors. Before solder is applied, molten solder within a solder reservoir is pumped upwardly through a set of solder wave nozzles so as to clean and preheat the nozzles. The preselected conductor areas on the board are then aligned with the nozzles. At this time, the board is maintained at a height slightly above the nozzles to the extent that the molten solder is prevented from escaping from between the board and the nozzles. A relatively low wave of solder Is produced through the nozzles to cause the low wave of solder to contact and preheat the preselected conductor areas on the board. A relatively high wave of solder is then produced through the nozzles to locally solder the preselected conductor areas on the printed circuit board.
    Type: Application
    Filed: August 30, 2002
    Publication date: April 10, 2003
    Inventors: Akira Takaguchi, Masaki Wata, Chikara Numata
  • Publication number: 20030062195
    Abstract: An anchoring mechanism and method are provided for securing a component to a printed circuit board. The anchoring mechanism may include a loop, a first leg extending from the loop, and a second leg extending from the loop. The first leg may mount through a first hole of the printed circuit board and include a compressible section to compress when inserted into the first hole and to expand after passing through the first hole. The compressible section of the first leg may support solder between the anchoring mechanism and the first hole. Likewise, the second leg may mount through a second hole of the printed circuit board and include a compressible section to compress when inserted into the second hole and to expand after passing through the second hole. The compressible section of the second leg may support solder between the anchoring mechanism and the second hole.
    Type: Application
    Filed: September 28, 2001
    Publication date: April 3, 2003
    Inventors: George Arrigotti, Tom E. Pearson, Raiyomand F. Aspandiar, Christopher D. Combs
  • Patent number: 6533162
    Abstract: An improved soldering system which reduces the numbers of steps for paste supply and soldering in soldering lead provided parts and surface mounting parts onto a printed circuit board. A printed circuit board has through holes through which a lead of each lead provided part is to be inserted and lands for surface mounting parts. A printing mask is matched with the through holes and lands and a paste receiving plate having holes to which solder paste is to be supplied corresponding to each of the through holes is disposed. A printing roller is swept by forcibly rotating it so as to fill with solder paste, then a printing squeegee is swept following that printing roller so as to further fill with solder paste.
    Type: Grant
    Filed: December 11, 2000
    Date of Patent: March 18, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Fumio Yoshikawa, Hideyuki Fukasawa, Mitsugu Shirai, Hideaki Sasaki, Toshitaka Murakawa, Kenichi Hamamura
  • Publication number: 20030042290
    Abstract: The present invention related to a method for producing AlMn strips or sheets for producing components by soldering, wherein a precursor material is produced from a melt which contains (in weight-percent) Si: 0.3-1.2%, Fe:≦0.5%, Cu:≦0.1%, Mn: 1.0-1.8%, Mg:≦0.3%, Cr+Zr: 0.05-0.4%, Zn:≦0.1%, Ti:≦0.1%, Sn:≦0.15%, and unavoidable companion elements, whose individual amounts are at most 0.05% and whose sum is at most 0.15%, as well as aluminum as the remainder, wherein the precursor material is preheated at a preheating temperature of less than 520° C. over a dwell time of at most 12 hours, wherein the preheated precursor material is hot rolled into a hot strip using a final hot rolling temperature of at least 250 ° C., wherein the hot strip is cold rolled into a cold strip without intermediate annealing.
    Type: Application
    Filed: April 2, 2002
    Publication date: March 6, 2003
    Inventors: Pascal Wagner, Wolf-Dieter Finkelnburg, Dietrich Wieser, Manfred Mrotzek
  • Patent number: 6527163
    Abstract: A method of making bondable contacts on a microelectronic element includes providing a microelectronic element having one or more die pads on a first face thereof and depositing conductive bonding material, such as gold, atop each die pad. The conductive bonding material is then shaped using a contact forming tool to form bondable contacts. The bondable contact has a substantially flat region and a second region projecting above the substantially flat region. The second region includes an apex adapted to abut against an opposing electrically conductive element. The bondable contacts may be formed one at a time or a plurality of the bondable contacts may be formed simultaneously. In one preferred embodiment, the projecting region of the contact defines a wedge-shaped projection that is bounded by the substantially flat region thereof. Each wedge-shaped projection may include an apex and side-walls extending between the apex and the substantially flat region of the contact.
    Type: Grant
    Filed: November 21, 2000
    Date of Patent: March 4, 2003
    Assignee: Tessera, Inc.
    Inventor: Hamid Eslampour
  • Publication number: 20030034381
    Abstract: This invention relates to a packaging method using lead-free solder, characterized by including a reflow-soldering step in which a surface mount device is soldered to a circuit board with a lead-free solder paste; an inserting step in which the lead or terminal of a insertion mount device is inserted into the circuit board; a step in which a warp preventing jig is attached to the circuit board; a flux applying step in which flux is applied to the foregoing circuit board; a preheating step in which, after applying flux, the lower surface of the circuit board is preheated; a flow-soldering step in which the upper surface of the circuit board the lower surface of which was preheated in the preheating step is heated, and by applying lead-free solder paste to the lower surface of the circuit board, the lead or terminal of the insertion mount device is flow-soldered to the circuit board; and a temperature controlling step where temperatures of both surfaces of a circuit board are adjusted, the upper surface of the
    Type: Application
    Filed: August 13, 2001
    Publication date: February 20, 2003
    Inventors: Tetsuya Nakatsuka, Masahide Okamoto, Tomoyuki Ohmura
  • Publication number: 20030024966
    Abstract: The invention relates to a process for soldering electrical components to soldering positions, which are provided with soldering material, on a plastic sheet provided with applied conductor tracks. The plastic sheet is heated, from the side which is remote from the components, to a below its damage temperature and after heating its side which is remote from the components is thermally insulated. Then, the side which faces the components is acted on by a heating-gas stream which is concentrated onto the locations which are to be soldered by a template which has windows.
    Type: Application
    Filed: July 9, 2002
    Publication date: February 6, 2003
    Applicant: SEHO Systemtechnik GmbH
    Inventors: Rolf Ludwig Diehm, Volker Liedke
  • Patent number: 6513236
    Abstract: Bump components mounted on a circuit board on a supporting substrate is covered with a flexible separation wall. A pressure difference is provided between the inner and outer sides of the separation wall and thus the bump components are pressed against the circuit board. When heating is carried out in this state, the bump components and the circuit board are connected with a conductive adhesive or solder. During the heating, the circuit board is not deformed. Therefore, a bump-component mounted body can be manufactured with high yield.
    Type: Grant
    Filed: February 5, 2001
    Date of Patent: February 4, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Masahide Tsukamoto
  • Patent number: 6510356
    Abstract: A method for programming a paste dispensing machine to paste a set of pads disposed on a printed circuit board for attachment of a ball-grid array component includes generating a set of input data for the paste dispensing machine. The set of input data represents a set of positions on the printed circuit board at which the pads are located and is generated using a neutral file having data that describes the layout of the printed circuit board. A set of data extracted from the neutral file that describe a set of positions on the printed circuit board relative to a first coordinate system are converted to be relative to a second coordinate system that is used by the paste dispensing machine. The converted data is then arranged in a desired pattern such that when the input data is supplied to the paste dispensing machine, the data causes the paste dispensing machine to dispense paste to the pads of the printed circuit board in the desired pattern.
    Type: Grant
    Filed: April 2, 2001
    Date of Patent: January 21, 2003
    Assignee: Hewlett-Packard Company
    Inventor: Ramanathan Seshan
  • Publication number: 20030010812
    Abstract: When viewed in a first direction, a cross section of a pressing surface of the bonding tool for pressing the inner leads is flat and extends uniformly over a range longer than the interval between every two electrode pads. When viewed in a second direction orthogonal to the first direction, and when the inner leads are pressed to the electrode pads by virtue of a predetermined pressing force, the length of a pressing area having a pressing force acting between the inner leads and the electrode pads is shorter than the length of each electrode pad.
    Type: Application
    Filed: June 24, 2002
    Publication date: January 16, 2003
    Inventors: Yoichiro Kurita, Teruji Inomata
  • Patent number: 6502740
    Abstract: In order to solder a lead wire of an electronic device to a wiring pattern formed on a printed circuit board, the electronic device is first placed on a first face of the printed circuit board such that the lead wire thereof are protruded from a second face of the printed circuit board, on which the wiring pattern is formed. Then cream solder is coated on the protruded lead wire. On the other hand, there is provided a liquefied heat medium having a temperature higher than a melting temperature of the cream solder. The second face of the printed board is immersed in the liquefied heat medium in a predetermined time period, to melt the cream solder. Finally, the printed board is lifted from the liquefied heat medium.
    Type: Grant
    Filed: March 13, 2001
    Date of Patent: January 7, 2003
    Assignee: Mitsumi Electric Co., Ltd.
    Inventor: Takatsugu Matsudome
  • Publication number: 20030000998
    Abstract: A method for mounting a chip (1) by bonding a bump (2) formed on the chip (1) to an electrode (6) formed on a substrate (5) and providing an underfill agent (7) between the chip (1) and the substrate (5), comprising the steps of applying the underfill agent (7) onto at least one of the substrate (5) and the chip (1), moving the chip (1) to the substrate (5) to bring the bump (2) into contact with the electrode (6) and to expand the underfill agent (7), in a space between the chip (1) and the substrate (5), to around the bump (2) and the electrode (6) in contact with each other, and heating the bump (2) or electrode (6) in the state that the bump (2) is buried in the underfill agent (7) to melt the bump (2) or electrode (6) so as to weld the bump (2) to the electrode (6), whereby the secondary oxidation of the bump (2) to be heated for melting can be prevented without purging by nitrogen gas and the like, and both a mounting device and mounting process can be simplified.
    Type: Application
    Filed: July 12, 2002
    Publication date: January 2, 2003
    Inventor: Akira Yamauchi
  • Patent number: 6500696
    Abstract: An integrated circuit device includes first and second arrays of semiconductor dice. Each array of dice is arranged in face-to-face relation to the other array of dice, thus forming a lower layer of dice and an upper layer of dice. The layers are aligned so that each upper layer die straddles two or more of the lower layer dice, thus defining overlap regions. In the overlap regions, signal pads of one layer are aligned with corresponding signal pads of the other layer. The two layers are spaced apart, thus creating a capacitance-based communication path between the upper and lower layers via the signal paths.
    Type: Grant
    Filed: October 2, 2001
    Date of Patent: December 31, 2002
    Assignee: Sun Microsystems, Inc.
    Inventor: Ivan E. Sutherland
  • Patent number: 6499994
    Abstract: To save a space for heating remarkably than that of a conventional case, to apply main heating at a high temperature only to portions of chips to be soldered and to perform heating operation in a short period of time, a heating apparatus is composed of a preheating zone and a main heating zone. In the preheating zone, support pallets are rotated in the vertical direction within a vertical heat insulating chamber like a Ferris wheel. Also, heat at a temperature such that cream solder is not molten by heaters is applied to a printed circuit board by fans. In the main heating zone, a pattern mask is fixed within a heat insulating chamber, sleeve bodies are fitted in necessary through-holes, blind plugs are fitted in unnecessary through-holes and heat at a temperature such that the cream solder is molten by a heater is applied to portions of chips to be soldered by fans through sleeve bodies, coil springs and other sleeve bodies.
    Type: Grant
    Filed: November 26, 2001
    Date of Patent: December 31, 2002
    Assignee: Minami Co., Ltd.
    Inventor: Takehiko Murakami
  • Patent number: 6501051
    Abstract: A furnace for reflowing solder on a wafer having a heating chamber with an entrance, an exit, and top, bottom, side, and end walls formed of sheets of porous insulation. The furnace has a first belt, with first and second ends, extending from a loading position into the heating chamber. The furnace has a second belt, with first and second ends; the first end of the second belt is coupled to the second end of the first belt, the second belt extending through the heating chamber. The furnace has a third belt with first and second ends; the first end of the third belt is coupled to the second end of the second belt, the third belt extending through the exit of the heating chamber to an unloading position. The heating chamber also has infrared lamps positioned below the second belt, the infrared lamps heat the second belt, such that the second belt heats the wafer situated on the second belt.
    Type: Grant
    Filed: August 23, 2000
    Date of Patent: December 31, 2002
    Assignee: Radient Technology Corp.
    Inventors: Carson T. Richert, Luis Alejandro Rey Garcia, Dienhung D. Phan, Selina De Rose-Juarez, Andrei Szilagyi
  • Patent number: 6493935
    Abstract: An integrated circuit device package. A substrate includes a first terminal coupled to the substrate. First and second conductive traces are formed on the substrate and are electrically coupled to the first terminal wherein the first conductive trace is provided to electrically couple a first bondwire to the first terminal and the second conductive trace is provided to electrically couple the second bondwire to the first terminal.
    Type: Grant
    Filed: March 21, 2000
    Date of Patent: December 17, 2002
    Assignee: Intel Corporation
    Inventor: Thomas J. Mozdzen
  • Patent number: 6493928
    Abstract: An electronic unit manufacturing apparatus includes: a cream solder printer for printing cream solder on one side of a printed-circuit board; a chip placement machine for placing a plane-mounted part on the printed-circuit board on which the cream solder is printed; a first reflow furnace for fixedly securing the plane-mounted part to the printed-circuit board; a solder application machine for applying a larger amount of cream solder than that printed by the cream solder printer in the vicinity of holes made in the one side of the printed-circuit board; and a second reflow furnace for inserting pins of a deformed part into the holes made in the printed-circuit board from an opposite side thereof and fixedly securing the pins of the deformed part to the printed-circuit board, wherein in the second reflow furnace. In the second reflow furnace, temperature on the opposite side of the printed-circuit board is set lower than temperature on the one side thereof.
    Type: Grant
    Filed: May 1, 1998
    Date of Patent: December 17, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toshiharu Shinbo, Kazuhiko Tsuyama, Toshinobu Miki
  • Patent number: 6483041
    Abstract: The invention is directed to techniques for forming a soldered connection using a pin having a channel. The channel enables the pin to form a secure connection with a via (e.g., by facilitating gas percolation out of the via hole during soldering to improve solder flow, by holding solder prior to pin insertion and soldering, or by facilitating accurate pin bending to hold solder or a pin insert prior to pin insertion and soldering) to improve connection system reliability and increase manufacturing yields. In one arrangement, the pin has a surface which includes (i) a first surface area, (ii) a second surface area that is substantially parallel to the first surface area, and (iii) a channel surface area which defines a channel that extends from the first surface area toward the second surface area. To form a soldered connection, the pin is inserted into a cavity defined by a via of a connecting member (e.g., a circuit board), in a direction that is parallel to a central axis of the via.
    Type: Grant
    Filed: November 12, 1999
    Date of Patent: November 19, 2002
    Assignee: EMC Corporation
    Inventor: Stuart D. Downes
  • Patent number: 6478215
    Abstract: A wave soldering apparatus includes a solder reservoir adapted to contain molten solder, and a solder nozzle disposed in the solder reservoir and extending up above the molten solder. The nozzle provides a substantially turbulent free solder wave under a printed circuit board while the board is moved in a predetermined path. A tray is pivotably mounted to the nozzle and angularly moved to vary the flow rate of the molten solder. A shroud is mounted adjacent to and associated with the tray to define a contained space into which an inert gas is supplied to provide an inert gas atmosphere. The shroud includes a canopy extending over a portion of the tray. The canopy extends substantially parallel to the predetermined path and is adjustably positioned in response to angular position of the tray to ensure that the board exits from the solder wave within the inert gas atmosphere.
    Type: Grant
    Filed: March 2, 2001
    Date of Patent: November 12, 2002
    Assignee: Senju Metal Industry Co., Ltd.
    Inventor: Mitsuo Zen
  • Publication number: 20020162879
    Abstract: The invention relates to a soldering apparatus, including a vessel for containing and heating molten solder, transporting means for transporting objects for soldering to the vessel and removing said objects, at least one tube extending substantially vertically above the soldering vessel, pump means for feeding molten solder to the underside of the tube, and moving means for moving into at least the vicinity of each other the underside of the printed circuit board for soldering and the upper side of the tube, wherein an outflow opening is arranged in each of the tubes at some distance from the upper side of said tubes. By arranging the outflow opening at some distance from the upper side of the tube the outflowing solder flow will no longer contact the printed circuit board and the components present thereon thus allowing more freedom in the design of the printed circuit board and the placing of the components thereon.
    Type: Application
    Filed: April 10, 2002
    Publication date: November 7, 2002
    Applicant: Vitronics Soltec B.V.
    Inventors: Gerrit Schouten, Fransiscus H.C. Benning, Lambertus P.C. Willemen
  • Patent number: 6471109
    Abstract: A pair of soldering irons are fixed to a sliding plate at a predetermined interval. The soldering irons are integrally moved so as to reciprocate in a rectangular direction relative to a conveyor belt. One of the soldering irons is conveyed to a working position of the conveyor belt and the other of them is separated from the conveyor belt. While one of the soldering irons solders a circuit board, the other is cleaned. The circuit board has a slit into which a metal plate is inserted and soldered. For the slit, a soldering land constituted of a main-land and a sub-land is provided. The main-land is formed along one of longer sides of the slit. The sub-land is elongated from the main-land along a shorter side of the slit. The soldering land is not formed all around the slit so that the slit is not closed by solder when the circuit board is dip-soldered.
    Type: Grant
    Filed: July 26, 2001
    Date of Patent: October 29, 2002
    Assignee: Fuji Photo Film Co., Ltd.
    Inventors: Masayoshi Muramatsu, Kenichi Watanabe
  • Patent number: 6468582
    Abstract: The solder pre-coating method including cleaning by dry etching a surface of a gold film on a surface of an electrode formed on a circuit board by covering the surface of the circuit board with a template having an opening; adding tackiness on the surface of the electrode after cleaning by making a tackiness adding compound react with the electrode surface; attaching solder powder on the tackiness added electrode surface; and forming a solder pre-coat layer on the electrode surface by melting the solder powder by heating. Another solder pre-coating method of the present invention adds tackiness on a surface of a gold film on a surface of an electrode after forming a metal film containing one of copper or nickel on the surface of the gold film. According to the present invention, as it eliminates the need for masking work on each individual circuit board in pre-coating solder, a partially solder pre-coated circuit board can be obtained simply and at allow cost.
    Type: Grant
    Filed: April 4, 2000
    Date of Patent: October 22, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Shoji Sakemi
  • Patent number: 6462285
    Abstract: A method and product for fabricating a printed circuit board assembly comprising a via, wherein the method inhibits the flow of molten solder into the via during a wave soldering step, thereby preventing heat transfer that might otherwise degrade a solder joint at a top pad that is thermally coupled to the via. The method comprises the steps of: (1) fastening a bottom component to the bottom surface of the circuit board by a screening and reflow of solder paste that also generates a solder plug in the via; (2) fastening top components to the top surface of the circuit board by a screening and reflow of solder paste, wherein the top components comprise ball grid arrays and other surface mount devices that are to be affixed to pads which are connected to vias; and (3) wave soldering the bottom surface to affix additional components onto the circuit board, such as pin-in-hole components placed on the top surface.
    Type: Grant
    Filed: April 5, 2001
    Date of Patent: October 8, 2002
    Assignee: International Business Machines Corporation
    Inventors: Wesley M. Enroth, George D. Oxx, Jr., Jenny B. Porter
  • Publication number: 20020139832
    Abstract: A tool for applying solder paste to leadless chips has recesses adapted to receive the leadless chips. Apertures in each recess are arranged according to pads on the leadless chip. With the chips held in the recesses, solder paste is applied in the apertures.
    Type: Application
    Filed: April 3, 2001
    Publication date: October 3, 2002
    Inventor: Heng-Kit Too