Abstract: A method and apparatus for assembling a power semiconductor is provided. A device includes a printed circuit board, a heat sink, and a semiconductor chip package. The semiconductor chip package is located between the printed circuit board and the heat sink. A heat-generating surface of the semiconductor chip package is oriented such that the heat-generating surface faces the heat sink.

Abstract: Presented herein are stud bump bonding techniques for electrically connecting an elongate conductor, such as a wire or pin, to a bonding pad. A plurality of stud bumps are bonded to a surface of a bonding pad and an elongate electrical conductor is positioned in proximity to the plurality of stud bumps. The elongate conductor is bonded to one or more of the stud bumps.

Abstract: A soldering method capable of alleviating positional displacement between substrates even though a step of removing flux can be omitted is provided. A temporary bonding agent 55 is applied onto multiple substrates 50a, 50b, and a heater 33 heats the substrates while the substrates are temporarily bonded with the temporary bonding agent 55 interposed therebetween, and before the solder 54 is melted or while the solder 54 is melted, the temporary bonding agent 55 is evaporated, and the substrates 50a, 50b are bonded with solder with the melted solder 54 interposed therebetween.

Abstract: Disclosed is an electronic component mounting method including the steps of: providing a first electronic component having a principal surface provided with a plurality of bumps; providing a substrate having a plurality of first electrodes corresponding to the plurality of bumps; applying flux to the plurality of bumps; placing the first electronic component on the substrate such that the bumps land on the corresponding first electrodes via the flux; dispensing a thermosetting resin to at least one reinforcement position on the substrate with the first electronic component placed thereon, the at least one reinforcement position corresponding to a peripheral edge portion of the first electronic component; and heating the substrate with the first electronic component placed thereon, to melt the bumps and cure the thermosetting resin, followed by cooling, thereby to join the first electronic component to the substrate.

Abstract: A reflow soldering system wherein a heating oven is provided with a contact heating unit which has a transport rail and a top heat transfer heater, and with a hot gas blowing heating unit, the transport rail and top heat transfer heater are respectively provided with heaters which heat the outer edge part of the printed circuit board, and the transport rail or top heat transfer heater moves in an up-down direction so that the transport rail and top heat transfer heater clamp and heat the outer edge part of the printed circuit board.

Abstract: A soldering method achieves little void and good joint condition in soldering an insulated circuit board and a semiconductor chip using a tin—high antimony solder material. A method of manufacturing a semiconductor device includes the steps of preparing a solder plate having a U-shape; mounting the solder plate on a substrate; mounting a semiconductor chip on the solder plate; fusing the solder plate in a reducing gas atmosphere; and reducing a pressure of the reducing gas atmosphere to a pressure lower than the atmospheric pressure when melting the solder plate.

Abstract: A method for producing a sinter layer connection between a substrate and a chip resulting in an electric and thermal connection therebetween and in reduced mechanical tensions within the chip. The method produces a sinter layer by applying a multitude of sinter elements of a base material forming the sinter layer in structured manner on a contact area of a main surface of a substrate; placing a chip to be joined to the substrate on the sinter elements; and heating and compressing the sinter elements to produce a structured sinter layer connecting the substrate and chip and extending within the contact area, the surface coverage density of the sinter elements on the substrate in a center region of the contact area being greater than the surface coverage density of the sinter elements in an edge region of the contact area, and at least one through channel, extending laterally as to the substrate's main surface being provided towards the contact area's edge.

Abstract: Provided are a composition for an anisotropic conductive adhesive, a method of forming a solder bump and a method of forming a flip chip using the same. The composition for an anisotropic conductive adhesive includes a low melting point solder particle and a thermo-curable polymer resin. The anisotropic conductive adhesive includes forming a mixture by mixing a polymer resin and a curing agent, and mixing a deforming agent, a catalyst or a reductant with the mixture.

Abstract: An electronic component is provided with two or more component terminals. A mount board is provided with two or more board terminals. The board terminal is provided with an inclined portion on a surface of the board terminal, the inclined portion being the wider as closer to a base end side toward a peripheral edge. A position of the component terminal is offset in relation to a position of the corresponding board terminal. A position of the other component terminal is offset in the opposite side to the direction of the offset in relation to a position of the corresponding board terminal. The component terminal makes contact with the inclined portion of the board terminal to bond the component terminal and the board terminal.

Abstract: A soldering method capable of alleviating positional displacement between substrates even though a step of removing flux can be omitted is provided. A temporary bonding agent 55 is applied onto multiple substrates 50a, 50b, and a heater 33 heats the substrates while the substrates are temporarily bonded with the temporary bonding agent 55 interposed therebetween, and before the solder 54 is melted or while the solder 54 is melted, the temporary bonding agent 55 is evaporated, and the substrates 50a, 50b are bonded with solder with the melted solder 54 interposed therebetween.

Abstract: A method of manufacturing an electronic apparatus including a first and a second components, includes: forming a first solder bump on one of the first component and the second component; forming a second solder bump on the other one of the first component and the second component; bringing the first solder bump into contact with the second solder bump at a temperature higher than the liquidus temperature of any of the first and the second solder bumps such that the first and the second solder bumps are fused together to form a solder joint of an alloy having a lower liquidus temperature than any of the first and the second solder bumps; and solidifying the solder joint between the first and the second component.

Abstract: A soldering system includes a track, a laying device, a boiler, a shelter, a transmission roller, a position sensor, a thermal radiation heating device, and a driving device. At least one hole is formed on the shelter, and a shape and a dimension of at least one hole on the shelter corresponds to a shape and a dimension of a DIP component. The transmission roller rotates the shelter according to a transmission speed of the track. The position sensor detects a position of a circuit board relative to the boiler. The thermal radiation heating device heats an area on a second surface of the circuit board different from a first surface adjacent to the DIP component through the at least one hole on the shelter continuously, so as to increase a temperature of the second surface when the first surface of the circuit board is passing through the boiler.

Abstract: A thermode device for connecting and/or electrically contacting a plurality of first semiconductor components to at least one support element and/or to a plurality of second semiconductor components by heating an adhesive under the application of pressure. An example thermode device includes a basic body and a heating element which can be extended out of the basic body and which, under the application of pressure, acts on at least one of the first semiconductor components, wherein the basic body has on its underside a plurality of heating plates which are oriented vertically and are arranged next to one another. Each heating plate has on its end and underside a plurality of the extendable heating elements, to the underside of each of which there is assigned a first semiconductor component.

Abstract: Embodiments of the present disclosure are directed towards multi-solder techniques and configurations for integrated circuit (IC) package assembly. In one embodiment, a method includes depositing a plurality of solder balls on a plurality of pads of a package substrate, the plurality of solder balls corresponding with the plurality of pads and performing a solder reflow process to form a solder joint between the plurality of solder balls and the plurality of pads. Individual solder balls of the plurality of solder balls include a first solder material and a second solder material, the first solder material having a liquidus temperature that is greater than a peak temperature of the solder reflow process and the second solder material having a liquidus temperature that is less than the peak temperature of the solder reflow process. Other embodiments may be described and/or claimed.

Abstract: To improve reliability of a semiconductor device, in a flip-chip bonding step, a solder material that is attached to a tip end surface of a projecting electrode in advance and a solder material that is applied in advance over a terminal (bonding lead) are heated and thereby integrated and electrically connected to each other. The terminal includes a wide part (a first portion) with a first width W1 and a narrow part (a second portion) with a second width W2. When the solder material is heated, the thickness of the solder material arranged over the narrow part becomes smaller than the thickness of the solder material arranged in the wide part. Then, in the flip-chip bonding step, a projecting electrode is arranged over the narrow part and bonded onto the narrow part. Thus, the amount of protrusion of the solder material can be reduced.

Abstract: A method of soldering a DIP component on a circuit board includes piercing the DIP component through the circuit board, laying fluxer on the circuit board, passing a first surface of the circuit board through a boiler so that molten tin from the boiler flows between the DIP component and the circuit board through the first surface of the circuit board, and heating a second surface of the circuit board different from the first surface so as to increase temperature of the second surface by a thermal radiation heating device to when the first surface of the circuit board passes through the boiler.

Abstract: An optical module having a substrate and an electrical connector whose terminals are precisely aligned with pads on the substrate is disclosed. The electrical connector provides upper and lower terminals, while, the substrate provides upper and lower pads each having a V-shaped cut opened for a direction along which the upper and lower terminals are slide. As the electrical connector is assembled with the substrate, the terminals slide along the edge of the V-shaped cut and slide onto the pads at the bottom of the V-shaped cut, which automatically and precisely aligns the terminals with the pads.

Abstract: An embodiment is a method for forming a semiconductor assembly including cleaning a connector including copper formed on a substrate, applying cold tin to the connector, applying hot tin to the connector, and spin rinsing and drying the connector.

Abstract: A method for embedding at least one component into a dielectric layer. obtain a good result, it is provided that the method includes the following steps: a) Position and affix the at least one component on a carrier; b) Cast a liquid dielectric around the at least one component, thereby enclosing the at least one component completely; c) Harden the liquid dielectric to form a solid dielectric layer; and d) Apply, in particular by lamination thereon, another layer, in particular an electrically conductive layer. The use of a dielectric layer formed entirely of liquid dielectric, wherein the liquid dielectric is not converted into a solid state until the dielectric is processed.

Abstract: A reflow method for solder includes heating the solder to a first temperature that is above a liquidus temperature of the solder; cooling the solder to a second temperature that is below a solidification temperature of the solder; reheating the solder to a third temperature that is above a solidus temperature of the solder and below the liquidus temperature of the solder; cooling the solder to a fourth temperature that is below the solidification temperature of the solder.

Abstract: A substrate manufacturing apparatus 100 has a substrate delivery path 120 through which a multi-unit substrate 110 is delivered and a mask delivery path 140 through which an individual mask 130 is delivered. The substrate delivery path 120 has a pad detecting device 160 for detecting a position of a pad 112 formed on a surface of the substrate 110. The mask delivery path 140 has a mask hole detecting device 220 for detecting a position of a conductive ball inserting hole 132 of the individual mask 130. A moving position of an adsorbing head 212 is adjusted in such a manner that the position of the conductive ball inserting hole 132 is coincident with that of the pad 112 of the substrate 110 based on pad position information of the pad detecting device 160 and mask hole position information of the mask hole detecting device 220.

Abstract: The embodiments of the invention provide a semiconductor chip mounting methods to prevent the occurrence of particles created while mounting a thin semiconductor chip onto a substrate. A semiconductor chip having conductive bumps on its main surface is held by its back via an elastic film using a suction tool having a plurality of suction holes, the semiconductor chip is positioned against a substrate provided with connection wires corresponding to said conductive bumps, and the semiconductor chip is mounted onto the substrate in such a manner that the conductive bumps connect to said connection wires, and uniform pressure is applied from the oversized bonding tool suction to the semiconductor chip via said film while said semiconductor chip is being pressed against said substrate by oversized bonding tool to keep constant pressure in order to bond said conductive bumps with said connection wires.

Abstract: Methods for producing a circuit board system and a circuit board arrangement are disclosed. One method for producing a circuit board system includes: providing a first circuit board including a top side, a bottom side, a top metallization layer arranged at the top side, and a bottom metallization layer arranged at the bottom side, wherein the bottom metallization layer comprises a number of soldering pads; applying a first solder over the soldering pads; and applying a second solder over the top metallization layer. The method further includes providing a number of electronic components and a metallic or metallized shielding frame; arranging the number of electronic components and the shielding frame on the applied second solder; and soldering the number of electronic components and the shielding frame to the top metallization layer with the second solder.

Abstract: Some embodiments of the present invention are generally directed to testing connections of a memory device to a circuit board or other device. In one embodiment, a memory device that is configured to facilitate continuity testing between the device and a printed circuit board or other device is disclosed. The memory device includes a substrate and two connection pads that are electrically coupled to one another via a test path. A system and method for testing the connections between a memory device and a circuit board or other device are also disclosed, as are additional techniques for detecting excess temperature and enabling special functionalities using multi-stage connection pads.

Abstract: A method of manufacturing an electronic component module and the electronic component module manufactured by the manufacturing method includes bumps, each including a thicker portion having a relatively large thickness and a thinner portion having a relatively small thickness and formed on one surface of the substrate. When looking at the electronic component in a mounted state in a plan view, the thicker portion is positioned on a side of a corresponding outer terminal closer to a center of the electronic component and the thinner portion is positioned on the opposite side of the corresponding outer terminal. In the plan view, joining portions joining the outer terminals respectively to the bumps are formed such that a height of each joining portion on the opposite side is lower than a height of the joining portion on the side closer to the center of the electronic component.

Abstract: A practical bonding technique is provided for solid-phase room-temperature bonding not requiring a profile irregularity of the order of several nanometers, in which a high-vacuum energy wave treatment and continuous high-vacuum bonding are not required. Since an adhering substance layer is thin immediately after a surface activating treatment using an energy wave, a bonding interface is spread by crushing the adhering substance layer to perform bonding, so that a new surface appears on a bonding surface, and objects to be bonded are bonded together. In order to crush the adhering substance layer more easily, a bonding metal of a bonding portion of the object to be bonded requires a low hardness. According to the results of various experiments conducted by the present inventors, it was found that the hardness of the bonding portion which is a Vickers hardness of 200 Hv or less is particularly effective for room-temperature bonding.

Abstract: An object of the invention is to provide an electronic component mounting system and an electronic component mounting method which can execute component mounting work on a plurality of boards simultaneously, concurrently and efficiently so that high productivity and responsiveness to production of many items can be achieved consistently.

Abstract: A method of manufacturing a semiconductor chip is disclosed. A die having a plurality of die-pads is attached to a substrate in a semiconductor package which includes a plurality of substrate-pads. The method involves forming conductive column bumps of differing volumes extending from the die-pads; attaching each of the column bumps to a corresponding substrate-pad to form a subassembly; and reflowing the subassembly so that the column bumps form robust electrical and mechanical connections between the die pads and the substrate pads.

Abstract: Structures and methods for detecting solder wetting of pedestal sidewalls. The structure includes a semiconductor wafer having an array of integrated circuit chips, each of the integrated circuit chips having an array of chip pedestals having respective chip solder columns on top of the chip pedestals, the pedestals spaced apart a first distance in a first direction and a spaced apart second distance in second direction perpendicular to the first direction; and at least one monitor structure disposed in different regions of the wafer from the integrated circuit chips, the monitor structure comprising at least a first pedestal and a first solder column on a top surface of the first pedestal and a second pedestal and a second solder column on a top surface of the second pedestal, the first and the second pedestals spaced apart a third distance, the third distance less than the first and the second distances.

Abstract: A method of forming a bump structure includes providing a first work piece including a dielectric layer having a top surface; placing a second work piece facing the first work piece; placing a heating tool contacting the second work piece; and heating the second work piece using the heating tool to perform a reflow process. A first solder bump between the first and the second work pieces is melted to form a second solder bump. Before the second solder bump solidifies, pulling the second work piece away from the first work piece, until an angle formed between a tangent line of the second solder bump and the top surface of the dielectric layer is greater than about 50 degrees, wherein the tangent line is drawn at a point where the second solder bump joins the dielectric layer.

Abstract: A semiconductor device (5) for radio frequency applications has a semiconductor chip (1) with an integrated circuit accommodated in a radio frequency package. Inside bumps (2) comprise inside contacts between the semiconductor chip (1) and a redistribution substrate (3). The inside bumps (2) have a metallic or plastic core (6) and a coating layer (7) of a noble metal.

Abstract: A semiconductor device has a substrate having a plurality of conductive pads formed thereon. A semiconductor die is provided having a plurality of conductive pillars formed thereon. A solder is used for electrically coupling the conductive pillars to the conductive pads. Solder mask is formed on portions of the conductive pads to prevent the solder from flowing in an unwanted direction on the conductive pads.

Abstract: A method of producing an inductor with high inductance includes forming a removable polymer layer on a temporary carrier; forming a structure including a first coil, a second coil, and a dielectric layer on the removable polymer layer; forming a first magnetic glue layer on the removable polymer layer and the structure; removing the temporary carrier; and forming a second magnetic glue layer below the structure and the first magnetic glue layer.

Abstract: A semiconductor device comprises a substrate and a semiconductor die. Bumps are formed over the substrate or a first surface of the semiconductor die. Conductive columns devoid of solder are formed over the substrate or the first surface of the semiconductor die. The semiconductor die is disposed over the substrate. A collet including a first cavity and a second cavity formed in a surface of the first cavity is mounted over the semiconductor die with a second surface of the semiconductor die opposite the first surface disposed within the first cavity. The bumps are reflowed. A force is applied to the collet to hold the bumps to the conductive columns while reflowing the bumps to make electrical connection to the conductive columns. The collet is removed. An underfill material is deposited between the semiconductor die and substrate. An encapsulant is deposited over the semiconductor die and substrate.

Abstract: A method of removing oxidation from certain metallic contact surfaces utilizing a combination of relatively simple and inexpensive off-the-shelf equipment and specific chemistry. The method being a very rapid dry process which does not require a vacuum or containment chamber, or toxic gasses/chemicals, and does not damage sensitive electronic circuits or components. Additionally, the process creates a passivation layer on the surface of the metallic contact which inhibits further oxidation while allowing rapid and complete bonding, even many hours after surface treatment, without having to remove the passivation layer. The process utilizes a room-ambient plasma applicator with hydrogen, nitrogen, and inert gasses.

Abstract: Methods and systems for low-force, low-temperature thermocompression bonding. The present application teaches new methods and structures for three-dimensional integrated circuits, in which cold thermocompression bonding is used to provide reliable bonding. To achieve this, reduction and passivation steps are preferably both used to reduce native oxide on the contact metals and to prevent reformation of native oxide, preferably using atmospheric plasma treatments. Preferably the physical compression height of the elements is set to be only enough to reliably achieve at least some compression of each bonding element pair, compensating for any lack of flatness. Preferably the thermocompression bonding is performed well below the melting point. This not only avoids the deformation of lower levels which is induced by reflow techniques, but also provides a steep relation of force versus z-axis travel, so that a drastically-increasing resistance to compression helps to regulate the degree of thermocompression.

Abstract: A method of manufacturing an electronic apparatus including a first and a second components, includes: forming a first solder bump on one of the first component and the second component; forming a second solder bump on the other one of the first component and the second component; bringing the first solder bump into contact with the second solder bump at a temperature higher than the liquidus temperature of any of the first and the second solder bumps such that the first and the second solder bumps are fused together to form a solder joint of an alloy having a lower liquidus temperature than any of the first and the second solder bumps; and solidifying the solder joint between the first and the second component.

Abstract: A method includes providing a substrate carrier including work piece holders, and placing a first plurality of work pieces into the work piece holders. A second plurality of work pieces is picked up and placed, with each of the second plurality of work pieces being placed on one of the first plurality of work pieces. Solder bumps between the first and the second plurality of work pieces are then reflowed to simultaneously bond the first and the second plurality of work pieces together.

Abstract: The present invention relates to a compliant leaded interposer for resiliently attaching and electrically connecting a ball grid array package to a circuit board. The interposer may include a substrate, a plurality of pads, and a plurality of pins. The plurality of pads may be positioned substantially on the top surface of the substrate and arranged in a predetermined pattern substantially corresponding to the solder ball pattern on the ball grid array package. The plurality of pins may be positioned substantially perpendicular to the substrate and may extend through the substrate and the plurality of pads. The interposer may be configured to attach the ball grid array package to the circuit board such that each of the solder balls on the ball grid array package contacts at least a portion the plurality of pins and at least a portion of the plurality of pads and such that the each of the plurality of pins also connects to a contact on the circuit board.

Abstract: To improve reliability of a semiconductor device, in a flip-chip bonding step, a solder material that is attached to a tip end surface of a projecting electrode in advance and a solder material that is applied in advance over a terminal (bonding lead) are heated and thereby integrated and electrically connected to each other. The terminal includes a wide part (a first portion) with a first width W1 and a narrow part (a second portion) with a second width W2. When the solder material is heated, the thickness of the solder material arranged over the narrow part becomes smaller than the thickness of the solder material arranged in the wide part. Then, in the flip-chip bonding step, a projecting electrode is arranged over the narrow part and bonded onto the narrow part. Thus, the amount of protrusion of the solder material can be reduced.

Abstract: A semiconductor device (100) comprising a semiconductor chip (101) assembled on a substrate (130) by solder joints; the chip and the substrate having a first set of contact pads (110, 140) of a first area, respective pads vertically aligned and connected by joints (160) made of a first solder having a first volume and a first melting temperature; and the chip and the substrate having a second set of contact pads (122, 150) of a second area, respective pads vertically aligned and connected by joints (170) made of a second solder having a second volume and a second melting temperature, the first melting temperature being lower than the second melting temperature.

Abstract: A process and apparatus for forming and transferring metal arrays of balls and shapes is described incorporating molds, tape, injection molded metal such as solder, metal reflow and a mask on a substrate for shearing solidified metal of metal arrays into respective openings in the mask.

Abstract: The mechanisms for forming bumps on packaged dies and package substrates reduce variation of bump heights across the packaged dies and packaged substrates. Bumps are designed to have different widths to counter the higher plating current near edge(s) of dies or substrates. Bump sizes can be divided into different zones depending on the bump patterns and densities across the packaged die and/or substrates. Smaller bumps near edges reduce the thickness of plated film(s), which would have been thicker due to being near the edges. As a result, the bump heights across the packaged dies and/or substrates can be kept significantly constant and chip package can be properly formed.

Abstract: Provided are a composition for an anisotropic conductive adhesive, a method of forming a solder bump and a method of forming a flip chip using the same. The composition for an anisotropic conductive adhesive includes a low melting point solder particle and a thermo-curable polymer resin. The anisotropic conductive adhesive includes forming a mixture by mixing a polymer resin and a curing agent, and mixing a deforming agent, a catalyst or a reductant with the mixture.

Abstract: Avoiding contaminant generation within a hard disk drive due to increased temperatures during a solder reflow process is described. Energy from a beam of energy that is directed toward a plurality of polyimide regions is received. Each of the plurality of polyimide regions are disposed adjacent to at least one solder pad. The plurality of polyimide regions and the at least one solder pad comprises a first component of a hard disk drive. Then, a portion of the energy is reflected away from the plurality of polyimide regions to prevent an absorption of the portion by the plurality of polyimide regions and a burning of the plurality of polyimide regions.

Abstract: Contact structures exhibiting resilience or compliance for a variety of electronic components are formed. A variety of materials for the wire stem (which serves as a falsework) and for the overcoat (which serves as a superstructure over the falsework) are disclosed. Various techniques are described for mounting the contact structures to a variety of electronic components (e.g., semiconductor wafers and dies, semiconductor packages, interposers, interconnect substrates, etc.), and various process sequences are described. The resilient contact structures described herein are ideal for making a “temporary” (probe) connections to an electronic component such as a semiconductor die, for burn-in and functional testing.

Abstract: A die having a base formed of a first material is connected to a board having a base formed of a second material. An interposer having a coefficient of thermal expansion intermediate coefficients of thermal expansion of the first and second materials is positioned between the die and the board.

Abstract: A method for aligning a first substrate relative to a second substrate by enabling reflow of low-melting-temperature solder bumps is disclosed. Reflow of the solder bumps induces a force that moves one substrate relative to the other to improve alignment accuracy between bond pads located on each substrate. The method further enables reduction of surface oxide on the solder bumps that would otherwise inhibit reliable solder joint formation.

Abstract: A method of centering a disk of a hard disk drive includes arranging a disk on an upper end portion of a hub on which a plurality of disks are rotatably assembled, and assembling the disk on the hub by vibrating the hub. Accordingly, the disks and/or spacers may be easily assembled on the hub, a time of centering may be relatively much reduced, and a superior centering quality may be obtained.

Abstract: An array of solder balls is attached to solder pads of one of a first substrate and a second substrate. After aligning the array of solder balls relative to solder pads of the other of the first substrate and the second substrate, a thermal-mass-increasing fixture is placed on a surface of the second substrate to form an assembly of the first substrate, the second substrate, and the array of the solder balls therebetween, and the thermal-mass-increasing fixture. The thermal-mass-increasing fixture is in physical contact with at least a surface of a periphery of the second substrate. The thermal-mass-increasing fixture reduces the cool-down rate of peripheral solder balls after a reflow step, thereby increasing time for deformation of peripheral solder balls during the cool-down and reducing the mechanical stress on the solder balls after the cool-down.